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Alex1 Kao has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54529 )
Change subject: mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R
......................................................................
Patch Set 11: Code-Review+1
(1 comment)
File src/mainboard/google/dedede/variants/pirika/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/54529/comment/07c5dd2e_b4f5619e
PS10, Line 68: probe AUDIO_AMP UNPROVISIONED
> Is there an unprovisioned case? If the CBI is always provisioned with amplifier info, then this line […]
No. I removed it and re-uploaded overridetree.cb.
Thanks.
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Hello build bot (Jenkins), Wayne3 Wang, Henry Sun, Ariel Chang, Paul2 Huang, Kirk Wang, Shou-Chieh Hsu, Karthik Ramasubramanian,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/54529
to look at the new patch set (#11).
Change subject: mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R
......................................................................
mb/google/dedede: Support Realtek audio codec ALC5682I and speaker L/R
Add Realtek audio codec ALC5682I and speaker L/R under I2C4
BUG=b:188446060
BRANCH=dedede
TEST=Boot to check ALC5682I and speaker L/R are functional
Change-Id: I8173ffbfb1a8f18978a5e35c69972d4a6d8cb04a
Signed-off-by: Alex1 Kao <alex1_kao(a)pegatron.corp-partner.google.com>
---
M src/mainboard/google/dedede/variants/pirika/overridetree.cb
1 file changed, 29 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/54529/11
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Rex-BC Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55163 )
Change subject: soc/mediatek/mt8195: fix GPIO register offsets
......................................................................
Patch Set 5:
(3 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/55163/comment/5beb661c_0ac6047f
PS1, Line 9: Fix GPIO pu/pd offset.
> Thanks. Please put this in commit description […]
Done
Commit Message:
https://review.coreboot.org/c/coreboot/+/55163/comment/7025b8c2_cf9a6172
PS4, Line 7: soc/mediatek/mt8195: fix GPIO register offset
> Plural: offsets?
Done
https://review.coreboot.org/c/coreboot/+/55163/comment/ee8d0d0c_cec7bd7a
PS4, Line 10:
> Where did you get the new values from? Did something not work before and works now?
I add document info in commit message.
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Rex-BC Chen has uploaded a new patch set (#115) to the change originally created by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/52260 )
Change subject: DO-NOT-SUBMIT: MT8195 Cherry review ToT
......................................................................
DO-NOT-SUBMIT: MT8195 Cherry review ToT
Signed-off-by: Yidi Lin <yidi.lin(a)mediatek.com>
Change-Id: I3ed96b245bbb52501e9b7d6b89ed42468f505ab0
---
M 3rdparty/amd_blobs
M 3rdparty/blobs
M 3rdparty/intel-microcode
M README.md
4 files changed, 4 insertions(+), 3 deletions(-)
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Paul2 Huang has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55176 )
Change subject: TEST ONLY DO NOT SUMMIT
......................................................................
Patch Set 1: Code-Review-1
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Change subject: TEST ONLY DO NOT SUMMIT
......................................................................
TEST ONLY DO NOT SUMMIT
TEST
BUG=none
BRANCH=none
TEST=none
Change-Id: Ie01870e0f3b0259f590cf9d133fab5e763f988a4
---
M README.md
1 file changed, 1 insertion(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/76/55176/1
diff --git a/README.md b/README.md
index 14879c1..41d9549 100644
--- a/README.md
+++ b/README.md
@@ -1,3 +1,4 @@
+TEST ONLY
coreboot README
===============
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Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/55012 )
Change subject: arch/x86: Set RTC century byte offset in FADT x86-wide
......................................................................
Patch Set 2: Code-Review-1
(1 comment)
Patchset:
PS2:
'for file in $(find -name \*.layout); do grep -l "^400" $file; done'
Looks like a lot of mainboards have an option in cmos.layout there...
You might want to explicitly set that byte as reserved in there for all boards. You can check that in C code: see for instance soc/intel/xeon_sp/cpx/romstage.c how this is done.
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