coreboot-gerrit May 2021

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Change in coreboot[master]: Documentation/releases: Fill in coreboot 4.14 release notes
by Angel Pons (Code Review) 09 May '21

09 May '21

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54003 ) Change subject: Documentation/releases: Fill in coreboot 4.14 release notes ...................................................................... Patch Set 1: Code-Review+1 (2 comments) Patchset: PS1: I imagine you know that CB:52735 should go in beforehand. File Documentation/releases/coreboot-4.14-relnotes.md: https://review.coreboot.org/c/coreboot/+/54003/comment/977547af_18027113 PS1, Line 123: ### Add significant changes here Drop? -- To view, visit https://review.coreboot.org/c/coreboot/+/54003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79530c91424112247e485a5a41debc666e0072d4 Gerrit-Change-Number: 54003 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 09 May 2021 21:28:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/msi/h81m-p33: Use `ACPI_DSDT_REV_2` macro
by Angel Pons (Code Review) 09 May '21

09 May '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54004 ) Change subject: mb/msi/h81m-p33: Use `ACPI_DSDT_REV_2` macro ...................................................................... mb/msi/h81m-p33: Use `ACPI_DSDT_REV_2` macro Change-Id: I15846bf23e49666e4948f623d6320d5c29e00bd4 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/msi/h81m-p33/dsdt.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/54004/1 diff --git a/src/mainboard/msi/h81m-p33/dsdt.asl b/src/mainboard/msi/h81m-p33/dsdt.asl index 9c55945..41b73fa 100644 --- a/src/mainboard/msi/h81m-p33/dsdt.asl +++ b/src/mainboard/msi/h81m-p33/dsdt.asl @@ -5,7 +5,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, /* DSDT revision: ACPI 2.0 and up */ + ACPI_DSDT_REV_2, OEM_ID, ACPI_TABLE_CREATOR, 0x20141018 /* OEM revision */ -- To view, visit https://review.coreboot.org/c/coreboot/+/54004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15846bf23e49666e4948f623d6320d5c29e00bd4 Gerrit-Change-Number: 54004 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: cpu/intel/socket_p: Increase DCACHE_RAM_SIZE
by Angel Pons (Code Review) 09 May '21

09 May '21

Attention is currently required from: Arthur Heymans, Nico Huber, Alexander Couzens, Patrick Rudolph, Swift Geek (Sebastian Grzywna). Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52942 ) Change subject: cpu/intel/socket_p: Increase DCACHE_RAM_SIZE ...................................................................... Patch Set 1: (1 comment) File src/cpu/intel/socket_p/Kconfig: https://review.coreboot.org/c/coreboot/+/52942/comment/e2d7ec11_e5cf1912 PS1, Line 16: default 0x10000 > DCACHE_RAM_SIZE would be the data region. for code, we use the size of the stage. […] I had swiftgeek test CB:54002 on X200 -- To view, visit https://review.coreboot.org/c/coreboot/+/52942 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d6f7f9151ecd4c9fbbba4ed033dfda8724b6772 Gerrit-Change-Number: 52942 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Comment-Date: Sun, 09 May 2021 20:43:11 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur.heymans(a)9elements.com> Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE
by Swift Geek (Sebastian Grzywna) (Code Review) 09 May '21

09 May '21

Attention is currently required from: Angel Pons, Arthur Heymans, Patrick Rudolph. Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54002 ) Change subject: [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE ...................................................................... Patch Set 2: Code-Review+1 (1 comment) Patchset: PS2: Tested on X200 (Mocha-1) with T9550 CPU, boots fine -- To view, visit https://review.coreboot.org/c/coreboot/+/54002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259 Gerrit-Change-Number: 54002 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Sun, 09 May 2021 20:42:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE
by Angel Pons (Code Review) 09 May '21

09 May '21

Attention is currently required from: Patrick Rudolph, Swift Geek (Sebastian Grzywna). Hello build bot (Jenkins), Patrick Rudolph, Swift Geek (Sebastian Grzywna), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/54002 to look at the new patch set (#2). Change subject: [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE ...................................................................... [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_BGA956/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/54002/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/54002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259 Gerrit-Change-Number: 54002 Gerrit-PatchSet: 2 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Attention: Swift Geek (Sebastian Grzywna) <swiftgeek(a)gmail.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: Documentation/releases: Fill in coreboot 4.14 release notes
by Patrick Georgi (Code Review) 09 May '21

09 May '21

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54003 ) Change subject: Documentation/releases: Fill in coreboot 4.14 release notes ...................................................................... Documentation/releases: Fill in coreboot 4.14 release notes Change-Id: I79530c91424112247e485a5a41debc666e0072d4 Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M Documentation/releases/coreboot-4.14-relnotes.md 1 file changed, 67 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/54003/1 diff --git a/Documentation/releases/coreboot-4.14-relnotes.md b/Documentation/releases/coreboot-4.14-relnotes.md index 6b629f4..f79dc89 100644 --- a/Documentation/releases/coreboot-4.14-relnotes.md +++ b/Documentation/releases/coreboot-4.14-relnotes.md @@ -1,14 +1,73 @@ -Upcoming release - coreboot 4.14 -================================ +coreboot 4.14 +============= -The 4.14 release is planned for May 2021. +coreboot 4.14 was released on May 10th, 2021. -Update this document with changes that should be in the release notes. +Since 4.13 there have been 3660 new commits by 215 developers. +Of these, about 50 contributed to coreboot for the first time. +Welcome to the project! -* Please use Markdown. -* See the past few release notes for the general format. -* The chip and board additions and removals will be updated right - before the release, so those do not need to be added. +These changes have been all over the place, so that there's no +particular area to focus on when describing this release: We had +improvements to mainboards, to chipsets (including much welcomed +work to open source implementations of what has been blobs before), +to the overall architecture. + +Thank you to all developers who made coreboot the great open source +firmware project that it is, and made our code better than ever. + +New mainboards +-------------- + +* AMD Bilby +* AMD Majolica +* GIGABYTE GA-D510UD +* Google Blipper +* Google Brya +* Google Cherry +* Google Collis +* Google Copano +* Google Cozmo +* Google Cret +* Google Drobit +* Google Galtic +* Google Gumboz +* Google Guybrush +* Google Herobrine +* Google Homestar +* Google Katsu +* Google Kracko +* Google Lalala +* Google Makomo +* Google Mancomb +* Google Marzipan +* Google Pirika +* Google Sasuke +* Google Sasukette +* Google Spherion +* Google Storo +* Google Volet +* HP 280 G2 +* Intel Alderlake-M RVP +* Intel Alderlake-M RVP with Chrome EC +* Intel Elkhartlake LPDDR4x CRB +* Intel shadowmountain +* Kontron COMe-mAL10 +* MSI H81M-P33 (MS-7817 v1.2) +* Pine64 ROCKPro64 +* Purism Librem 14 +* System76 darp5 +* System76 galp3-c +* System76 gaze15 +* System76 oryp5 +* System76 oryp6 + +Removed mainboards +------------------ + +* Google Boldar +* Intel Cannonlake U LPDDR4 RVP +* Intel Cannonlake Y LPDDR4 RVP Deprecations and incompatible changes ------------------------------------- -- To view, visit https://review.coreboot.org/c/coreboot/+/54003 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I79530c91424112247e485a5a41debc666e0072d4 Gerrit-Change-Number: 54003 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
by Angel Pons (Code Review) 09 May '21

09 May '21

Attention is currently required from: Idwer Vollering, Paul Menzel, Felix Held. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53996 ) Change subject: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD ...................................................................... Patch Set 2: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/53996/comment/97440f70_1e94a257 PS1, Line 7: util/cbfstool: shuffle -D_XOPEN_SOURCE around to fix compilation on FreeBSD > How about: […] Done https://review.coreboot.org/c/coreboot/+/53996/comment/3542cbc0_f6aa2c2c PS1, Line 8: > Nit: Please paste the error you got. Done Patchset: PS2: > hm, is there a way to solve this that doesn't involve any os-specific hacks? this one checks for fre […] I wonder what exactly needs -D_XOPEN_SOURCE=700 -- To view, visit https://review.coreboot.org/c/coreboot/+/53996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478 Gerrit-Change-Number: 53996 Gerrit-PatchSet: 2 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Sun, 09 May 2021 19:50:33 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
by Felix Held (Code Review) 09 May '21

09 May '21

Attention is currently required from: Idwer Vollering. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/53996 ) Change subject: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: hm, is there a way to solve this that doesn't involve any os-specific hacks? this one checks for freebsd, but there are also different bsds and adding some workaround for every different bsd family smells wrong to me -- To view, visit https://review.coreboot.org/c/coreboot/+/53996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478 Gerrit-Change-Number: 53996 Gerrit-PatchSet: 2 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Sun, 09 May 2021 19:41:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [TESTONLY] for swiftgeek
by Angel Pons (Code Review) 09 May '21

09 May '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/54002 ) Change subject: [TESTONLY] for swiftgeek ...................................................................... [TESTONLY] for swiftgeek Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/cpu/intel/socket_BGA956/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/02/54002/1 diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 638653c..e72ac52 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -12,7 +12,7 @@ config DCACHE_RAM_SIZE hex - default 0x8000 + default 0x10000 config DCACHE_BSP_STACK_SIZE hex -- To view, visit https://review.coreboot.org/c/coreboot/+/54002 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259 Gerrit-Change-Number: 54002 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD
by Idwer Vollering (Code Review) 09 May '21

09 May '21

Attention is currently required from: Idwer Vollering. Hello build bot (Jenkins), Angel Pons, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/53996 to look at the new patch set (#2). Change subject: util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD ...................................................................... util/cbfstool: Do not set -D_XOPEN_SOURCE on FreeBSD Fixes compilation on FreeBSD CURRENT, and possibly other releases. The compiler, clang, complained about: util/cbfstool/cbfstool.c:181:40: error: implicit declaration of function 'memmem' is invalid in C99 [-Werror,-Wimplicit-function-declaration] util/cbfstool/cbfstool.c:181:31: error: incompatible integer to pointer conversion initializing 'struct metadata_hash_anchor *' with an expression of type 'int' [-Werror,-Wint-conversion] Signed-off-by: Idwer Vollering <vidwer(a)gmail.com> Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478 --- M util/cbfstool/Makefile.inc 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/53996/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/53996 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c02a21709160df44fc8da329f6c4a9bad24478 Gerrit-Change-Number: 53996 Gerrit-PatchSet: 2 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Idwer Vollering <vidwer(a)gmail.com> Gerrit-MessageType: newpatchset

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coreboot-gerrit May 2021