Change in coreboot[master]: [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE - coreboot-gerrit

9 May 2021


      Attention is currently required from: Angel Pons, Arthur Heymans, Patrick Rudolph.
Swift Geek (Sebastian Grzywna) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/54002 )
Change subject: [TESTONLY] cpu/intel/socket_BGA956: Increase DCACHE_RAM_SIZE
......................................................................
Patch Set 2: Code-Review+1
(1 comment)
Patchset:
PS2: 
Tested on X200 (Mocha-1) with T9550 CPU, boots fine
-- 
To view, visit https://review.coreboot.org/c/coreboot/+/54002
To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings

Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I3759e3dae5868e033e4b153dba3ad1514e581259
Gerrit-Change-Number: 54002
Gerrit-PatchSet: 2
Gerrit-Owner: Angel Pons th3fanbus@gmail.com
Gerrit-Reviewer: Arthur Heymans arthur@aheymans.xyz
Gerrit-Reviewer: Patrick Rudolph siro@das-labor.org
Gerrit-Reviewer: Swift Geek (Sebastian Grzywna) swiftgeek@gmail.com
Gerrit-Reviewer: build bot (Jenkins) no-reply@coreboot.org
Gerrit-Attention: Angel Pons th3fanbus@gmail.com
Gerrit-Attention: Arthur Heymans arthur@aheymans.xyz
Gerrit-Attention: Patrick Rudolph siro@das-labor.org
Gerrit-Comment-Date: Sun, 09 May 2021 20:42:41 +0000
Gerrit-HasComments: Yes
Gerrit-Has-Labels: Yes
Gerrit-MessageType: comment