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Change subject: cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
......................................................................
cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
This u32 smm_board_info is an optional per mainboard defined data that
mainboard can set the value and pass to SMM. The reason is that getting
certain data that requires searching from flash VPD or CMOS is not very
ideal to be done in SMM.
One use case is that mainboard can pass SMM console log level via this
variable and in SMM it can be referenced in get_console_loglevel()
override function directly.
Tested=On OCP Delta Lake, verified SMM log level can be overridden.
Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
---
M src/cpu/x86/smm/smm_module_handler.c
M src/cpu/x86/smm/smm_module_loader.c
M src/cpu/x86/smm/smm_module_loaderv2.c
M src/include/cpu/x86/smm.h
4 files changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/49460/13
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Change subject: cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
......................................................................
Patch Set 12:
(1 comment)
File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/c/coreboot/+/49460/comment/7d24d18b_c8b22737
PS12, Line 132: /* SMM can reference smm_board_info for board-specific information passed from mainboard. */
line over 96 characters
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Change subject: cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
......................................................................
Patch Set 12:
(2 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/49460/comment/b058ce61_4c9a2a74
PS9, Line 16: for SMM.
> I couldn't find any discussion about this issue. Sorry if I just […]
Yes it's too much time for every SMI, but if only once it seems acceptable to me.
Patchset:
PS9:
> I don't understand why OVERRIDE_CONSOLE_LOGLEVEL is […]
At the beginning I tried to build vpd driver into SMM but saw build errors related to init_vpd_rdevs_from_cbmem(), so I didn't continue that path.., but in my opinion except adding the vpd driver to SMM could be less ideal, if only reading VPD once and cached in SMM it seems acceptable to me.
I updated according to your second option "Use a generic mechanism to pass board-specific information", hope that I understand correctly.
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Change subject: mb/facebook/fbg1701/Kconfig: Remove TPM_INIT
......................................................................
mb/facebook/fbg1701/Kconfig: Remove TPM_INIT
TPM_INIT needs to be enabled for measured boot only configuration.
This is corrected in CB:52050.
Remove TPM_INIT.
BUG = NA
TEST = Boot possible combinations of VBOOT, measured boot and vendorcode
security.
Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com>
Change-Id: I91bde691d445d4210429c928e90e16653092f1cb
---
M src/mainboard/facebook/fbg1701/Kconfig
1 file changed, 0 insertions(+), 4 deletions(-)
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Hello build bot (Jenkins), Marc Jones, Patrick Rudolph, Jonathan Zhang, Rocky Phagura, Jingle Hsu, Angel Pons, Arthur Heymans, Morgan Jang,
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#11).
Change subject: cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
......................................................................
cpu/x86/smm: Add smm_board_info for SMM that can be set from mainboard
This u32 smm_board_info is an optional per mainboard defined data that
mainboard can set the value and pass to SMM. The reason is that getting
certain data that requires searching from flash VPD or CMOS is not very
ideal to be done in SMM.
One use case is that mainboard can pass SMM console log level via this
variable and in SMM it can be referenced in get_console_loglevel()
override function directly.
Tested=On OCP Delta Lake, verified SMM log level can be overridden.
Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
---
M src/cpu/x86/smm/smm_module_handler.c
M src/cpu/x86/smm/smm_module_loader.c
M src/cpu/x86/smm/smm_module_loaderv2.c
M src/include/cpu/x86/smm.h
4 files changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/49460/11
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Change subject: cpu/x86/smm: Add smm_board_info for SMM that the value can be set from mainboard
......................................................................
Patch Set 10:
(1 comment)
File src/cpu/x86/smm/smm_module_handler.c:
https://review.coreboot.org/c/coreboot/+/49460/comment/9de85bd3_7ea6ac62
PS10, Line 132: /* SMM can reference smm_board_info for board-specific information passed from mainboard. */
line over 96 characters
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I'd like you to reexamine a change. Please visit
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to look at the new patch set (#10).
Change subject: cpu/x86/smm: Add smm_board_info for SMM that the value can be set from mainboard
......................................................................
cpu/x86/smm: Add smm_board_info for SMM that the value can be set from mainboard
This u32 smm_board_info is an optional per mainboard defined data that mainboard
can set the value and pass to SMM. The reason is that getting certain data that
requires searching from flash VPD or CMOS is not very ideal to be done in SMM.
One use case is that mainboard can pass SMM console log level via this variable and
in SMM it can be referenced in get_console_loglevel() override function directly.
Tested=On OCP Delta Lake, verified SMM log level can be overridden.
Change-Id: I81722a4f1bf75ec942cc06e403ad702dfe938e71
Signed-off-by: Johnny Lin <johnny_lin(a)wiwynn.com>
---
M src/cpu/x86/smm/smm_module_handler.c
M src/cpu/x86/smm/smm_module_loader.c
M src/cpu/x86/smm/smm_module_loaderv2.c
M src/include/cpu/x86/smm.h
4 files changed, 16 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/49460/10
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Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52128 )
Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
......................................................................
mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
ASSERTION ERROR occurs when reading MRC if VBOOT is enabled.
MRC is loaded in early stage of ROMSTAGE. There is not space available
for vboot workbuffer. CBMEM can not be used since memory init is not
executed. SPI is too small for _vboot2_work buffer.
When VBOOT is enabled, disable_saved_data is set disabling loading MRC
data.
BUG = N/A
TEST = Build and boot facebook FBG1701 with VBOOT enabled and disabled.
Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com>
Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93
---
M src/mainboard/facebook/fbg1701/romstage.c
1 file changed, 3 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/52128/1
diff --git a/src/mainboard/facebook/fbg1701/romstage.c b/src/mainboard/facebook/fbg1701/romstage.c
index fd005a6..609eea5 100644
--- a/src/mainboard/facebook/fbg1701/romstage.c
+++ b/src/mainboard/facebook/fbg1701/romstage.c
@@ -33,6 +33,9 @@
die("spd.bin not found\n");
memory_params->PcdMemChannel0Config = 1; /* Memory down */
memory_params->PcdMemChannel1Config = 2; /* Disabled */
+
+ if (CONFIG_VBOOT)
+ params->disable_saved_data = 1;
}
void mainboard_after_memory_init(void)
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Change subject: mb/hp/280_g2/romstage.c: Correct CaVrefConfig setting
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/52110/comment/c943dd2b_d91b799a
PS1, Line 9: With DDR4, CA Vref goes to channel 0, and CH1 Vref goes to channel 1.
> Sorry, I do not fully grasp the explanation. […]
From the KabylakeFspBinPkg FspmUpd.h header:
/** Offset 0x0093 - VREF_CA
CA Vref routing: board-dependent
0: VREF_CA goes to both CH_A and CH_B,
1: VREF_CA to CH_A and VREF_DQ_A to CH_B,
2: VREF_CA to CH_A and VREF_DQ_B to CH_B
**/
UINT8 CaVrefConfig;
The Skylake memory controller has two channels and three Vref circuits: VREF_DQ_A, VREF_DQ_B, VREF_CA. CH_A and CH_B are channel 0 and channel 1, respectively.
Generally, boards using DDR3 or LPDDR3 use the VREF_DQ_A and VREF_DQ_B circuits to control write Vref on channel 0 and channel 1, respectively. The VREF_CA circuit is used to control CA Vref for both channels. This corresponds to FSP setting 0.
With DDR4, write Vref is configured through Mode Register 6 of the DRAM, so the VREF_DQ_A and VREF_DQ_B circuits are no longer used for write Vref. It is thus possible to repurpose one of the VREF_DQ circuits in order to have per-channel control of CA Vref.
About DDR4, the SKL-S PDG (Platform Design Guide) recommends using the VREF_CA circuit to control CA Vref on channel 0, and the VREF_DQ_B circuit to control CA Vref on channel 1. This is to simplify routing the Vref signal from the processor to the DRAM, which eases the task of mainboard designers. This corresponds to FSP setting 2.
However, one of the Skylake RVPs (Reference Validation Platforms) uses the VREF_DQ_A circuit to control CA Vref on channel 1 (I guess Intel engineers then realized that using the VREF_DQ_B circuit eases routing the traces on the mainboard). This corresponds to FSP setting 1.
This picture of the HP 280 G2 schematics shows which Vref circuits are used: https://imgur.com/Bn5g5ps.png
On the left side, the DDR_VREF_CA pin corresponds to the VREF_CA circuit, and is wired to channel 0 (not shown). On the right side, the SA_DIMM_VREFDQ and SB_DIMM_VREFDQ pins correspond to the VREF_DQ_A and VREF_DQ_A circuits, respectively. Note how SA_DIMM_VREFDQ is only wired to TPVIA285 (a test-point), which means it is unused. SB_DIMM_VREFDQ is wired to channel 1 (not shown). Therefore, the correct `CaVrefConfig` setting for this mainboard is 2.
As to why FSP does not auto-detect this... I am not sure. While it is a mainboard-specific setting, using 2 if DDR4 is detected and 0 otherwise would work on all but the one RVP that uses config 1.
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Jakub Czapiga has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51804 )
Change subject: include/assert.h: Use mock_assert() for ENV_TEST targets
......................................................................
Patch Set 2:
(2 comments)
File src/include/assert.h:
https://review.coreboot.org/c/coreboot/+/51804/comment/588a3f3b_e4d43bcb
PS1, Line 12: #include <tests/test.h>
> Probably better to just unconditionally (re-)define the prototype for mock_assert() rather than cond […]
Definition of mock_asert() should not change so it seems to be good idea. Done :)
https://review.coreboot.org/c/coreboot/+/51804/comment/83d71c98_0f392cac
PS1, Line 67: #define assert(statement) mock_assert(statement, #statement, __FILE__, __LINE__)
> Please add this to all forms of assert (e.g. […]
ASSERT(), ASSERT_MSG() and BUG() have different input parameters. I do not think, that we should add another macro containing ENV_TEST and FATAL_ASSERTS. Only FATAL_ASSERTS part does not change, but ENV_TEST part is different in each macro.
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