coreboot-gerrit April 2021

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Change in coreboot[master]: src/*acpi: create acpi table for x2apic mode
by Wonkyu Kim (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Nico Huber, Furquan Shaikh, Subrata Banik, Raj Astekar, Patrick Rudolph. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51724 ) Change subject: src/*acpi: create acpi table for x2apic mode ...................................................................... Patch Set 10: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/51724 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9399d30b686b55d86806f5db4110bf4a80fe459b Gerrit-Change-Number: 51724 Gerrit-PatchSet: 10 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Apr 2021 14:49:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: *x86: Support x2apic mode
by Wonkyu Kim (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Nico Huber, Furquan Shaikh, Jamie Ryu, Paul Menzel, Angel Pons, Subrata Banik, Kyösti Mälkki, Raj Astekar, Aaron Durbin, Patrick Rudolph. Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51723 ) Change subject: *x86: Support x2apic mode ...................................................................... Patch Set 9: Code-Review+1 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/51723/comment/0d138f93_0777c101 PS8, Line 16: intel-64-architecture-x2apic-specification.html > Please make it one line and ignore a possible lint warning. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/51723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bb729b0521fb9dc38b7981014755daeaf9ca817 Gerrit-Change-Number: 51723 Gerrit-PatchSet: 9 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Tue, 06 Apr 2021 14:49:06 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: *x86: Support x2apic mode
by Wonkyu Kim (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Nico Huber, Furquan Shaikh, Jamie Ryu, Wonkyu Kim, Angel Pons, Subrata Banik, Kyösti Mälkki, Raj Astekar, Aaron Durbin, Patrick Rudolph. Hello build bot (Jenkins), Furquan Shaikh, Patrick Georgi, Ravishankar Sarawadi, Paul Menzel, Subrata Banik, Kyösti Mälkki, Aaron Durbin, Patrick Rudolph, Lance Zhao, Nico Huber, Jamie Ryu, Srinidhi N Kaushik, Raj Astekar, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51723 to look at the new patch set (#9). Change subject: *x86: Support x2apic mode ...................................................................... *x86: Support x2apic mode Implement x2apic mode as existing code only supports apic mode. Use info from LAPIC_BASE_MSR (LAPIC_BASE_MSR_X2APIC_MODE) to check if apic mode or x2apic mode and implement x2apic mode according to x2apic specfication. Reference: https://software.intel.com/content/www/us/en/develop/download/intel-64-arch… BUG=None BRANCH=None TEST=boot to OS and check apic mode cat /proc/cpuinfo | grep "apicid" ex) can see apicid bigger than 255 apicid : 256 apicid : 260 Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> Change-Id: I0bb729b0521fb9dc38b7981014755daeaf9ca817 --- M src/arch/x86/cpu.c M src/cpu/x86/lapic/lapic.c M src/cpu/x86/mp_init.c M src/cpu/x86/smm/smm_stub.S M src/include/cpu/x86/lapic.h M src/include/cpu/x86/lapic_def.h M src/include/cpu/x86/smm.h 7 files changed, 110 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/51723/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/51723 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0bb729b0521fb9dc38b7981014755daeaf9ca817 Gerrit-Change-Number: 51723 Gerrit-PatchSet: 9 Gerrit-Owner: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Furquan Shaikh <furquan(a)google.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Attention: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Attention: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Attention: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
by Arthur Heymans (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Frans Hendriks, Wim Vervoorn. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52128 ) Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52128/comment/adc5f6a6_7055b8e1 PS2, Line 9: ASSERTION ERROR > ASSERTION ERROR: file 'src/security/vboot/common.c', line 23 > > Do you expect this in commit message? Yes. Patchset: PS4: The proper fix would be to have the VBOOT related part of the MRC cache driver depend on !VBOOT_START_IN_ROMSTAGE. -- To view, visit https://review.coreboot.org/c/coreboot/+/52128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 Gerrit-Change-Number: 52128 Gerrit-PatchSet: 4 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 14:27:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Frans Hendriks <fhendriks(a)eltan.com> Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/facebook/fbg1701/Kconfig: Correct dependency
by Paul Menzel (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Frans Hendriks, Angel Pons, Arthur Heymans, Wim Vervoorn. Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52132 ) Change subject: mb/facebook/fbg1701/Kconfig: Correct dependency ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a Gerrit-Change-Number: 52132 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 14:12:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
by Frans Hendriks (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Arthur Heymans, Wim Vervoorn. Frans Hendriks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52128 ) Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ...................................................................... Patch Set 4: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52128/comment/35415455_a5f4c5b6 PS2, Line 9: ASSERTION ERROR > Can you point where the issue occurs? ASSERTION ERROR: file 'src/security/vboot/common.c', line 23 Do you expect this in commit message? https://review.coreboot.org/c/coreboot/+/52128/comment/29ac0c27_919bc687 PS2, Line 9: MRC > MRC_CACHE? RW_MRC_CACHE https://review.coreboot.org/c/coreboot/+/52128/comment/d2e788da_e632edc0 PS2, Line 11: space > CAR space Done https://review.coreboot.org/c/coreboot/+/52128/comment/8dee6a64_6dd6db38 PS2, Line 11: not > not enough Done https://review.coreboot.org/c/coreboot/+/52128/comment/aebc819d_2988b3c2 PS2, Line 13: SPI is too small for _vboot2_work buffer. > What does this mean? Mistake CAR is too small. -- To view, visit https://review.coreboot.org/c/coreboot/+/52128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 Gerrit-Change-Number: 52128 Gerrit-PatchSet: 4 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 13:48:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
by Frans Hendriks (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Wim Vervoorn. Hello build bot (Jenkins), Wim Vervoorn, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52128 to look at the new patch set (#4). Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ...................................................................... mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ASSERTION ERROR occurs when reading RW_MRC_CACHE if VBOOT is enabled. MRC cache is loaded in early stage of ROMSTAGE. There is not enough CAR space available for vboot workbuffer. CBMEM can not be used since memory init is not executed. When VBOOT is enabled, disable_saved_data is set disabling loading MRC data. BUG = N/A TEST = Build and boot facebook FBG1701 with VBOOT enabled and disabled. Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 --- M src/mainboard/facebook/fbg1701/romstage.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/52128/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/52128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 Gerrit-Change-Number: 52128 Gerrit-PatchSet: 4 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
by Frans Hendriks (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Frans Hendriks, Wim Vervoorn. Hello build bot (Jenkins), Wim Vervoorn, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52128 to look at the new patch set (#3). Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ...................................................................... mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ASSERTION ERROR occurs when reading RW_MRC_CACHE if VBOOT is enabled. MRC is loaded in early stage of ROMSTAGE. There is not space available for vboot workbuffer. CBMEM can not be used since memory init is not executed. Available flash size is too small for _vboot2_work buffer to start VBOOT in bootblock. When VBOOT is enabled, disable_saved_data is set disabling loading MRC data. BUG = N/A TEST = Build and boot facebook FBG1701 with VBOOT enabled and disabled. Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 --- M src/mainboard/facebook/fbg1701/romstage.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/52128/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 Gerrit-Change-Number: 52128 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
by Arthur Heymans (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Frans Hendriks, Wim Vervoorn. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52128 ) Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data ...................................................................... Patch Set 2: (5 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/52128/comment/bd8fec14_4f07921e PS2, Line 9: ASSERTION ERROR Can you point where the issue occurs? https://review.coreboot.org/c/coreboot/+/52128/comment/ff27ad66_a1510846 PS2, Line 9: MRC MRC_CACHE? https://review.coreboot.org/c/coreboot/+/52128/comment/80c83293_74626d05 PS2, Line 11: not not enough https://review.coreboot.org/c/coreboot/+/52128/comment/1efefc4d_2223d602 PS2, Line 11: space CAR space https://review.coreboot.org/c/coreboot/+/52128/comment/970e7ce0_e632d4ac PS2, Line 13: SPI is too small for _vboot2_work buffer. What does this mean? -- To view, visit https://review.coreboot.org/c/coreboot/+/52128 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93 Gerrit-Change-Number: 52128 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 13:32:53 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors
by Marshall Dawson (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Martin Roth. Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52114 ) Change subject: mb/google/guybrush: Add aux PCIe reset GPIOs to dxio descriptors ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52114 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6db21c79dcbd40c7a8c3f01c60b02882a3851278 Gerrit-Change-Number: 52114 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Tue, 06 Apr 2021 13:27:44 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2021