coreboot-gerrit April 2021

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Change in coreboot[master]: drivers/tpm/Kconfig: Rename TPM_INIT to TPM_INIT_RAMSTAGE
by Arthur Heymans (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Martin Roth, Frans Hendriks, Wim Vervoorn. Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52133 ) Change subject: drivers/tpm/Kconfig: Rename TPM_INIT to TPM_INIT_RAMSTAGE ...................................................................... drivers/tpm/Kconfig: Rename TPM_INIT to TPM_INIT_RAMSTAGE Rename the Kconfig parameter to more accurately reflect what it does. TPM can be initialised in a different stage too, for instance with VBOOT it is done in verstage. Change-Id: Ic0126b356e8430c04c7c9fd46d4e20022a648738 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/tpm/Kconfig M src/drivers/tpm/Makefile.inc M src/mainboard/facebook/fbg1701/Kconfig M src/mainboard/facebook/monolith/Kconfig 4 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/52133/1 diff --git a/src/drivers/tpm/Kconfig b/src/drivers/tpm/Kconfig index baf760b..96c855b 100644 --- a/src/drivers/tpm/Kconfig +++ b/src/drivers/tpm/Kconfig @@ -1,4 +1,4 @@ -config TPM_INIT +config TPM_INIT_RAMSTAGE bool default y if TPM1 || TPM2 depends on !VBOOT diff --git a/src/drivers/tpm/Makefile.inc b/src/drivers/tpm/Makefile.inc index af6e5a21..9833eb4 100644 --- a/src/drivers/tpm/Makefile.inc +++ b/src/drivers/tpm/Makefile.inc @@ -1,4 +1,4 @@ -ramstage-$(CONFIG_TPM_INIT) += tpm.c +ramstage-$(CONFIG_TPM_INIT_RAMSTAGE) += tpm.c ifeq ($(CONFIG_TPM_PPI),y) ramstage-$(CONFIG_HAVE_ACPI_TABLES) += ppi.c diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig index e01f979..1e6c32c 100644 --- a/src/mainboard/facebook/fbg1701/Kconfig +++ b/src/mainboard/facebook/fbg1701/Kconfig @@ -88,7 +88,7 @@ bool default y -config TPM_INIT +config TPM_INIT_RAMSTAGE bool "TPM Setup in RAMSTAGE" default n diff --git a/src/mainboard/facebook/monolith/Kconfig b/src/mainboard/facebook/monolith/Kconfig index ddbc27e..127cd50 100644 --- a/src/mainboard/facebook/monolith/Kconfig +++ b/src/mainboard/facebook/monolith/Kconfig @@ -68,7 +68,7 @@ int default 2 -config TPM_INIT +config TPM_INIT_RAMSTAGE bool default n -- To view, visit https://review.coreboot.org/c/coreboot/+/52133 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic0126b356e8430c04c7c9fd46d4e20022a648738 Gerrit-Change-Number: 52133 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: security/tpm: Add option to init TPM in bootblock
by Arthur Heymans (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Philipp Deppenwiese, Martin Roth, Christian Walter, Arthur Heymans. Hello Philipp Deppenwiese, build bot (Jenkins), Patrick Georgi, Martin Roth, Christian Walter, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/51923 to look at the new patch set (#3). Change subject: security/tpm: Add option to init TPM in bootblock ...................................................................... security/tpm: Add option to init TPM in bootblock When using a hardware assisted root of trust measurement, like Intel TXT/CBnT, the TPM init needs to happen inside the bootblock to form a proper chain of trust. Change-Id: Ifacba5d9ab19b47968b4f2ed5731ded4aac55022 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/pc80/tpm/Makefile.inc M src/drivers/tpm/Kconfig M src/lib/bootblock.c M src/security/intel/cbnt/Kconfig M src/security/tpm/Kconfig M src/security/tpm/tspi/tspi.c 6 files changed, 23 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/51923/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/51923 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifacba5d9ab19b47968b4f2ed5731ded4aac55022 Gerrit-Change-Number: 51923 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/facebook/fbg1701/Kconfig: Correct dependency
by Frans Hendriks (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Angel Pons, Arthur Heymans, Wim Vervoorn. Hello Angel Pons, Arthur Heymans, Wim Vervoorn, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52132 to look at the new patch set (#3). Change subject: mb/facebook/fbg1701/Kconfig: Correct dependency ...................................................................... mb/facebook/fbg1701/Kconfig: Correct dependency Config items depends on USE_VENDORCODE_ELTAN but are VBOOT specific. Correct dependency of these items on VENDORCODE_ELTAN_VBOOT. BUG = NA TEST = Boot facebook FBG-1701 with possible combinations of Eltan security. Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a --- M src/mainboard/facebook/fbg1701/Kconfig 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/52132/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a Gerrit-Change-Number: 52132 Gerrit-PatchSet: 3 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/facebook/fbg1701/Kconfig: Correct dependency
by Frans Hendriks (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Angel Pons, Arthur Heymans, Wim Vervoorn. Hello Angel Pons, Arthur Heymans, Wim Vervoorn, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52132 to look at the new patch set (#2). Change subject: mb/facebook/fbg1701/Kconfig: Correct dependency ...................................................................... mb/facebook/fbg1701/Kconfig: Correct dependency Config items depends on USE_VENDORCODE_ELTAN but are VBOOT specific. Correct dependency of these items on VENDORCODE_ELTAN_VBOOT. BUG = NA TEST = Boot facebook FBG-1701 with possible combinations of Eltan security. Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/mainboard/facebook/fbg1701/Kconfig 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/52132/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a Gerrit-Change-Number: 52132 Gerrit-PatchSet: 2 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/amd/picasso: Add entry for PSP NVRAM data & RPMC data
by Bao Zheng (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Jason Glenesk, Raul Rangel, ritul guru, Marshall Dawson, Zheng Bao, Felix Held. Bao Zheng has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51836 ) Change subject: soc/amd/picasso: Add entry for PSP NVRAM data & RPMC data ...................................................................... Patch Set 8: (1 comment) File src/soc/amd/picasso/fw.cfg: https://review.coreboot.org/c/coreboot/+/51836/comment/6f3395e9_8d498b37 PS8, Line 9: PSPNVRAM_FILE > i mean, will it be still part of cbfs? how it can be located in fmap.c? […] The CBFS itself is in fmap. FLASH@0xFF000000 16M { BIOS { RW_MRC_CACHE 64K FMAP 4K COREBOOT(CBFS) } } In ramstage, some cbfs call like cbfs_map can locate the cbfs module, not start from fmap header. -- To view, visit https://review.coreboot.org/c/coreboot/+/51836 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e0c9d651b7c544eabbed8acc0d26ae55960ca3f Gerrit-Change-Number: 51836 Gerrit-PatchSet: 8 Gerrit-Owner: Bao Zheng <fishbaozi(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Zheng Bao Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: ritul guru <ritul.bits(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Raul Rangel <rrangel(a)chromium.org> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Attention: Zheng Bao Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Tue, 06 Apr 2021 12:05:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Bao Zheng <fishbaozi(a)gmail.com> Comment-In-Reply-To: ritul guru <ritul.bits(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/facebook/fbg1701/Kconfig: Correct dependency
by Frans Hendriks (Code Review) 06 Apr '21

06 Apr '21

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52132 ) Change subject: mb/facebook/fbg1701/Kconfig: Correct dependency ...................................................................... mb/facebook/fbg1701/Kconfig: Correct dependency Config items depends on USE_VENDORCODE_ELTAN but are VBOOT specific. Correct dependency of these items on VENDORCODE_ELTAN_VBOOT. BUG = NA TEST = Boot facebook FBG-1701 with possible combinations of Eltan security. Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a --- M src/mainboard/facebook/fbg1701/Kconfig 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/52132/1 diff --git a/src/mainboard/facebook/fbg1701/Kconfig b/src/mainboard/facebook/fbg1701/Kconfig index e01f979..3a08ebb 100644 --- a/src/mainboard/facebook/fbg1701/Kconfig +++ b/src/mainboard/facebook/fbg1701/Kconfig @@ -76,7 +76,7 @@ default 0xfff9c000 config VENDORCODE_ELTAN_OEM_MANIFEST_LOC - depends on USE_VENDORCODE_ELTAN + depends on VENDORCODE_ELTAN_VBOOT hex default 0xFFFE9000 @@ -93,7 +93,7 @@ default n config VENDORCODE_ELTAN_VBOOT_SIGNED_MANIFEST - depends on USE_VENDORCODE_ELTAN + depends on VENDORCODE_ELTAN_VBOOT bool default y @@ -103,7 +103,7 @@ default "mainboard/facebook/fbg1701/manifest.h" config VENDORCODE_ELTAN_VBOOT_KEY_LOCATION - depends on USE_VENDORCODE_ELTAN + depends on VENDORCODE_ELTAN_VBOOT hex default 0xFFFF9C00 -- To view, visit https://review.coreboot.org/c/coreboot/+/52132 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Icd1c3e5c70ca562190308752f45aac734826649a Gerrit-Change-Number: 52132 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: sc7280: clk: Add clock driver
by Ravi Kumar Bokka (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Shelley Chen, Ravi kumar, Taniya Das, Paul Menzel, Julius Werner. Ravi Kumar Bokka has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/50580 ) Change subject: sc7280: clk: Add clock driver ...................................................................... Patch Set 26: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/50580/comment/aa308956_5929fcd6 PS24, Line 7: sc7280: clk: Add clock driver in coreboot > Pleas remove *in coreboot* as it’s the coreboot project. Ack https://review.coreboot.org/c/coreboot/+/50580/comment/a21a41ba_577b52fb PS24, Line 10: > Tested how? build-tested is valid. The whole patch-train has been tested on QC hardware and does boot to linux kernel login on console. Commit Message: https://review.coreboot.org/c/coreboot/+/50580/comment/7d46749b_7fdbe5fc PS25, Line 7: in coreboot > redundant Ack -- To view, visit https://review.coreboot.org/c/coreboot/+/50580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I590a93cda0d6eccb51b54692b620d43ccacede77 Gerrit-Change-Number: 50580 Gerrit-PatchSet: 26 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Taniya Das <tdas(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Taniya Das <tdas(a)codeaurora.org> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 06 Apr 2021 11:56:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

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Change in coreboot[master]: sc7280: Enable bootblock compression
by Ravi kumar (Code Review) 06 Apr '21

06 Apr '21

Ravi kumar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52131 ) Change subject: sc7280: Enable bootblock compression ...................................................................... sc7280: Enable bootblock compression This patch enables bootblock compression on SC7280. In my tests, that makes it boot roughly 10ms faster (which isn't much, but... might as well take it). Ref link: https://review.coreboot.org/c/coreboot/+/45855 Change-Id: I3564a7e531d769c8df16a1592ea98133d83b07b0 Signed-off-by: Ravi Kumar Bokka <rbokka(a)codeaurora.org> --- M src/soc/qualcomm/sc7280/Kconfig M src/soc/qualcomm/sc7280/Makefile.inc M src/soc/qualcomm/sc7280/bootblock.c A src/soc/qualcomm/sc7280/decompressor.c M src/soc/qualcomm/sc7280/memlayout.ld 5 files changed, 14 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/52131/1 diff --git a/src/soc/qualcomm/sc7280/Kconfig b/src/soc/qualcomm/sc7280/Kconfig index a6dbde9..f182e9d 100644 --- a/src/soc/qualcomm/sc7280/Kconfig +++ b/src/soc/qualcomm/sc7280/Kconfig @@ -16,6 +16,7 @@ select HAS_RECOVERY_MRC_CACHE select HAVE_UART_SPECIAL select BOOTBLOCK_CONSOLE + select COMPRESS_BOOTBLOCK if SOC_QUALCOMM_SC7280 diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc index c620fcc..d98065d 100644 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ b/src/soc/qualcomm/sc7280/Makefile.inc @@ -1,5 +1,8 @@ ifeq ($(CONFIG_SOC_QUALCOMM_SC7280),y) +decompressor-y += decompressor.c +decompressor-y += mmu.c +decompressor-y += ../common/timer.c all-y += ../common/timer.c all-y += spi.c diff --git a/src/soc/qualcomm/sc7280/bootblock.c b/src/soc/qualcomm/sc7280/bootblock.c index 511eaae..cfeb6f9 100644 --- a/src/soc/qualcomm/sc7280/bootblock.c +++ b/src/soc/qualcomm/sc7280/bootblock.c @@ -2,14 +2,12 @@ #include <bootblock_common.h> #include <soc/clock.h> -#include <soc/mmu.h> #include <soc/qspi.h> #include <soc/qupv3_config.h> void bootblock_soc_init(void) { clock_init(); - sc7280_mmu_init(); quadspi_init(37500 * KHz); qupv3_fw_init(); } diff --git a/src/soc/qualcomm/sc7280/decompressor.c b/src/soc/qualcomm/sc7280/decompressor.c new file mode 100644 index 0000000..3108b04 --- /dev/null +++ b/src/soc/qualcomm/sc7280/decompressor.c @@ -0,0 +1,9 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <bootblock_common.h> +#include <soc/mmu.h> + +void decompressor_soc_init(void) +{ + sc7280_mmu_init(); +} diff --git a/src/soc/qualcomm/sc7280/memlayout.ld b/src/soc/qualcomm/sc7280/memlayout.ld index faae123..dbe8aee 100644 --- a/src/soc/qualcomm/sc7280/memlayout.ld +++ b/src/soc/qualcomm/sc7280/memlayout.ld @@ -25,7 +25,7 @@ AOPSRAM_END(0x0B100000) SSRAM_START(0x14680000) - OVERLAP_VERSTAGE_ROMSTAGE(0x14680000, 100K) + OVERLAP_DECOMPRESSOR_VERSTAGE_ROMSTAGE(0x14680000, 100K) REGION(qcsdi, 0x14699000, 52K, 4K) SSRAM_END(0x146AB000) -- To view, visit https://review.coreboot.org/c/coreboot/+/52131 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3564a7e531d769c8df16a1592ea98133d83b07b0 Gerrit-Change-Number: 52131 Gerrit-PatchSet: 1 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: sc7280: clk: Add clock driver
by Ravi kumar (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Shelley Chen, Ravi kumar, Taniya Das, Julius Werner. Hello Shelley Chen, build bot (Jenkins), Taniya Das, Julius Werner, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/50580 to look at the new patch set (#26). Change subject: sc7280: clk: Add clock driver ...................................................................... sc7280: clk: Add clock driver Add support for clock driver on SC7280. Change-Id: I590a93cda0d6eccb51b54692b620d43ccacede77 Signed-off-by: Taniya Das <tdas(a)codeaurora.org> --- M src/soc/qualcomm/sc7280/bootblock.c A src/soc/qualcomm/sc7280/clock.c M src/soc/qualcomm/sc7280/include/soc/addressmap.h A src/soc/qualcomm/sc7280/include/soc/clock.h 4 files changed, 861 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/50580/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/50580 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I590a93cda0d6eccb51b54692b620d43ccacede77 Gerrit-Change-Number: 50580 Gerrit-PatchSet: 26 Gerrit-Owner: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Taniya Das <tdas(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Taniya Das <tdas(a)codeaurora.org> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/qualcomm: move code to common
by Ravi kumar (Code Review) 06 Apr '21

06 Apr '21

Attention is currently required from: Ravi kumar, Martin Roth, Paul Menzel, Julius Werner, mturney mturney. Ravi kumar has uploaded a new patch set (#8) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/51758 ) Change subject: soc/qualcomm: move code to common ...................................................................... soc/qualcomm: move code to common This commit includes makefile cleanup to exclude common source file compilation in each stage by using all-y flag. BUG=b:182963902 TEST=trogdor validated on limozeen Change-Id: I48464567974a0729c1c6b6157bcce4fac39a8b38 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/soc/qualcomm/common/include/soc/symbols_common.h M src/soc/qualcomm/common/qclib.c R src/soc/qualcomm/common/timer.c M src/soc/qualcomm/qcs405/Makefile.inc M src/soc/qualcomm/sc7180/Makefile.inc D src/soc/qualcomm/sc7180/qclib.c D src/soc/qualcomm/sc7180/timer.c 7 files changed, 39 insertions(+), 114 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/51758/8 -- To view, visit https://review.coreboot.org/c/coreboot/+/51758 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I48464567974a0729c1c6b6157bcce4fac39a8b38 Gerrit-Change-Number: 51758 Gerrit-PatchSet: 8 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravi Kumar Bokka <c_rbokka(a)qualcomm.corp-partner.google.com> Gerrit-Attention: Ravi kumar <rbokka(a)codeaurora.org> Gerrit-Attention: Martin Roth <martinroth(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: mturney mturney <mturney(a)codeaurora.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit April 2021