Change in coreboot[master]: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data

[Frans Hendriks (Code Review)]

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/52128 )

Change subject: mb/faceboot/fbg1701/romstage.c: Set disable_saved_data
......................................................................

mb/faceboot/fbg1701/romstage.c: Set disable_saved_data

ASSERTION ERROR occurs when reading MRC if VBOOT is enabled.

MRC is loaded in early stage of ROMSTAGE. There is not space available
for vboot workbuffer. CBMEM can not be used since memory init is not
executed. SPI is too small for _vboot2_work buffer.
When VBOOT is enabled, disable_saved_data is set disabling loading MRC
data.

BUG = N/A
TEST = Build and boot facebook FBG1701 with VBOOT enabled and disabled.

Signed-off-by: Frans Hendriks 
Change-Id: Icfedfa82e746626f35e6f1d426a4de768c594b93
---
M src/mainboard/facebook/fbg1701/romstage.c
1 file changed, 3 insertions(+), 0 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/52128/1

diff --git a/src/mainboard/facebook/fbg1701/romstage.c b/src/mainboard/facebook/fbg1701/romstage.c
index fd005a6..609eea5 100644
--- a/src/mainboard/facebook/fbg1701/romstage.c
+++ b/src/mainboard/facebook/fbg1701/romstage.c
@@ -33,6 +33,9 @@
    	die("spd.bin not found\n");
    memory_params->PcdMemChannel0Config = 1; /* Memory down */
    memory_params->PcdMemChannel1Config = 2; /* Disabled */
+
+	if (CONFIG_VBOOT)
+		params->disable_saved_data = 1;
 }

void mainboard_after_memory_init(void)