coreboot-gerrit April 2021

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Change in coreboot[master]: include/assert.h: Use mock_assert() for ENV_TEST targets
by Paul Fagerburg (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: Jakub Czapiga, Julius Werner, Jan Dabros. Paul Fagerburg has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/51804 ) Change subject: include/assert.h: Use mock_assert() for ENV_TEST targets ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/51804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5e8dd1b198ee6fab61e2be3f92baf1178f79bf18 Gerrit-Change-Number: 51804 Gerrit-PatchSet: 4 Gerrit-Owner: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Reviewer: Jan Dabros <jsd(a)semihalf.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Jakub Czapiga <jacz(a)semihalf.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Jan Dabros <jsd(a)semihalf.com> Gerrit-Comment-Date: Wed, 07 Apr 2021 16:15:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/bilby: Enable postcode on port 0x80
by Felix Held (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: ritul guru. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52016 ) Change subject: mb/amd/bilby: Enable postcode on port 0x80 ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/52016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Gerrit-Change-Number: 52016 Gerrit-PatchSet: 5 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Comment-Date: Wed, 07 Apr 2021 16:09:32 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/bilby: Enable postcode on port 0x80
by ritul guru (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: ritul guru, Felix Held. Hello build bot (Jenkins), Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52016 to look at the new patch set (#5). Change subject: mb/amd/bilby: Enable postcode on port 0x80 ...................................................................... mb/amd/bilby: Enable postcode on port 0x80 selecting SOC_AMD_COMMON_BLOCK_USE_ESPI will disable the lpc decodes, so not selecting that keeps the lpc decodes. Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> --- M src/mainboard/amd/bilby/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/52016/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/52016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Gerrit-Change-Number: 52016 Gerrit-PatchSet: 5 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/amd/bilby: Enable postcode on port 0x80
by build bot (Jenkins) (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: ritul guru, Felix Held. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52016 ) Change subject: mb/amd/bilby: Enable postcode on port 0x80 ...................................................................... Patch Set 4: (1 comment) File src/mainboard/amd/bilby/port_descriptors.c: https://review.coreboot.org/c/coreboot/+/52016/comment/136d5b08_3d110dbe PS4, Line 72: const fsp_dxio_descriptor **dxio_descs, size_t *dxio_num, need consistent spacing around '*' (ctx:WxO) -- To view, visit https://review.coreboot.org/c/coreboot/+/52016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Gerrit-Change-Number: 52016 Gerrit-PatchSet: 4 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Wed, 07 Apr 2021 16:07:17 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/amd/bilby: Enable postcode on port 0x80
by ritul guru (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: ritul guru, Felix Held. Hello build bot (Jenkins), Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52016 to look at the new patch set (#4). Change subject: mb/amd/bilby: Enable postcode on port 0x80 ...................................................................... mb/amd/bilby: Enable postcode on port 0x80 selecting SOC_AMD_COMMON_BLOCK_USE_ESPI will disable the lpc decodes, so not selecting that keeps the lpc decodes. Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> --- M src/mainboard/amd/bilby/Kconfig M src/mainboard/amd/bilby/early_gpio.c M src/mainboard/amd/bilby/port_descriptors.c 3 files changed, 3 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/52016/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/52016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Gerrit-Change-Number: 52016 Gerrit-PatchSet: 4 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/amd/bilby: Enable postcode on port 0x80
by ritul guru (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: ritul guru, Felix Held. Hello build bot (Jenkins), Marshall Dawson, Felix Held, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/52016 to look at the new patch set (#3). Change subject: mb/amd/bilby: Enable postcode on port 0x80 ...................................................................... mb/amd/bilby: Enable postcode on port 0x80 Only few initial postcodes gets displayed on port 0x80 via LPC bus on Bilby, removing ESPI as not used in Bilby, to display rest of the postcodes. Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Signed-off-by: Ritul Guru <ritul.bits(a)gmail.com> --- M src/mainboard/amd/bilby/Kconfig 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/52016/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/52016 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I03a8d4b804cee205b9e06b00e2e5a442452f8f86 Gerrit-Change-Number: 52016 Gerrit-PatchSet: 3 Gerrit-Owner: ritul guru <ritul.bits(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: ritul guru <ritul.bits(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel/xeon_sp: Set PAM0123 lock
by Jay Talbott (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: Marc Jones, Jonathan Zhang, Stefan Reinauer, Patrick Rudolph. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52165 ) Change subject: soc/intel/xeon_sp: Set PAM0123 lock ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52165 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3cdb7fc08eb903d799d585c56107de92f034b186 Gerrit-Change-Number: 52165 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Apr 2021 15:42:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp: Set PCIE secure register lock
by Jay Talbott (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: Marc Jones, Jonathan Zhang, Stefan Reinauer, Patrick Rudolph. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52164 ) Change subject: soc/intel/xeon_sp: Set PCIE secure register lock ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52164 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifa5bfb2824477b76ba34c3dc0588311f6c320092 Gerrit-Change-Number: 52164 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Apr 2021 15:40:45 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/common/block/smbus: Lock TCO base
by Jay Talbott (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: Marc Jones, Jonathan Zhang, Stefan Reinauer, Patrick Rudolph. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52163 ) Change subject: soc/intel/common/block/smbus: Lock TCO base ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52163 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifdeae9c65e6694a36c9d1d609904a1daf181bdb1 Gerrit-Change-Number: 52163 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Apr 2021 15:37:38 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/xeon_sp: Set SATA REGLOCKs
by Jay Talbott (Code Review) 07 Apr '21

07 Apr '21

Attention is currently required from: Marc Jones, Jonathan Zhang, Stefan Reinauer, Patrick Rudolph. Jay Talbott has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/52162 ) Change subject: soc/intel/xeon_sp: Set SATA REGLOCKs ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/52162 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I90e6d0e3b5a38bcd5392e26cbbb6dc4aa6a8304b Gerrit-Change-Number: 52162 Gerrit-PatchSet: 1 Gerrit-Owner: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Jay Talbott <JayTalbott(a)sysproconsulting.com> Gerrit-Reviewer: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Attention: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-Attention: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Comment-Date: Wed, 07 Apr 2021 15:35:56 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2021