coreboot-gerrit January 2021

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Change in coreboot[master]: sb,soc/intel: Remove redundant GNVS check
by Kyösti Mälkki (Code Review) 10 Jan '21

10 Jan '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/48700 ) Change subject: sb,soc/intel: Remove redundant GNVS check ...................................................................... sb,soc/intel: Remove redundant GNVS check With gnvs_ptr assigned in SMM module loader already, gnvs is always non-NULL on entry to SMI handler. For !SMM_TSEG GNVS is not available for SMI handler. Change-Id: Id5dbfa6089055ce14fd24fcb059714b845483617 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/soc/intel/broadwell/pch/smihandler.c M src/soc/intel/common/block/smm/smitraphandler.c M src/southbridge/intel/bd82x6x/smihandler.c M src/southbridge/intel/i82801gx/smihandler.c M src/southbridge/intel/i82801ix/smihandler.c M src/southbridge/intel/i82801jx/smihandler.c M src/southbridge/intel/ibexpeak/smihandler.c M src/southbridge/intel/lynxpoint/smihandler.c 8 files changed, 8 insertions(+), 13 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/48700/1 diff --git a/src/soc/intel/broadwell/pch/smihandler.c b/src/soc/intel/broadwell/pch/smihandler.c index 5ed52d8..d3138e9 100644 --- a/src/soc/intel/broadwell/pch/smihandler.c +++ b/src/soc/intel/broadwell/pch/smihandler.c @@ -443,7 +443,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } diff --git a/src/soc/intel/common/block/smm/smitraphandler.c b/src/soc/intel/common/block/smm/smitraphandler.c index 99825f1..c6e28af 100644 --- a/src/soc/intel/common/block/smm/smitraphandler.c +++ b/src/soc/intel/common/block/smm/smitraphandler.c @@ -75,7 +75,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); return; } diff --git a/src/southbridge/intel/bd82x6x/smihandler.c b/src/southbridge/intel/bd82x6x/smihandler.c index 1a9e5b4..2f174da 100644 --- a/src/southbridge/intel/bd82x6x/smihandler.c +++ b/src/southbridge/intel/bd82x6x/smihandler.c @@ -144,7 +144,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } diff --git a/src/southbridge/intel/i82801gx/smihandler.c b/src/southbridge/intel/i82801gx/smihandler.c index 03480a7..ab6b9d0 100644 --- a/src/southbridge/intel/i82801gx/smihandler.c +++ b/src/southbridge/intel/i82801gx/smihandler.c @@ -55,7 +55,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } diff --git a/src/southbridge/intel/i82801ix/smihandler.c b/src/southbridge/intel/i82801ix/smihandler.c index 046cc2b..8260f0a 100644 --- a/src/southbridge/intel/i82801ix/smihandler.c +++ b/src/southbridge/intel/i82801ix/smihandler.c @@ -9,11 +9,6 @@ #include "nvs.h" -#if !CONFIG(SMM_TSEG) -/* For qemu/x86-q35 to build properly. */ -struct global_nvs *gnvs; -#endif - int southbridge_io_trap_handler(int smif) { switch (smif) { @@ -49,7 +44,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (CONFIG(SMM_TSEG) && gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } diff --git a/src/southbridge/intel/i82801jx/smihandler.c b/src/southbridge/intel/i82801jx/smihandler.c index 6a6c5b4..7269b5c 100644 --- a/src/southbridge/intel/i82801jx/smihandler.c +++ b/src/southbridge/intel/i82801jx/smihandler.c @@ -49,7 +49,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } diff --git a/src/southbridge/intel/ibexpeak/smihandler.c b/src/southbridge/intel/ibexpeak/smihandler.c index e83a9de..337341f 100644 --- a/src/southbridge/intel/ibexpeak/smihandler.c +++ b/src/southbridge/intel/ibexpeak/smihandler.c @@ -109,7 +109,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } diff --git a/src/southbridge/intel/lynxpoint/smihandler.c b/src/southbridge/intel/lynxpoint/smihandler.c index bd44500..410fde1 100644 --- a/src/southbridge/intel/lynxpoint/smihandler.c +++ b/src/southbridge/intel/lynxpoint/smihandler.c @@ -417,7 +417,7 @@ /* IOTRAP(3) SMI function call */ if (IOTRAP(3)) { - if (gnvs && gnvs->smif) + if (gnvs->smif) io_trap_handler(gnvs->smif); // call function smif return; } -- To view, visit https://review.coreboot.org/c/coreboot/+/48700 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5dbfa6089055ce14fd24fcb059714b845483617 Gerrit-Change-Number: 48700 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP] skl: PEG for Optimus
by Benjamin Doron (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Benjamin Doron, Angel Pons. Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/40625 ) Change subject: [WIP] skl: PEG for Optimus ...................................................................... Patch Set 15: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/40625/comment/d0f5e877_56a55431 PS9, Line 7: PEG > PEG usually refers to the PCIe root port that is directly attached to the CPU (PCI device 00:01.0). If this is actually for the PCIe root ports on the PCH, I would be against calling it "PEG" to avoid confusion. What would you prefer? Note that this attempts to handle both situations, although I cannot test CPU PEG. > Note that SKL-U, SKL-Y and friends (e.g. KBL) do not have the PEG PCI devices (00:01.0) at all. > > (FWIW, note that PEG can be bifurcated, in which case additional PCI functions 1 and 2 can be present for PEG) Would a dGPU have function 2? I am aware that an HDA controller at function 1 is sometimes present. -- To view, visit https://review.coreboot.org/c/coreboot/+/40625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I107bd5f7c192b8ffc83de6d8f1ac314bb5dcbfbd Gerrit-Change-Number: 40625 Gerrit-PatchSet: 15 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Jan 2021 17:40:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] skl: PEG for Optimus
by Benjamin Doron (Code Review) 10 Jan '21

10 Jan '21

Hello build bot (Jenkins), Patrick Rudolph, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/40625 to look at the new patch set (#15). Change subject: [WIP] skl: PEG for Optimus ...................................................................... [WIP] skl: PEG for Optimus Creates PEG ACPI device for Optimus. Tested, nouveau driver works on an Acer Aspire VN7-572G (Skylake-U, Maxwell mobile) and `DRI_PRIME=1 glxinfo` reports the dGPU as renderer. Gaming is possible with the NVIDIA binary driver. Change-Id: I107bd5f7c192b8ffc83de6d8f1ac314bb5dcbfbd Signed-off-by: Benjamin Doron <benjamin.doron00(a)gmail.com> --- A src/soc/intel/skylake/acpi/peg.asl 1 file changed, 254 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/40625/15 -- To view, visit https://review.coreboot.org/c/coreboot/+/40625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I107bd5f7c192b8ffc83de6d8f1ac314bb5dcbfbd Gerrit-Change-Number: 40625 Gerrit-PatchSet: 15 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/purism/librem_bdw: Turn comments into code
by Angel Pons (Code Review) 10 Jan '21

10 Jan '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49285 ) Change subject: mb/purism/librem_bdw: Turn comments into code ...................................................................... mb/purism/librem_bdw: Turn comments into code Tested with BUILD_TIMELESS=1, Purism Librem 13 v1 does not change. Change-Id: Iec84fc2b43c23ea85f5cf13d9f0bace73e448c97 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/purism/librem_bdw/gpio.c 1 file changed, 95 insertions(+), 95 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/49285/1 diff --git a/src/mainboard/purism/librem_bdw/gpio.c b/src/mainboard/purism/librem_bdw/gpio.c index f0e3475..5c43cb3 100644 --- a/src/mainboard/purism/librem_bdw/gpio.c +++ b/src/mainboard/purism/librem_bdw/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct pch_lp_gpio_map mainboard_gpio_config[] = { - LP_GPIO_INPUT, /* 0 */ - LP_GPIO_INPUT, /* 1 */ - LP_GPIO_INPUT, /* 2 */ - LP_GPIO_INPUT, /* 3 */ - LP_GPIO_INPUT, /* 4 */ - LP_GPIO_INPUT, /* 5 */ - LP_GPIO_INPUT, /* 6 */ - LP_GPIO_INPUT, /* 7 */ - LP_GPIO_INPUT, /* 8 */ - LP_GPIO_INPUT, /* 9 */ - LP_GPIO_ACPI_SCI, /* 10 */ - LP_GPIO_INPUT, /* 11 */ - LP_GPIO_INPUT, /* 12 */ - LP_GPIO_INPUT, /* 13 */ - LP_GPIO_INPUT, /* 14 */ - LP_GPIO_INPUT, /* 15 */ - LP_GPIO_INPUT, /* 16 */ - LP_GPIO_INPUT, /* 17 */ - LP_GPIO_NATIVE, /* 18 */ - LP_GPIO_NATIVE, /* 19 */ - LP_GPIO_INPUT, /* 20 */ - LP_GPIO_INPUT, /* 21 */ - LP_GPIO_INPUT, /* 22 */ - LP_GPIO_INPUT, /* 23 */ - LP_GPIO_INPUT, /* 24 */ - LP_GPIO_INPUT, /* 25 */ - LP_GPIO_INPUT, /* 26 */ - LP_GPIO_INPUT, /* 27 */ - LP_GPIO_INPUT, /* 28 */ - LP_GPIO_NATIVE, /* 29 */ - LP_GPIO_NATIVE, /* 30 */ - LP_GPIO_NATIVE, /* 31 */ - LP_GPIO_INPUT, /* 32 */ - LP_GPIO_INPUT, /* 33 */ - LP_GPIO_INPUT, /* 34 */ - LP_GPIO_NATIVE, /* 35 */ - LP_GPIO_NATIVE, /* 36 */ - LP_GPIO_NATIVE, /* 37 */ - LP_GPIO_INPUT, /* 38 */ - LP_GPIO_NATIVE, /* 39 */ - LP_GPIO_NATIVE, /* 40 */ - LP_GPIO_INPUT, /* 41 */ - LP_GPIO_INPUT, /* 42 */ - LP_GPIO_INPUT, /* 43 */ - LP_GPIO_INPUT, /* 44 */ - LP_GPIO_INPUT, /* 45 */ - LP_GPIO_INPUT, /* 46 */ - LP_GPIO_INPUT, /* 47 */ - LP_GPIO_INPUT, /* 48 */ - LP_GPIO_INPUT, /* 49 */ - LP_GPIO_INPUT, /* 50 */ - LP_GPIO_INPUT, /* 51 */ - LP_GPIO_INPUT, /* 52 */ - LP_GPIO_INPUT, /* 53 */ - LP_GPIO_INPUT, /* 54 */ - LP_GPIO_INPUT, /* 55 */ - LP_GPIO_INPUT, /* 56 */ - LP_GPIO_INPUT, /* 57 */ - LP_GPIO_INPUT, /* 58 */ - LP_GPIO_INPUT, /* 59 */ - LP_GPIO_INPUT, /* 60 */ - LP_GPIO_NATIVE, /* 61 */ - LP_GPIO_NATIVE, /* 62 */ - LP_GPIO_NATIVE, /* 63 */ - LP_GPIO_INPUT, /* 64 */ - LP_GPIO_INPUT, /* 65 */ - LP_GPIO_INPUT, /* 66 */ - LP_GPIO_INPUT, /* 67 */ - LP_GPIO_INPUT, /* 68 */ - LP_GPIO_INPUT, /* 69 */ - LP_GPIO_INPUT, /* 70 */ - LP_GPIO_NATIVE, /* 71 */ - LP_GPIO_NATIVE, /* 72 */ - LP_GPIO_INPUT, /* 73 */ - LP_GPIO_NATIVE, /* 74 */ - LP_GPIO_NATIVE, /* 75 */ - LP_GPIO_NATIVE, /* 76 */ - LP_GPIO_INPUT, /* 77 */ - LP_GPIO_INPUT, /* 78 */ - LP_GPIO_INPUT, /* 79 */ - LP_GPIO_INPUT, /* 80 */ - LP_GPIO_NATIVE, /* 81 */ - LP_GPIO_NATIVE, /* 82 */ - LP_GPIO_INPUT, /* 83 */ - LP_GPIO_INPUT, /* 84 */ - LP_GPIO_INPUT, /* 85 */ - LP_GPIO_INPUT, /* 86 */ - LP_GPIO_INPUT, /* 87 */ - LP_GPIO_INPUT, /* 88 */ - LP_GPIO_INPUT, /* 89 */ - LP_GPIO_INPUT, /* 90 */ - LP_GPIO_INPUT, /* 91 */ - LP_GPIO_INPUT, /* 92 */ - LP_GPIO_INPUT, /* 93 */ - LP_GPIO_INPUT, /* 94 */ + [0] = LP_GPIO_INPUT, + [1] = LP_GPIO_INPUT, + [2] = LP_GPIO_INPUT, + [3] = LP_GPIO_INPUT, + [4] = LP_GPIO_INPUT, + [5] = LP_GPIO_INPUT, + [6] = LP_GPIO_INPUT, + [7] = LP_GPIO_INPUT, + [8] = LP_GPIO_INPUT, + [9] = LP_GPIO_INPUT, + [10] = LP_GPIO_ACPI_SCI, + [11] = LP_GPIO_INPUT, + [12] = LP_GPIO_INPUT, + [13] = LP_GPIO_INPUT, + [14] = LP_GPIO_INPUT, + [15] = LP_GPIO_INPUT, + [16] = LP_GPIO_INPUT, + [17] = LP_GPIO_INPUT, + [18] = LP_GPIO_NATIVE, + [19] = LP_GPIO_NATIVE, + [20] = LP_GPIO_INPUT, + [21] = LP_GPIO_INPUT, + [22] = LP_GPIO_INPUT, + [23] = LP_GPIO_INPUT, + [24] = LP_GPIO_INPUT, + [25] = LP_GPIO_INPUT, + [26] = LP_GPIO_INPUT, + [27] = LP_GPIO_INPUT, + [28] = LP_GPIO_INPUT, + [29] = LP_GPIO_NATIVE, + [30] = LP_GPIO_NATIVE, + [31] = LP_GPIO_NATIVE, + [32] = LP_GPIO_INPUT, + [33] = LP_GPIO_INPUT, + [34] = LP_GPIO_INPUT, + [35] = LP_GPIO_NATIVE, + [36] = LP_GPIO_NATIVE, + [37] = LP_GPIO_NATIVE, + [38] = LP_GPIO_INPUT, + [39] = LP_GPIO_NATIVE, + [40] = LP_GPIO_NATIVE, + [41] = LP_GPIO_INPUT, + [42] = LP_GPIO_INPUT, + [43] = LP_GPIO_INPUT, + [44] = LP_GPIO_INPUT, + [45] = LP_GPIO_INPUT, + [46] = LP_GPIO_INPUT, + [47] = LP_GPIO_INPUT, + [48] = LP_GPIO_INPUT, + [49] = LP_GPIO_INPUT, + [50] = LP_GPIO_INPUT, + [51] = LP_GPIO_INPUT, + [52] = LP_GPIO_INPUT, + [53] = LP_GPIO_INPUT, + [54] = LP_GPIO_INPUT, + [55] = LP_GPIO_INPUT, + [56] = LP_GPIO_INPUT, + [57] = LP_GPIO_INPUT, + [58] = LP_GPIO_INPUT, + [59] = LP_GPIO_INPUT, + [60] = LP_GPIO_INPUT, + [61] = LP_GPIO_NATIVE, + [62] = LP_GPIO_NATIVE, + [63] = LP_GPIO_NATIVE, + [64] = LP_GPIO_INPUT, + [65] = LP_GPIO_INPUT, + [66] = LP_GPIO_INPUT, + [67] = LP_GPIO_INPUT, + [68] = LP_GPIO_INPUT, + [69] = LP_GPIO_INPUT, + [70] = LP_GPIO_INPUT, + [71] = LP_GPIO_NATIVE, + [72] = LP_GPIO_NATIVE, + [73] = LP_GPIO_INPUT, + [74] = LP_GPIO_NATIVE, + [75] = LP_GPIO_NATIVE, + [76] = LP_GPIO_NATIVE, + [77] = LP_GPIO_INPUT, + [78] = LP_GPIO_INPUT, + [79] = LP_GPIO_INPUT, + [80] = LP_GPIO_INPUT, + [81] = LP_GPIO_NATIVE, + [82] = LP_GPIO_NATIVE, + [83] = LP_GPIO_INPUT, + [84] = LP_GPIO_INPUT, + [85] = LP_GPIO_INPUT, + [86] = LP_GPIO_INPUT, + [87] = LP_GPIO_INPUT, + [88] = LP_GPIO_INPUT, + [89] = LP_GPIO_INPUT, + [90] = LP_GPIO_INPUT, + [91] = LP_GPIO_INPUT, + [92] = LP_GPIO_INPUT, + [93] = LP_GPIO_INPUT, + [94] = LP_GPIO_INPUT, LP_GPIO_END }; -- To view, visit https://review.coreboot.org/c/coreboot/+/49285 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iec84fc2b43c23ea85f5cf13d9f0bace73e448c97 Gerrit-Change-Number: 49285 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/broadwell: Rename GPIO macros
by Angel Pons (Code Review) 10 Jan '21

10 Jan '21

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49283 ) Change subject: soc/intel/broadwell: Rename GPIO macros ...................................................................... Patch Set 1: (1 comment) File src/mainboard/purism/librem_bdw/gpio.c: https://review.coreboot.org/c/coreboot/+/49283/comment/8cba3047_7d0d3dc9 PS1, Line 5: const struct gpio_config mainboard_gpio_config[] = { Will clean up in a follow-up. -- To view, visit https://review.coreboot.org/c/coreboot/+/49283 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32566ac4df7175bb4ba3e1f7216aa36de2b821a1 Gerrit-Change-Number: 49283 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Sun, 10 Jan 2021 17:19:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/broadwell: Rename more GPIO things
by Angel Pons (Code Review) 10 Jan '21

10 Jan '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49284 ) Change subject: soc/intel/broadwell: Rename more GPIO things ...................................................................... soc/intel/broadwell: Rename more GPIO things Rename GPIO types, variables and functions to match Lynx Point code. Change-Id: I99e616a08ba731bf1e0f1cc5bee60563e2535420 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/auron/variants/auron_paine/gpio.c M src/mainboard/google/auron/variants/auron_yuna/gpio.c M src/mainboard/google/auron/variants/buddy/gpio.c M src/mainboard/google/auron/variants/gandof/gpio.c M src/mainboard/google/auron/variants/lulu/gpio.c M src/mainboard/google/auron/variants/samus/gpio.c M src/mainboard/google/jecht/variants/guado/gpio.c M src/mainboard/google/jecht/variants/jecht/gpio.c M src/mainboard/google/jecht/variants/rikku/gpio.c M src/mainboard/google/jecht/variants/tidus/gpio.c M src/mainboard/intel/wtm2/gpio.c M src/mainboard/purism/librem_bdw/gpio.c M src/soc/intel/broadwell/include/soc/gpio.h M src/soc/intel/broadwell/pch/gpio.c M src/soc/intel/broadwell/romstage.c 15 files changed, 19 insertions(+), 19 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/84/49284/1 diff --git a/src/mainboard/google/auron/variants/auron_paine/gpio.c b/src/mainboard/google/auron/variants/auron_paine/gpio.c index c7f2fa4..3251539 100644 --- a/src/mainboard/google/auron/variants/auron_paine/gpio.c +++ b/src/mainboard/google/auron/variants/auron_paine/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/auron/variants/auron_yuna/gpio.c b/src/mainboard/google/auron/variants/auron_yuna/gpio.c index c7f2fa4..3251539 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/gpio.c +++ b/src/mainboard/google/auron/variants/auron_yuna/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/auron/variants/buddy/gpio.c b/src/mainboard/google/auron/variants/buddy/gpio.c index ccea5f4..7bf19d9 100644 --- a/src/mainboard/google/auron/variants/buddy/gpio.c +++ b/src/mainboard/google/auron/variants/buddy/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/auron/variants/gandof/gpio.c b/src/mainboard/google/auron/variants/gandof/gpio.c index e982bbc..857905a 100644 --- a/src/mainboard/google/auron/variants/gandof/gpio.c +++ b/src/mainboard/google/auron/variants/gandof/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/auron/variants/lulu/gpio.c b/src/mainboard/google/auron/variants/lulu/gpio.c index e84b019..d81888b 100644 --- a/src/mainboard/google/auron/variants/lulu/gpio.c +++ b/src/mainboard/google/auron/variants/lulu/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/auron/variants/samus/gpio.c b/src/mainboard/google/auron/variants/samus/gpio.c index d0d18d7..0ddfa7d 100644 --- a/src/mainboard/google/auron/variants/samus/gpio.c +++ b/src/mainboard/google/auron/variants/samus/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/jecht/variants/guado/gpio.c b/src/mainboard/google/jecht/variants/guado/gpio.c index d4223e1..a7eaafd 100644 --- a/src/mainboard/google/jecht/variants/guado/gpio.c +++ b/src/mainboard/google/jecht/variants/guado/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/jecht/variants/jecht/gpio.c b/src/mainboard/google/jecht/variants/jecht/gpio.c index 541fbfc..554edb7 100644 --- a/src/mainboard/google/jecht/variants/jecht/gpio.c +++ b/src/mainboard/google/jecht/variants/jecht/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/jecht/variants/rikku/gpio.c b/src/mainboard/google/jecht/variants/rikku/gpio.c index d4223e1..a7eaafd 100644 --- a/src/mainboard/google/jecht/variants/rikku/gpio.c +++ b/src/mainboard/google/jecht/variants/rikku/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/google/jecht/variants/tidus/gpio.c b/src/mainboard/google/jecht/variants/tidus/gpio.c index 3dbc07e..82c4624 100644 --- a/src/mainboard/google/jecht/variants/tidus/gpio.c +++ b/src/mainboard/google/jecht/variants/tidus/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_UNUSED, /* 0: UNUSED */ LP_GPIO_UNUSED, /* 1: UNUSED */ LP_GPIO_UNUSED, /* 2: UNUSED */ diff --git a/src/mainboard/intel/wtm2/gpio.c b/src/mainboard/intel/wtm2/gpio.c index 987e36e..f922498 100644 --- a/src/mainboard/intel/wtm2/gpio.c +++ b/src/mainboard/intel/wtm2/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_NATIVE, /* 0: LPSS_UART1_RXD */ LP_GPIO_NATIVE, /* 1: LPSS_UART1_TXD */ LP_GPIO_NATIVE, /* 2: LPSS_UART1_RTS_N_R */ diff --git a/src/mainboard/purism/librem_bdw/gpio.c b/src/mainboard/purism/librem_bdw/gpio.c index e7cf560..f0e3475 100644 --- a/src/mainboard/purism/librem_bdw/gpio.c +++ b/src/mainboard/purism/librem_bdw/gpio.c @@ -2,7 +2,7 @@ #include <soc/gpio.h> -const struct gpio_config mainboard_gpio_config[] = { +const struct pch_lp_gpio_map mainboard_gpio_config[] = { LP_GPIO_INPUT, /* 0 */ LP_GPIO_INPUT, /* 1 */ LP_GPIO_INPUT, /* 2 */ diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h index bff7ee6..621c310 100644 --- a/src/soc/intel/broadwell/include/soc/gpio.h +++ b/src/soc/intel/broadwell/include/soc/gpio.h @@ -149,7 +149,7 @@ .owner = GPIO_OWNER_GPIO, \ .conf1 = GPIO_SENSE_DISABLE } -struct gpio_config { +struct pch_lp_gpio_map { u8 gpio; u32 conf0; u32 conf1; @@ -162,7 +162,7 @@ } __packed; /* Configure GPIOs with mainboard provided settings */ -void init_gpios(const struct gpio_config config[]); +void setup_pch_lp_gpios(const struct pch_lp_gpio_map map[]); /* Get GPIO pin value */ int get_gpio(int gpio_num); @@ -179,6 +179,6 @@ */ unsigned int get_gpios(const int *gpio_num_array); -extern const struct gpio_config mainboard_gpio_config[]; +extern const struct pch_lp_gpio_map mainboard_gpio_config[]; #endif diff --git a/src/soc/intel/broadwell/pch/gpio.c b/src/soc/intel/broadwell/pch/gpio.c index ff1f019..1a49f07 100644 --- a/src/soc/intel/broadwell/pch/gpio.c +++ b/src/soc/intel/broadwell/pch/gpio.c @@ -36,9 +36,9 @@ }; } -void init_gpios(const struct gpio_config config[]) +void setup_pch_lp_gpios(const struct pch_lp_gpio_map map[]) { - const struct gpio_config *entry; + const struct pch_lp_gpio_map *entry; u32 owner[3] = {0}; u32 route[3] = {0}; u32 irqen[3] = {0}; @@ -47,7 +47,7 @@ u16 pirq2apic = 0; int set, bit, gpio = 0; - for (entry = config; entry->conf0 != GPIO_LIST_END; entry++, gpio++) { + for (entry = map; entry->conf0 != GPIO_LIST_END; entry++, gpio++) { if (gpio > MAX_GPIO_NUMBER) break; diff --git a/src/soc/intel/broadwell/romstage.c b/src/soc/intel/broadwell/romstage.c index 2e5db76..75eb3e0 100644 --- a/src/soc/intel/broadwell/romstage.c +++ b/src/soc/intel/broadwell/romstage.c @@ -38,7 +38,7 @@ set_max_freq(); /* Initialize GPIOs */ - init_gpios(mainboard_gpio_config); + setup_pch_lp_gpios(mainboard_gpio_config); /* Fill in mainboard pei_date. */ mainboard_pre_raminit(&rp); -- To view, visit https://review.coreboot.org/c/coreboot/+/49284 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I99e616a08ba731bf1e0f1cc5bee60563e2535420 Gerrit-Change-Number: 49284 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

1 0

Change in coreboot[master]: soc/intel/broadwell: Rename GPIO macros
by Angel Pons (Code Review) 10 Jan '21

10 Jan '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49283 ) Change subject: soc/intel/broadwell: Rename GPIO macros ...................................................................... soc/intel/broadwell: Rename GPIO macros For consistency with Lynx Point, rename the GPIO macros. Change-Id: I32566ac4df7175bb4ba3e1f7216aa36de2b821a1 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/auron/variants/auron_paine/gpio.c M src/mainboard/google/auron/variants/auron_yuna/gpio.c M src/mainboard/google/auron/variants/buddy/gpio.c M src/mainboard/google/auron/variants/gandof/gpio.c M src/mainboard/google/auron/variants/lulu/gpio.c M src/mainboard/google/auron/variants/samus/gpio.c M src/mainboard/google/jecht/variants/guado/gpio.c M src/mainboard/google/jecht/variants/jecht/gpio.c M src/mainboard/google/jecht/variants/rikku/gpio.c M src/mainboard/google/jecht/variants/tidus/gpio.c M src/mainboard/intel/wtm2/gpio.c M src/mainboard/purism/librem_bdw/gpio.c M src/soc/intel/broadwell/include/soc/gpio.h 13 files changed, 1,165 insertions(+), 1,165 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/49283/1 diff --git a/src/mainboard/google/auron/variants/auron_paine/gpio.c b/src/mainboard/google/auron/variants/auron_paine/gpio.c index f2930e0..c7f2fa4 100644 --- a/src/mainboard/google/auron/variants/auron_paine/gpio.c +++ b/src/mainboard/google/auron/variants/auron_paine/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LTE_WAKE_L_Q */ - PCH_GPIO_INPUT, /* 9: RAM_ID1 */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ - PCH_GPIO_INPUT, /* 13: RAM_ID0 */ - PCH_GPIO_INPUT, /* 14: EC_IN_RW */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_UNUSED, /* 17: UNUSED */ - PCH_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_UNUSED, /* 20: UNUSED */ - PCH_GPIO_UNUSED, /* 21: UNUSED */ - PCH_GPIO_UNUSED, /* 22: UNUSED */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_UNUSED, /* 24: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ - PCH_GPIO_UNUSED, /* 26: UNUSED */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_UNUSED, /* 28: UNUSED */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_UNUSED, /* 41: UNUSED */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_UNUSED, /* 43: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ - PCH_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ - PCH_GPIO_INPUT, /* 47: RAM_ID2 */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_UNUSED, /* 50: UNUSED */ - PCH_GPIO_INPUT, /* 51: ALS_INT_L */ - PCH_GPIO_INPUT, /* 52: SIM_DET */ - PCH_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ - PCH_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_UNUSED, /* 56: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ - PCH_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LTE_WAKE_L_Q */ + LP_GPIO_INPUT, /* 9: RAM_ID1 */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ + LP_GPIO_INPUT, /* 13: RAM_ID0 */ + LP_GPIO_INPUT, /* 14: EC_IN_RW */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_UNUSED, /* 17: UNUSED */ + LP_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_UNUSED, /* 20: UNUSED */ + LP_GPIO_UNUSED, /* 21: UNUSED */ + LP_GPIO_UNUSED, /* 22: UNUSED */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_UNUSED, /* 24: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ + LP_GPIO_UNUSED, /* 26: UNUSED */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_UNUSED, /* 28: UNUSED */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_UNUSED, /* 41: UNUSED */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_UNUSED, /* 43: UNUSED */ + LP_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ + LP_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ + LP_GPIO_INPUT, /* 47: RAM_ID2 */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_UNUSED, /* 50: UNUSED */ + LP_GPIO_INPUT, /* 51: ALS_INT_L */ + LP_GPIO_INPUT, /* 52: SIM_DET */ + LP_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ + LP_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_UNUSED, /* 56: UNUSED */ + LP_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ + LP_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ + LP_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/auron/variants/auron_yuna/gpio.c b/src/mainboard/google/auron/variants/auron_yuna/gpio.c index f2930e0..c7f2fa4 100644 --- a/src/mainboard/google/auron/variants/auron_yuna/gpio.c +++ b/src/mainboard/google/auron/variants/auron_yuna/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LTE_WAKE_L_Q */ - PCH_GPIO_INPUT, /* 9: RAM_ID1 */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ - PCH_GPIO_INPUT, /* 13: RAM_ID0 */ - PCH_GPIO_INPUT, /* 14: EC_IN_RW */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_UNUSED, /* 17: UNUSED */ - PCH_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_UNUSED, /* 20: UNUSED */ - PCH_GPIO_UNUSED, /* 21: UNUSED */ - PCH_GPIO_UNUSED, /* 22: UNUSED */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_UNUSED, /* 24: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ - PCH_GPIO_UNUSED, /* 26: UNUSED */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_UNUSED, /* 28: UNUSED */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_UNUSED, /* 41: UNUSED */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_UNUSED, /* 43: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ - PCH_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ - PCH_GPIO_INPUT, /* 47: RAM_ID2 */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_UNUSED, /* 50: UNUSED */ - PCH_GPIO_INPUT, /* 51: ALS_INT_L */ - PCH_GPIO_INPUT, /* 52: SIM_DET */ - PCH_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ - PCH_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_UNUSED, /* 56: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ - PCH_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LTE_WAKE_L_Q */ + LP_GPIO_INPUT, /* 9: RAM_ID1 */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ + LP_GPIO_INPUT, /* 13: RAM_ID0 */ + LP_GPIO_INPUT, /* 14: EC_IN_RW */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_UNUSED, /* 17: UNUSED */ + LP_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_UNUSED, /* 20: UNUSED */ + LP_GPIO_UNUSED, /* 21: UNUSED */ + LP_GPIO_UNUSED, /* 22: UNUSED */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_UNUSED, /* 24: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ + LP_GPIO_UNUSED, /* 26: UNUSED */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_UNUSED, /* 28: UNUSED */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_UNUSED, /* 41: UNUSED */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_UNUSED, /* 43: UNUSED */ + LP_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ + LP_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ + LP_GPIO_INPUT, /* 47: RAM_ID2 */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_UNUSED, /* 50: UNUSED */ + LP_GPIO_INPUT, /* 51: ALS_INT_L */ + LP_GPIO_INPUT, /* 52: SIM_DET */ + LP_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ + LP_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_UNUSED, /* 56: UNUSED */ + LP_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ + LP_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ + LP_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/auron/variants/buddy/gpio.c b/src/mainboard/google/auron/variants/buddy/gpio.c index fcb63a4..ccea5f4 100644 --- a/src/mainboard/google/auron/variants/buddy/gpio.c +++ b/src/mainboard/google/auron/variants/buddy/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ - PCH_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: SMBALERT */ - PCH_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ - PCH_GPIO_OUT_HIGH, /* 13: BT_DISABLE_L */ - PCH_GPIO_INPUT, /* 14: EC_IN_RW */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ - PCH_GPIO_UNUSED, /* 18: UNUSED */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ - PCH_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ - PCH_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ - PCH_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ - PCH_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_UNUSED, /* 43: UNUSED */ - PCH_GPIO_UNUSED, /* 44: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ - PCH_GPIO_UNUSED, /* 46: UNUSED */ - PCH_GPIO_UNUSED, /* 47: UNUSED */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_PIRQ_INVERT, /* 53: CODEC_INT */ - PCH_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 56: USB_CHARGE_EN */ - PCH_GPIO_UNUSED, /* 57: UNUSED */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ - PCH_GPIO_NATIVE, /* 61: SUS_STAT# */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_UNUSED, /* 72: UNUSED */ - PCH_GPIO_UNUSED, /* 73: UNUSED */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ + LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: SMBALERT */ + LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ + LP_GPIO_OUT_HIGH, /* 13: BT_DISABLE_L */ + LP_GPIO_INPUT, /* 14: EC_IN_RW */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ + LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ + LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ + LP_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ + LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_UNUSED, /* 43: UNUSED */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ + LP_GPIO_UNUSED, /* 46: UNUSED */ + LP_GPIO_UNUSED, /* 47: UNUSED */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_PIRQ_INVERT, /* 53: CODEC_INT */ + LP_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_OUT_HIGH, /* 56: USB_CHARGE_EN */ + LP_GPIO_UNUSED, /* 57: UNUSED */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ + LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ + LP_GPIO_NATIVE, /* 61: SUS_STAT# */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/auron/variants/gandof/gpio.c b/src/mainboard/google/auron/variants/gandof/gpio.c index 5b7ed82..e982bbc 100644 --- a/src/mainboard/google/auron/variants/gandof/gpio.c +++ b/src/mainboard/google/auron/variants/gandof/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_UNUSED, /* 8: UNUSED */ - PCH_GPIO_INPUT, /* 9: RAM_ID1 */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ - PCH_GPIO_INPUT, /* 13: RAM_ID0 */ - PCH_GPIO_INPUT, /* 14: EC_IN_RW */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_UNUSED, /* 17: UNUSED */ - PCH_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_UNUSED, /* 20: UNUSED */ - PCH_GPIO_UNUSED, /* 21: UNUSED */ - PCH_GPIO_UNUSED, /* 22: UNUSED */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_UNUSED, /* 24: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ - PCH_GPIO_UNUSED, /* 26: UNUSED */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_UNUSED, /* 28: UNUSED */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_UNUSED, /* 41: UNUSED */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_UNUSED, /* 43: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ - PCH_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ - PCH_GPIO_INPUT, /* 47: RAM_ID2 */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_UNUSED, /* 50: UNUSED */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ - PCH_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_UNUSED, /* 56: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_UNUSED, /* 59: UNUSED */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ - PCH_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_UNUSED, /* 8: UNUSED */ + LP_GPIO_INPUT, /* 9: RAM_ID1 */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ + LP_GPIO_INPUT, /* 13: RAM_ID0 */ + LP_GPIO_INPUT, /* 14: EC_IN_RW */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_UNUSED, /* 17: UNUSED */ + LP_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_UNUSED, /* 20: UNUSED */ + LP_GPIO_UNUSED, /* 21: UNUSED */ + LP_GPIO_UNUSED, /* 22: UNUSED */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_UNUSED, /* 24: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ + LP_GPIO_UNUSED, /* 26: UNUSED */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_UNUSED, /* 28: UNUSED */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_UNUSED, /* 41: UNUSED */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_UNUSED, /* 43: UNUSED */ + LP_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ + LP_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ + LP_GPIO_INPUT, /* 47: RAM_ID2 */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_UNUSED, /* 50: UNUSED */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ + LP_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_UNUSED, /* 56: UNUSED */ + LP_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_UNUSED, /* 59: UNUSED */ + LP_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ + LP_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/auron/variants/lulu/gpio.c b/src/mainboard/google/auron/variants/lulu/gpio.c index b049bde..e84b019 100644 --- a/src/mainboard/google/auron/variants/lulu/gpio.c +++ b/src/mainboard/google/auron/variants/lulu/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_INPUT, /* 8: RAM_ID4 */ - PCH_GPIO_INPUT, /* 9: RAM_ID1 */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ - PCH_GPIO_INPUT, /* 13: RAM_ID0 */ - PCH_GPIO_INPUT, /* 14: EC_IN_RW */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_UNUSED, /* 17: UNUSED */ - PCH_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_UNUSED, /* 20: UNUSED */ - PCH_GPIO_UNUSED, /* 21: UNUSED */ - PCH_GPIO_UNUSED, /* 22: UNUSED */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_UNUSED, /* 24: UNUSED */ - PCH_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ - PCH_GPIO_UNUSED, /* 26: UNUSED */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_UNUSED, /* 28: UNUSED */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_UNUSED, /* 41: UNUSED */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_UNUSED, /* 43: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ - PCH_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ - PCH_GPIO_INPUT, /* 47: RAM_ID2 */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_UNUSED, /* 50: UNUSED */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ - PCH_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_UNUSED, /* 56: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_UNUSED, /* 59: UNUSED */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ - PCH_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_INPUT, /* 8: RAM_ID4 */ + LP_GPIO_INPUT, /* 9: RAM_ID1 */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 12: TRACKPAD_INT_L (WAKE) */ + LP_GPIO_INPUT, /* 13: RAM_ID0 */ + LP_GPIO_INPUT, /* 14: EC_IN_RW */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_UNUSED, /* 17: UNUSED */ + LP_GPIO_NATIVE, /* 18: PCIE_CLKREQ_WLAN# */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_UNUSED, /* 20: UNUSED */ + LP_GPIO_UNUSED, /* 21: UNUSED */ + LP_GPIO_UNUSED, /* 22: UNUSED */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_UNUSED, /* 24: UNUSED */ + LP_GPIO_INPUT_INVERT, /* 25: TOUCH_INT_L (WAKE) */ + LP_GPIO_UNUSED, /* 26: UNUSED */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_UNUSED, /* 28: UNUSED */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_UNUSED, /* 41: UNUSED */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_UNUSED, /* 43: UNUSED */ + LP_GPIO_OUT_HIGH, /* 44: PP3300_SSD_EN */ + LP_GPIO_OUT_HIGH, /* 45: PP3300_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: WLAN_DISABLE_L */ + LP_GPIO_INPUT, /* 47: RAM_ID2 */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_UNUSED, /* 50: UNUSED */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_PIRQ, /* 53: TRACKPAD_INT_DX */ + LP_GPIO_PIRQ, /* 54: TOUCH_INT_L_DX */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_UNUSED, /* 56: UNUSED */ + LP_GPIO_OUT_HIGH, /* 57: PP3300_CCD_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_UNUSED, /* 59: UNUSED */ + LP_GPIO_NATIVE, /* 60: NATIVE: SML0ALERT */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_NATIVE, /* 72: NATIVE: PCH_BATLOW# */ + LP_GPIO_NATIVE, /* 73: NATIVE: SMB1ALERT# */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/auron/variants/samus/gpio.c b/src/mainboard/google/auron/variants/samus/gpio.c index 12e9e64..d0d18d7 100644 --- a/src/mainboard/google/auron/variants/samus/gpio.c +++ b/src/mainboard/google/auron/variants/samus/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: PCH_LTE_WAKE_L */ - PCH_GPIO_INPUT_INVERT, /* 9: TRACKPAD_INT_L (WAKE) */ - PCH_GPIO_ACPI_SCI, /* 10: PCH_WLAN_WAKE_L */ - PCH_GPIO_UNUSED, /* 11: UNUSED */ - PCH_GPIO_UNUSED, /* 12: UNUSED */ - PCH_GPIO_PIRQ, /* 13: TRACKPAD_INT_L (PIRQL) */ - PCH_GPIO_PIRQ, /* 14: TOUCH_INT_L (PIRQM) */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_INPUT, /* 16: PCH_WP */ - PCH_GPIO_UNUSED, /* 17: UNUSED */ - PCH_GPIO_UNUSED, /* 18: UNUSED */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_NATIVE, /* 20: PCIE_WLAN_CLKREQ_L */ - PCH_GPIO_OUT_HIGH, /* 21: PP3300_SSD_EN */ - PCH_GPIO_UNUSED, /* 22: UNUSED */ - PCH_GPIO_OUT_LOW, /* 23: PP3300_AUTOBAHN_EN */ - PCH_GPIO_UNUSED, /* 24: UNUSED */ - PCH_GPIO_INPUT, /* 25: EC_IN_RW */ - PCH_GPIO_UNUSED, /* 26: UNUSED */ - PCH_GPIO_ACPI_SCI, /* 27: PCH_WAKE_L */ - PCH_GPIO_UNUSED, /* 28: UNUSED */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: ACOK_BUF */ - PCH_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ - PCH_GPIO_NATIVE, /* 33: NATIVE: SSD_DEVSLP */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */ - PCH_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */ - PCH_GPIO_UNUSED, /* 42: WLAN_DISABLE_L */ - PCH_GPIO_OUT_HIGH, /* 43: PP1800_CODEC_EN */ - PCH_GPIO_UNUSED, /* 44: UNUSED */ - PCH_GPIO_ACPI_SCI, /* 45: DSP_INT - Codec Wake */ - PCH_GPIO_PIRQ, /* 46: HOTWORD_DET_L_3V3 (PIRQO) - Codec IRQ */ - PCH_GPIO_OUT_LOW, /* 47: SSD_RESET_L */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_UNUSED, /* 50: UNUSED */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_INPUT, /* 52: SIM_DET */ - PCH_GPIO_UNUSED, /* 53: UNUSED */ - PCH_GPIO_UNUSED, /* 54: UNUSED */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_UNUSED, /* 56: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 57: CODEC_RESET_L */ - PCH_GPIO_UNUSED, /* 58: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ - PCH_GPIO_UNUSED, /* 60: UNUSED */ - PCH_GPIO_NATIVE, /* 61: NATIVE: PCH_SUS_STAT */ - PCH_GPIO_NATIVE, /* 62: NATIVE: PCH_SUSCLK */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_INPUT, /* 65: RAM_ID3 */ - PCH_GPIO_INPUT, /* 66: RAM_ID3_OLD (STRAP) */ - PCH_GPIO_INPUT, /* 67: RAM_ID0 */ - PCH_GPIO_INPUT, /* 68: RAM_ID1 */ - PCH_GPIO_INPUT, /* 69: RAM_ID2 */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_UNUSED, /* 72: UNUSED */ - PCH_GPIO_UNUSED, /* 73: UNUSED */ - PCH_GPIO_UNUSED, /* 74: UNUSED */ - PCH_GPIO_UNUSED, /* 75: UNUSED */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_UNUSED, /* 81: UNUSED */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_NATIVE, /* 83: GSPI0_CS */ - PCH_GPIO_NATIVE, /* 84: GSPI0_CLK */ - PCH_GPIO_NATIVE, /* 85: GSPI0_MISO */ - PCH_GPIO_NATIVE, /* 86: GSPI0_MOSI (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 89: PP3300_SD_EN */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: PCH_LTE_WAKE_L */ + LP_GPIO_INPUT_INVERT, /* 9: TRACKPAD_INT_L (WAKE) */ + LP_GPIO_ACPI_SCI, /* 10: PCH_WLAN_WAKE_L */ + LP_GPIO_UNUSED, /* 11: UNUSED */ + LP_GPIO_UNUSED, /* 12: UNUSED */ + LP_GPIO_PIRQ, /* 13: TRACKPAD_INT_L (PIRQL) */ + LP_GPIO_PIRQ, /* 14: TOUCH_INT_L (PIRQM) */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_INPUT, /* 16: PCH_WP */ + LP_GPIO_UNUSED, /* 17: UNUSED */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: PCIE_WLAN_CLKREQ_L */ + LP_GPIO_OUT_HIGH, /* 21: PP3300_SSD_EN */ + LP_GPIO_UNUSED, /* 22: UNUSED */ + LP_GPIO_OUT_LOW, /* 23: PP3300_AUTOBAHN_EN */ + LP_GPIO_UNUSED, /* 24: UNUSED */ + LP_GPIO_INPUT, /* 25: EC_IN_RW */ + LP_GPIO_UNUSED, /* 26: UNUSED */ + LP_GPIO_ACPI_SCI, /* 27: PCH_WAKE_L */ + LP_GPIO_UNUSED, /* 28: UNUSED */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSWARN_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: ACOK_BUF */ + LP_GPIO_NATIVE, /* 32: NATIVE: LPC_CLKRUN_L */ + LP_GPIO_NATIVE, /* 33: NATIVE: SSD_DEVSLP */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: PCH_USB1_OC_L */ + LP_GPIO_NATIVE, /* 41: NATIVE: PCH_USB2_OC_L */ + LP_GPIO_UNUSED, /* 42: WLAN_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 43: PP1800_CODEC_EN */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_ACPI_SCI, /* 45: DSP_INT - Codec Wake */ + LP_GPIO_PIRQ, /* 46: HOTWORD_DET_L_3V3 (PIRQO) - Codec IRQ */ + LP_GPIO_OUT_LOW, /* 47: SSD_RESET_L */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_UNUSED, /* 50: UNUSED */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_INPUT, /* 52: SIM_DET */ + LP_GPIO_UNUSED, /* 53: UNUSED */ + LP_GPIO_UNUSED, /* 54: UNUSED */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_UNUSED, /* 56: UNUSED */ + LP_GPIO_OUT_HIGH, /* 57: CODEC_RESET_L */ + LP_GPIO_UNUSED, /* 58: UNUSED */ + LP_GPIO_OUT_HIGH, /* 59: LTE_DISABLE_L */ + LP_GPIO_UNUSED, /* 60: UNUSED */ + LP_GPIO_NATIVE, /* 61: NATIVE: PCH_SUS_STAT */ + LP_GPIO_NATIVE, /* 62: NATIVE: PCH_SUSCLK */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_INPUT, /* 65: RAM_ID3 */ + LP_GPIO_INPUT, /* 66: RAM_ID3_OLD (STRAP) */ + LP_GPIO_INPUT, /* 67: RAM_ID0 */ + LP_GPIO_INPUT, /* 68: RAM_ID1 */ + LP_GPIO_INPUT, /* 69: RAM_ID2 */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_UNUSED, /* 74: UNUSED */ + LP_GPIO_UNUSED, /* 75: UNUSED */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_UNUSED, /* 81: UNUSED */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_NATIVE, /* 83: GSPI0_CS */ + LP_GPIO_NATIVE, /* 84: GSPI0_CLK */ + LP_GPIO_NATIVE, /* 85: GSPI0_MISO */ + LP_GPIO_NATIVE, /* 86: GSPI0_MOSI (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_OUT_HIGH, /* 89: PP3300_SD_EN */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/jecht/variants/guado/gpio.c b/src/mainboard/google/jecht/variants/guado/gpio.c index b4ffaa7..d4223e1 100644 --- a/src/mainboard/google/jecht/variants/guado/gpio.c +++ b/src/mainboard/google/jecht/variants/guado/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ - PCH_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: SMBALERT */ - PCH_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ - PCH_GPIO_UNUSED, /* 13: UNUSED */ - PCH_GPIO_UNUSED, /* 14: UNUSED */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ - PCH_GPIO_UNUSED, /* 18: UNUSED */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ - PCH_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ - PCH_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ - PCH_GPIO_UNUSED, /* 25: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ - PCH_GPIO_UNUSED, /* 44: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ - PCH_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 49: POWER_LED */ - PCH_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_UNUSED, /* 53: UNUSED */ - PCH_GPIO_UNUSED, /* 54: UNUSED */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ - PCH_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_UNUSED, /* 72: UNUSED */ - PCH_GPIO_UNUSED, /* 73: UNUSED */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ + LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: SMBALERT */ + LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ + LP_GPIO_UNUSED, /* 13: UNUSED */ + LP_GPIO_UNUSED, /* 14: UNUSED */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ + LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ + LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ + LP_GPIO_UNUSED, /* 25: UNUSED */ + LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_OUT_HIGH, /* 49: POWER_LED */ + LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_UNUSED, /* 53: UNUSED */ + LP_GPIO_UNUSED, /* 54: UNUSED */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ + LP_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ + LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/jecht/variants/jecht/gpio.c b/src/mainboard/google/jecht/variants/jecht/gpio.c index 92470cd..541fbfc 100644 --- a/src/mainboard/google/jecht/variants/jecht/gpio.c +++ b/src/mainboard/google/jecht/variants/jecht/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ - PCH_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: SMBALERT */ - PCH_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ - PCH_GPIO_UNUSED, /* 13: UNUSED */ - PCH_GPIO_UNUSED, /* 14: UNUSED */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ - PCH_GPIO_UNUSED, /* 18: UNUSED */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ - PCH_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ - PCH_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ - PCH_GPIO_UNUSED, /* 25: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ - PCH_GPIO_UNUSED, /* 44: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ - PCH_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_UNUSED, /* 49: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_UNUSED, /* 53: UNUSED */ - PCH_GPIO_UNUSED, /* 54: UNUSED */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ - PCH_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_UNUSED, /* 72: UNUSED */ - PCH_GPIO_UNUSED, /* 73: UNUSED */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ + LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: SMBALERT */ + LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ + LP_GPIO_UNUSED, /* 13: UNUSED */ + LP_GPIO_UNUSED, /* 14: UNUSED */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ + LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ + LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ + LP_GPIO_UNUSED, /* 25: UNUSED */ + LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_UNUSED, /* 49: UNUSED */ + LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_UNUSED, /* 53: UNUSED */ + LP_GPIO_UNUSED, /* 54: UNUSED */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ + LP_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ + LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/jecht/variants/rikku/gpio.c b/src/mainboard/google/jecht/variants/rikku/gpio.c index b4ffaa7..d4223e1 100644 --- a/src/mainboard/google/jecht/variants/rikku/gpio.c +++ b/src/mainboard/google/jecht/variants/rikku/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ - PCH_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: SMBALERT */ - PCH_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ - PCH_GPIO_UNUSED, /* 13: UNUSED */ - PCH_GPIO_UNUSED, /* 14: UNUSED */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ - PCH_GPIO_UNUSED, /* 18: UNUSED */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ - PCH_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ - PCH_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ - PCH_GPIO_UNUSED, /* 25: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ - PCH_GPIO_UNUSED, /* 44: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ - PCH_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ - PCH_GPIO_UNUSED, /* 48: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 49: POWER_LED */ - PCH_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_UNUSED, /* 53: UNUSED */ - PCH_GPIO_UNUSED, /* 54: UNUSED */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ - PCH_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_UNUSED, /* 72: UNUSED */ - PCH_GPIO_UNUSED, /* 73: UNUSED */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ + LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: SMBALERT */ + LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ + LP_GPIO_UNUSED, /* 13: UNUSED */ + LP_GPIO_UNUSED, /* 14: UNUSED */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ + LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ + LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ + LP_GPIO_UNUSED, /* 25: UNUSED */ + LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ + LP_GPIO_UNUSED, /* 48: UNUSED */ + LP_GPIO_OUT_HIGH, /* 49: POWER_LED */ + LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_UNUSED, /* 53: UNUSED */ + LP_GPIO_UNUSED, /* 54: UNUSED */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ + LP_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ + LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/google/jecht/variants/tidus/gpio.c b/src/mainboard/google/jecht/variants/tidus/gpio.c index 805b617..3dbc07e 100644 --- a/src/mainboard/google/jecht/variants/tidus/gpio.c +++ b/src/mainboard/google/jecht/variants/tidus/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_UNUSED, /* 0: UNUSED */ - PCH_GPIO_UNUSED, /* 1: UNUSED */ - PCH_GPIO_UNUSED, /* 2: UNUSED */ - PCH_GPIO_UNUSED, /* 3: UNUSED */ - PCH_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ - PCH_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ - PCH_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ - PCH_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ - PCH_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ - PCH_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ - PCH_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ - PCH_GPIO_UNUSED, /* 11: SMBALERT */ - PCH_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ - PCH_GPIO_UNUSED, /* 13: UNUSED */ - PCH_GPIO_UNUSED, /* 14: UNUSED */ - PCH_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 16: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ - PCH_GPIO_UNUSED, /* 18: UNUSED */ - PCH_GPIO_UNUSED, /* 19: UNUSED */ - PCH_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ - PCH_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ - PCH_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ - PCH_GPIO_UNUSED, /* 23: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ - PCH_GPIO_UNUSED, /* 25: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ - PCH_GPIO_UNUSED, /* 27: UNUSED */ - PCH_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ - PCH_GPIO_UNUSED, /* 29: UNUSED */ - PCH_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ - PCH_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ - PCH_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ - PCH_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ - PCH_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ - PCH_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ - PCH_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ - PCH_GPIO_UNUSED, /* 37: UNUSED */ - PCH_GPIO_UNUSED, /* 38: UNUSED */ - PCH_GPIO_UNUSED, /* 39: UNUSED */ - PCH_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ - PCH_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ - PCH_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ - PCH_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ - PCH_GPIO_UNUSED, /* 44: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ - PCH_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ - PCH_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ - PCH_GPIO_OUT_HIGH, /* 48: USB4_PWR_EN */ - PCH_GPIO_OUT_LOW, /* 49: POWER_LED */ - PCH_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ - PCH_GPIO_UNUSED, /* 51: UNUSED */ - PCH_GPIO_UNUSED, /* 52: UNUSED */ - PCH_GPIO_UNUSED, /* 53: UNUSED */ - PCH_GPIO_UNUSED, /* 54: UNUSED */ - PCH_GPIO_UNUSED, /* 55: UNUSED */ - PCH_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ - PCH_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ - PCH_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ - PCH_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ - PCH_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ - PCH_GPIO_UNUSED, /* 61: UNUSED */ - PCH_GPIO_UNUSED, /* 62: UNUSED */ - PCH_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ - PCH_GPIO_UNUSED, /* 64: UNUSED */ - PCH_GPIO_UNUSED, /* 65: UNUSED */ - PCH_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 67: UNUSED */ - PCH_GPIO_UNUSED, /* 68: UNUSED */ - PCH_GPIO_UNUSED, /* 69: UNUSED */ - PCH_GPIO_UNUSED, /* 70: UNUSED */ - PCH_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ - PCH_GPIO_UNUSED, /* 72: UNUSED */ - PCH_GPIO_UNUSED, /* 73: UNUSED */ - PCH_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ - PCH_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ - PCH_GPIO_UNUSED, /* 76: UNUSED */ - PCH_GPIO_UNUSED, /* 77: UNUSED */ - PCH_GPIO_UNUSED, /* 78: UNUSED */ - PCH_GPIO_UNUSED, /* 79: UNUSED */ - PCH_GPIO_UNUSED, /* 80: UNUSED */ - PCH_GPIO_NATIVE, /* 81: NATIVE: SPKR */ - PCH_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ - PCH_GPIO_UNUSED, /* 83: UNUSED */ - PCH_GPIO_UNUSED, /* 84: UNUSED */ - PCH_GPIO_UNUSED, /* 85: UNUSED */ - PCH_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ - PCH_GPIO_UNUSED, /* 87: UNUSED */ - PCH_GPIO_UNUSED, /* 88: UNUSED */ - PCH_GPIO_UNUSED, /* 89: UNUSED */ - PCH_GPIO_UNUSED, /* 90: UNUSED */ - PCH_GPIO_UNUSED, /* 91: UNUSED */ - PCH_GPIO_UNUSED, /* 92: UNUSED */ - PCH_GPIO_UNUSED, /* 93: UNUSED */ - PCH_GPIO_UNUSED, /* 94: UNUSED */ - PCH_GPIO_END + LP_GPIO_UNUSED, /* 0: UNUSED */ + LP_GPIO_UNUSED, /* 1: UNUSED */ + LP_GPIO_UNUSED, /* 2: UNUSED */ + LP_GPIO_UNUSED, /* 3: UNUSED */ + LP_GPIO_NATIVE, /* 4: NATIVE: I2C0_SDA_GPIO4 */ + LP_GPIO_NATIVE, /* 5: NATIVE: I2C0_SCL_GPIO5 */ + LP_GPIO_NATIVE, /* 6: NATIVE: I2C1_SDA_GPIO6 */ + LP_GPIO_NATIVE, /* 7: NATIVE: I2C1_SCL_GPIO7 */ + LP_GPIO_ACPI_SCI, /* 8: LAN_WAKE_L_Q */ + LP_GPIO_OUT_HIGH, /* 9: PP3300_WLAN_EN */ + LP_GPIO_ACPI_SCI, /* 10: WLAN_WAKE_L_Q */ + LP_GPIO_UNUSED, /* 11: SMBALERT */ + LP_GPIO_INPUT_INVERT, /* 12: RECOVERY_L */ + LP_GPIO_UNUSED, /* 13: UNUSED */ + LP_GPIO_UNUSED, /* 14: UNUSED */ + LP_GPIO_UNUSED, /* 15: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 16: UNUSED */ + LP_GPIO_OUT_HIGH, /* 17: PP3300_VP8_EN */ + LP_GPIO_UNUSED, /* 18: UNUSED */ + LP_GPIO_UNUSED, /* 19: UNUSED */ + LP_GPIO_NATIVE, /* 20: NATIVE: CLK_PCIE_REQ2# */ + LP_GPIO_NATIVE, /* 21: NATIVE: CLK_PCIE_REQ3# */ + LP_GPIO_NATIVE, /* 22: NATIVE: CLK_PCIE_REQ4# */ + LP_GPIO_UNUSED, /* 23: UNUSED */ + LP_GPIO_OUT_HIGH, /* 24: WLAN_OFF_L */ + LP_GPIO_UNUSED, /* 25: UNUSED */ + LP_GPIO_OUT_HIGH, /* 26: USB_CTL_1 */ + LP_GPIO_UNUSED, /* 27: UNUSED */ + LP_GPIO_OUT_LOW, /* 28: USB_ILIM_SEL */ + LP_GPIO_UNUSED, /* 29: UNUSED */ + LP_GPIO_NATIVE, /* 30: NATIVE: PCH_SUSPWRACK_L */ + LP_GPIO_NATIVE, /* 31: NATIVE: PCH_ACPRESENT */ + LP_GPIO_NATIVE, /* 32: NATIVE: CLKRUN# */ + LP_GPIO_NATIVE, /* 33: NATIVE: DEVSLP0 */ + LP_GPIO_ACPI_SMI, /* 34: EC_SMI_L */ + LP_GPIO_ACPI_SMI, /* 35: PCH_NMI_DBG_L (route in NMI_EN) */ + LP_GPIO_ACPI_SCI, /* 36: EC_SCI_L */ + LP_GPIO_UNUSED, /* 37: UNUSED */ + LP_GPIO_UNUSED, /* 38: UNUSED */ + LP_GPIO_UNUSED, /* 39: UNUSED */ + LP_GPIO_NATIVE, /* 40: NATIVE: USB_OC0# */ + LP_GPIO_NATIVE, /* 41: NATIVE: USB_OC1# */ + LP_GPIO_NATIVE, /* 42: NATIVE: USB_OC2# */ + LP_GPIO_NATIVE, /* 43: NATIVE: USB_OC3# */ + LP_GPIO_UNUSED, /* 44: UNUSED */ + LP_GPIO_OUT_HIGH, /* 45: PP5000_CODEC_EN */ + LP_GPIO_OUT_HIGH, /* 46: BT_DISABLE_L */ + LP_GPIO_OUT_HIGH, /* 47: USB1_PWR_EN */ + LP_GPIO_OUT_HIGH, /* 48: USB4_PWR_EN */ + LP_GPIO_OUT_LOW, /* 49: POWER_LED */ + LP_GPIO_OUT_HIGH, /* 50: VP8_DISABLE_L */ + LP_GPIO_UNUSED, /* 51: UNUSED */ + LP_GPIO_UNUSED, /* 52: UNUSED */ + LP_GPIO_UNUSED, /* 53: UNUSED */ + LP_GPIO_UNUSED, /* 54: UNUSED */ + LP_GPIO_UNUSED, /* 55: UNUSED */ + LP_GPIO_OUT_HIGH, /* 56: USB2_PWR_EN */ + LP_GPIO_OUT_HIGH, /* 57: USB3_PWR_EN */ + LP_GPIO_INPUT, /* 58: PCH_SPI_WP_D */ + LP_GPIO_OUT_HIGH, /* 59: PP3300_LAN_EN */ + LP_GPIO_NATIVE, /* 60: NATIVE: SMB0ALERT# */ + LP_GPIO_UNUSED, /* 61: UNUSED */ + LP_GPIO_UNUSED, /* 62: UNUSED */ + LP_GPIO_NATIVE, /* 63: NATIVE: PCH_SLP_S5_L */ + LP_GPIO_UNUSED, /* 64: UNUSED */ + LP_GPIO_UNUSED, /* 65: UNUSED */ + LP_GPIO_UNUSED, /* 66: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 67: UNUSED */ + LP_GPIO_UNUSED, /* 68: UNUSED */ + LP_GPIO_UNUSED, /* 69: UNUSED */ + LP_GPIO_UNUSED, /* 70: UNUSED */ + LP_GPIO_NATIVE, /* 71: NATIVE: MODPHY_EN */ + LP_GPIO_UNUSED, /* 72: UNUSED */ + LP_GPIO_UNUSED, /* 73: UNUSED */ + LP_GPIO_NATIVE, /* 74: NATIVE: SMB_ME1_DAT */ + LP_GPIO_NATIVE, /* 75: NATIVE: SMB_ME1_CLK */ + LP_GPIO_UNUSED, /* 76: UNUSED */ + LP_GPIO_UNUSED, /* 77: UNUSED */ + LP_GPIO_UNUSED, /* 78: UNUSED */ + LP_GPIO_UNUSED, /* 79: UNUSED */ + LP_GPIO_UNUSED, /* 80: UNUSED */ + LP_GPIO_NATIVE, /* 81: NATIVE: SPKR */ + LP_GPIO_NATIVE, /* 82: NATIVE: EC_RCIN_L */ + LP_GPIO_UNUSED, /* 83: UNUSED */ + LP_GPIO_UNUSED, /* 84: UNUSED */ + LP_GPIO_UNUSED, /* 85: UNUSED */ + LP_GPIO_UNUSED, /* 86: UNUSED (STRAP) */ + LP_GPIO_UNUSED, /* 87: UNUSED */ + LP_GPIO_UNUSED, /* 88: UNUSED */ + LP_GPIO_UNUSED, /* 89: UNUSED */ + LP_GPIO_UNUSED, /* 90: UNUSED */ + LP_GPIO_UNUSED, /* 91: UNUSED */ + LP_GPIO_UNUSED, /* 92: UNUSED */ + LP_GPIO_UNUSED, /* 93: UNUSED */ + LP_GPIO_UNUSED, /* 94: UNUSED */ + LP_GPIO_END }; diff --git a/src/mainboard/intel/wtm2/gpio.c b/src/mainboard/intel/wtm2/gpio.c index c779ef0..987e36e 100644 --- a/src/mainboard/intel/wtm2/gpio.c +++ b/src/mainboard/intel/wtm2/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_NATIVE, /* 0: LPSS_UART1_RXD */ - PCH_GPIO_NATIVE, /* 1: LPSS_UART1_TXD */ - PCH_GPIO_NATIVE, /* 2: LPSS_UART1_RTS_N_R */ - PCH_GPIO_NATIVE, /* 3: LPSS_UART1_CTS_N */ - PCH_GPIO_NATIVE, /* 4: LPSS_I2C0_SDA_R */ - PCH_GPIO_NATIVE, /* 5: LPSS_I2C0_SCL */ - PCH_GPIO_NATIVE, /* 6: LPSS_I2C1_SDA */ - PCH_GPIO_NATIVE, /* 7: LPSS_I2C1_SCL */ - PCH_GPIO_UNUSED, /* 8: NGFF_SLTA_WIFI_WAKE_N */ - PCH_GPIO_UNUSED, /* 9: ACCEL_INT2_MCP */ - PCH_GPIO_ACPI_SCI, /* 10: SMC_RUNTIME_SCI_N */ - PCH_GPIO_UNUSED, /* 11: AMB_THRM_R_N */ - PCH_GPIO_NATIVE, /* 12: PM_LANPHY_ENABLE */ - PCH_GPIO_OUT_HIGH, /* 13: USB32_P0_PWREN */ - PCH_GPIO_IRQ_EDGE, /* 14: SH_INT_ACCEL_DRDY_USB_INT_N */ - PCH_GPIO_OUT_HIGH, /* 15: LAN_PWREN_N */ - PCH_GPIO_OUT_HIGH, /* 16: LAN_RST_N */ - PCH_GPIO_OUT_LOW, /* 17: CRIT_TEMP_REP_R_N */ - PCH_GPIO_UNUSED, /* 18: TBT_FORCE_PWR */ - PCH_GPIO_INPUT, /* 19: EC_IN_RW */ - PCH_GPIO_NATIVE, /* 20: CK_REQ_P2_NGFFSLTA_N_R */ - PCH_GPIO_NATIVE, /* 21: CK_PCIE_LAN_REQ_N */ - PCH_GPIO_NATIVE, /* 22: CK_REQ_P4_TBT_N */ - PCH_GPIO_NATIVE, /* 23: CK_REQ_P5_N */ - PCH_GPIO_OUT_LOW, /* 24: ME_PG_LED */ - PCH_GPIO_INPUT, /* 25: USB_WAKEOUT_N */ - PCH_GPIO_IRQ_EDGE, /* 26: NFC_IRQ_MGP5 */ - PCH_GPIO_ACPI_SCI, /* 27: SMC_WAKE_SCI_N */ - PCH_GPIO_OUT_LOW, /* 28: PCH_NFC_RESET */ - PCH_GPIO_NATIVE, /* 29: PCH_SLP_WLAN_N */ - PCH_GPIO_NATIVE, /* 30: SUS_PWR_ACK_R */ - PCH_GPIO_NATIVE, /* 31: AC_PRESENT_R */ - PCH_GPIO_NATIVE, /* 32: PM_CKRUN_N */ - PCH_GPIO_OUT_LOW, /* 33: SATA0_PHYSLP */ - PCH_GPIO_INPUT, /* 34: ESATA_DET_N */ - PCH_GPIO_INPUT, /* 35: SATA_DIRECT_PRSNT_R_N */ - PCH_GPIO_INPUT, /* 36: NGFF_SSD_SATA2_PCIE1_DET_N */ - PCH_GPIO_INPUT, /* 37: NGFF_SSD_SATA3_PCIE0_DET_N */ - PCH_GPIO_OUT_LOW, /* 38: SATA1_PHYSLP_DIRECT */ - PCH_GPIO_ACPI_SMI, /* 39: SMC_EXTSMI_N_R */ - PCH_GPIO_NATIVE, /* 40: USB_OC_0_1_R_N */ - PCH_GPIO_NATIVE, /* 41: USB_OC_2_6_R_N */ - PCH_GPIO_INPUT, /* 42: TBT_CIO_PLUG_SMI_N_R */ - PCH_GPIO_OUT_HIGH, /* 43: USB32_P1_PWREN */ - PCH_GPIO_INPUT, /* 44: SENSOR_HUB_RST_N */ - PCH_GPIO_INPUT, /* 45: GYRO_INT2_MCP_R */ - PCH_GPIO_OUT_HIGH, /* 46: SNSR_HUB_PWREN */ - PCH_GPIO_IRQ_EDGE, /* 47: SPI_TPM_HDR_IRQ_N */ - PCH_GPIO_OUT_HIGH, /* 48: PCIE_TBT_RST_N */ - PCH_GPIO_INPUT, /* 49: COMBO_JD */ - PCH_GPIO_IRQ_EDGE, /* 50: TOUCH_PANEL_INTR_N */ - PCH_GPIO_OUT_HIGH, /* 51: PCH_WIFI_RF_KILL_N */ - PCH_GPIO_OUT_HIGH, /* 52: TOUCH_PNL_RST_N_R */ - PCH_GPIO_INPUT, /* 53: SNSR_HUB_I2C_WAKE / ALS_INT_MCP */ - PCH_GPIO_ACPI_SCI, /* 54: NGFF_SLTB_SSD_MC_WAKE_N */ - PCH_GPIO_IRQ_EDGE, /* 55: TOUCHPAD_INTR_N */ - PCH_GPIO_INPUT, /* 56: NGFF_SLTB_WWAN_SSD_DET1 */ - PCH_GPIO_OUT_HIGH, /* 57: NGFF_SLTB_WWAN_PWREN */ - PCH_GPIO_OUT_LOW, /* 58: SLATEMODE_HALLOUT_R */ - PCH_GPIO_OUT_HIGH, /* 59: USB2_CAM_PWREN */ - PCH_GPIO_OUT_LOW, /* 60: USB_CR_PWREN_N */ - PCH_GPIO_NATIVE, /* 61: PM_SUS_STAT_N */ - PCH_GPIO_NATIVE, /* 62: SUS_CK */ - PCH_GPIO_NATIVE, /* 63: SLP_S5_R_N */ - PCH_GPIO_NATIVE, /* 64: LPSS_SDIO_CLK_CMNHDR_R */ - PCH_GPIO_NATIVE, /* 65: LPSS_SDIO_CMD_CMNHDR_R */ - PCH_GPIO_NATIVE, /* 66: LPSS_SDIO_D0_CMNHDR_R */ - PCH_GPIO_NATIVE, /* 67: LPSS_SDIO_D1_CMNHDR_R */ - PCH_GPIO_NATIVE, /* 68: LPSS_SDIO_D2_CMNHDR_R */ - PCH_GPIO_NATIVE, /* 69: LPSS_SDIO_D3_CMNHDR_R1 */ - PCH_GPIO_NATIVE, /* 70: NGFF_SLTA_WIFI_PWREN_N_R */ - PCH_GPIO_OUT_HIGH, /* 71: MPHY_PWREN */ - PCH_GPIO_NATIVE, /* 72: PM_BATLOW_R_N */ - PCH_GPIO_NATIVE, /* 73: PCH_NOT_N */ - PCH_GPIO_NATIVE, /* 74: SML1_DATA */ - PCH_GPIO_NATIVE, /* 75: SML1_CK */ - PCH_GPIO_OUT_HIGH, /* 76: PCH_AUDIO_PWR_R */ - PCH_GPIO_OUT_LOW, /* 77: PC_SLTB_SSD_RST_N_R */ - PCH_GPIO_INPUT, /* 78: PM_EXTTS0_EC_N */ - PCH_GPIO_IRQ_EDGE, /* 79: SIO1007_IRQ_N */ - PCH_GPIO_INPUT, /* 80: PM_EXTTS1_R_N */ - PCH_GPIO_NATIVE, /* 81: PCH_HDA_SPKR */ - PCH_GPIO_NATIVE, /* 82: H_RCIN_N */ - PCH_GPIO_NATIVE, /* 83: LPSS_GSPI0_CS_R_N */ - PCH_GPIO_NATIVE, /* 84: LPSS_GSPI0_CLK_R */ - PCH_GPIO_NATIVE, /* 85: LPSS_GSPI0_MISO_R */ - PCH_GPIO_NATIVE, /* 86: LPSS_GSPI0_MOSI_BBS0_R */ - PCH_GPIO_NATIVE, /* 87: LPSS_GSPI1_CS_R_N */ - PCH_GPIO_NATIVE, /* 88: LPSS_GSPI1_CLK_R */ - PCH_GPIO_NATIVE, /* 89: LPSS_GSPI1_MISO_R */ - PCH_GPIO_OUT_LOW, /* 90: NGFF_SLTA_WIFI_RST_N */ - PCH_GPIO_NATIVE, /* 91: LPSS_UART0_RXD */ - PCH_GPIO_NATIVE, /* 92: LPSS_UART0_TXD */ - PCH_GPIO_NATIVE, /* 93: LPSS_UART0_RTS_N */ - PCH_GPIO_NATIVE, /* 94: LPSS_UART0_CTS_N */ - PCH_GPIO_END + LP_GPIO_NATIVE, /* 0: LPSS_UART1_RXD */ + LP_GPIO_NATIVE, /* 1: LPSS_UART1_TXD */ + LP_GPIO_NATIVE, /* 2: LPSS_UART1_RTS_N_R */ + LP_GPIO_NATIVE, /* 3: LPSS_UART1_CTS_N */ + LP_GPIO_NATIVE, /* 4: LPSS_I2C0_SDA_R */ + LP_GPIO_NATIVE, /* 5: LPSS_I2C0_SCL */ + LP_GPIO_NATIVE, /* 6: LPSS_I2C1_SDA */ + LP_GPIO_NATIVE, /* 7: LPSS_I2C1_SCL */ + LP_GPIO_UNUSED, /* 8: NGFF_SLTA_WIFI_WAKE_N */ + LP_GPIO_UNUSED, /* 9: ACCEL_INT2_MCP */ + LP_GPIO_ACPI_SCI, /* 10: SMC_RUNTIME_SCI_N */ + LP_GPIO_UNUSED, /* 11: AMB_THRM_R_N */ + LP_GPIO_NATIVE, /* 12: PM_LANPHY_ENABLE */ + LP_GPIO_OUT_HIGH, /* 13: USB32_P0_PWREN */ + LP_GPIO_IRQ_EDGE, /* 14: SH_INT_ACCEL_DRDY_USB_INT_N */ + LP_GPIO_OUT_HIGH, /* 15: LAN_PWREN_N */ + LP_GPIO_OUT_HIGH, /* 16: LAN_RST_N */ + LP_GPIO_OUT_LOW, /* 17: CRIT_TEMP_REP_R_N */ + LP_GPIO_UNUSED, /* 18: TBT_FORCE_PWR */ + LP_GPIO_INPUT, /* 19: EC_IN_RW */ + LP_GPIO_NATIVE, /* 20: CK_REQ_P2_NGFFSLTA_N_R */ + LP_GPIO_NATIVE, /* 21: CK_PCIE_LAN_REQ_N */ + LP_GPIO_NATIVE, /* 22: CK_REQ_P4_TBT_N */ + LP_GPIO_NATIVE, /* 23: CK_REQ_P5_N */ + LP_GPIO_OUT_LOW, /* 24: ME_PG_LED */ + LP_GPIO_INPUT, /* 25: USB_WAKEOUT_N */ + LP_GPIO_IRQ_EDGE, /* 26: NFC_IRQ_MGP5 */ + LP_GPIO_ACPI_SCI, /* 27: SMC_WAKE_SCI_N */ + LP_GPIO_OUT_LOW, /* 28: PCH_NFC_RESET */ + LP_GPIO_NATIVE, /* 29: PCH_SLP_WLAN_N */ + LP_GPIO_NATIVE, /* 30: SUS_PWR_ACK_R */ + LP_GPIO_NATIVE, /* 31: AC_PRESENT_R */ + LP_GPIO_NATIVE, /* 32: PM_CKRUN_N */ + LP_GPIO_OUT_LOW, /* 33: SATA0_PHYSLP */ + LP_GPIO_INPUT, /* 34: ESATA_DET_N */ + LP_GPIO_INPUT, /* 35: SATA_DIRECT_PRSNT_R_N */ + LP_GPIO_INPUT, /* 36: NGFF_SSD_SATA2_PCIE1_DET_N */ + LP_GPIO_INPUT, /* 37: NGFF_SSD_SATA3_PCIE0_DET_N */ + LP_GPIO_OUT_LOW, /* 38: SATA1_PHYSLP_DIRECT */ + LP_GPIO_ACPI_SMI, /* 39: SMC_EXTSMI_N_R */ + LP_GPIO_NATIVE, /* 40: USB_OC_0_1_R_N */ + LP_GPIO_NATIVE, /* 41: USB_OC_2_6_R_N */ + LP_GPIO_INPUT, /* 42: TBT_CIO_PLUG_SMI_N_R */ + LP_GPIO_OUT_HIGH, /* 43: USB32_P1_PWREN */ + LP_GPIO_INPUT, /* 44: SENSOR_HUB_RST_N */ + LP_GPIO_INPUT, /* 45: GYRO_INT2_MCP_R */ + LP_GPIO_OUT_HIGH, /* 46: SNSR_HUB_PWREN */ + LP_GPIO_IRQ_EDGE, /* 47: SPI_TPM_HDR_IRQ_N */ + LP_GPIO_OUT_HIGH, /* 48: PCIE_TBT_RST_N */ + LP_GPIO_INPUT, /* 49: COMBO_JD */ + LP_GPIO_IRQ_EDGE, /* 50: TOUCH_PANEL_INTR_N */ + LP_GPIO_OUT_HIGH, /* 51: PCH_WIFI_RF_KILL_N */ + LP_GPIO_OUT_HIGH, /* 52: TOUCH_PNL_RST_N_R */ + LP_GPIO_INPUT, /* 53: SNSR_HUB_I2C_WAKE / ALS_INT_MCP */ + LP_GPIO_ACPI_SCI, /* 54: NGFF_SLTB_SSD_MC_WAKE_N */ + LP_GPIO_IRQ_EDGE, /* 55: TOUCHPAD_INTR_N */ + LP_GPIO_INPUT, /* 56: NGFF_SLTB_WWAN_SSD_DET1 */ + LP_GPIO_OUT_HIGH, /* 57: NGFF_SLTB_WWAN_PWREN */ + LP_GPIO_OUT_LOW, /* 58: SLATEMODE_HALLOUT_R */ + LP_GPIO_OUT_HIGH, /* 59: USB2_CAM_PWREN */ + LP_GPIO_OUT_LOW, /* 60: USB_CR_PWREN_N */ + LP_GPIO_NATIVE, /* 61: PM_SUS_STAT_N */ + LP_GPIO_NATIVE, /* 62: SUS_CK */ + LP_GPIO_NATIVE, /* 63: SLP_S5_R_N */ + LP_GPIO_NATIVE, /* 64: LPSS_SDIO_CLK_CMNHDR_R */ + LP_GPIO_NATIVE, /* 65: LPSS_SDIO_CMD_CMNHDR_R */ + LP_GPIO_NATIVE, /* 66: LPSS_SDIO_D0_CMNHDR_R */ + LP_GPIO_NATIVE, /* 67: LPSS_SDIO_D1_CMNHDR_R */ + LP_GPIO_NATIVE, /* 68: LPSS_SDIO_D2_CMNHDR_R */ + LP_GPIO_NATIVE, /* 69: LPSS_SDIO_D3_CMNHDR_R1 */ + LP_GPIO_NATIVE, /* 70: NGFF_SLTA_WIFI_PWREN_N_R */ + LP_GPIO_OUT_HIGH, /* 71: MPHY_PWREN */ + LP_GPIO_NATIVE, /* 72: PM_BATLOW_R_N */ + LP_GPIO_NATIVE, /* 73: PCH_NOT_N */ + LP_GPIO_NATIVE, /* 74: SML1_DATA */ + LP_GPIO_NATIVE, /* 75: SML1_CK */ + LP_GPIO_OUT_HIGH, /* 76: PCH_AUDIO_PWR_R */ + LP_GPIO_OUT_LOW, /* 77: PC_SLTB_SSD_RST_N_R */ + LP_GPIO_INPUT, /* 78: PM_EXTTS0_EC_N */ + LP_GPIO_IRQ_EDGE, /* 79: SIO1007_IRQ_N */ + LP_GPIO_INPUT, /* 80: PM_EXTTS1_R_N */ + LP_GPIO_NATIVE, /* 81: PCH_HDA_SPKR */ + LP_GPIO_NATIVE, /* 82: H_RCIN_N */ + LP_GPIO_NATIVE, /* 83: LPSS_GSPI0_CS_R_N */ + LP_GPIO_NATIVE, /* 84: LPSS_GSPI0_CLK_R */ + LP_GPIO_NATIVE, /* 85: LPSS_GSPI0_MISO_R */ + LP_GPIO_NATIVE, /* 86: LPSS_GSPI0_MOSI_BBS0_R */ + LP_GPIO_NATIVE, /* 87: LPSS_GSPI1_CS_R_N */ + LP_GPIO_NATIVE, /* 88: LPSS_GSPI1_CLK_R */ + LP_GPIO_NATIVE, /* 89: LPSS_GSPI1_MISO_R */ + LP_GPIO_OUT_LOW, /* 90: NGFF_SLTA_WIFI_RST_N */ + LP_GPIO_NATIVE, /* 91: LPSS_UART0_RXD */ + LP_GPIO_NATIVE, /* 92: LPSS_UART0_TXD */ + LP_GPIO_NATIVE, /* 93: LPSS_UART0_RTS_N */ + LP_GPIO_NATIVE, /* 94: LPSS_UART0_CTS_N */ + LP_GPIO_END }; diff --git a/src/mainboard/purism/librem_bdw/gpio.c b/src/mainboard/purism/librem_bdw/gpio.c index 57afe56..e7cf560 100644 --- a/src/mainboard/purism/librem_bdw/gpio.c +++ b/src/mainboard/purism/librem_bdw/gpio.c @@ -3,100 +3,100 @@ #include <soc/gpio.h> const struct gpio_config mainboard_gpio_config[] = { - PCH_GPIO_INPUT, /* 0 */ - PCH_GPIO_INPUT, /* 1 */ - PCH_GPIO_INPUT, /* 2 */ - PCH_GPIO_INPUT, /* 3 */ - PCH_GPIO_INPUT, /* 4 */ - PCH_GPIO_INPUT, /* 5 */ - PCH_GPIO_INPUT, /* 6 */ - PCH_GPIO_INPUT, /* 7 */ - PCH_GPIO_INPUT, /* 8 */ - PCH_GPIO_INPUT, /* 9 */ - PCH_GPIO_ACPI_SCI, /* 10 */ - PCH_GPIO_INPUT, /* 11 */ - PCH_GPIO_INPUT, /* 12 */ - PCH_GPIO_INPUT, /* 13 */ - PCH_GPIO_INPUT, /* 14 */ - PCH_GPIO_INPUT, /* 15 */ - PCH_GPIO_INPUT, /* 16 */ - PCH_GPIO_INPUT, /* 17 */ - PCH_GPIO_NATIVE, /* 18 */ - PCH_GPIO_NATIVE, /* 19 */ - PCH_GPIO_INPUT, /* 20 */ - PCH_GPIO_INPUT, /* 21 */ - PCH_GPIO_INPUT, /* 22 */ - PCH_GPIO_INPUT, /* 23 */ - PCH_GPIO_INPUT, /* 24 */ - PCH_GPIO_INPUT, /* 25 */ - PCH_GPIO_INPUT, /* 26 */ - PCH_GPIO_INPUT, /* 27 */ - PCH_GPIO_INPUT, /* 28 */ - PCH_GPIO_NATIVE, /* 29 */ - PCH_GPIO_NATIVE, /* 30 */ - PCH_GPIO_NATIVE, /* 31 */ - PCH_GPIO_INPUT, /* 32 */ - PCH_GPIO_INPUT, /* 33 */ - PCH_GPIO_INPUT, /* 34 */ - PCH_GPIO_NATIVE, /* 35 */ - PCH_GPIO_NATIVE, /* 36 */ - PCH_GPIO_NATIVE, /* 37 */ - PCH_GPIO_INPUT, /* 38 */ - PCH_GPIO_NATIVE, /* 39 */ - PCH_GPIO_NATIVE, /* 40 */ - PCH_GPIO_INPUT, /* 41 */ - PCH_GPIO_INPUT, /* 42 */ - PCH_GPIO_INPUT, /* 43 */ - PCH_GPIO_INPUT, /* 44 */ - PCH_GPIO_INPUT, /* 45 */ - PCH_GPIO_INPUT, /* 46 */ - PCH_GPIO_INPUT, /* 47 */ - PCH_GPIO_INPUT, /* 48 */ - PCH_GPIO_INPUT, /* 49 */ - PCH_GPIO_INPUT, /* 50 */ - PCH_GPIO_INPUT, /* 51 */ - PCH_GPIO_INPUT, /* 52 */ - PCH_GPIO_INPUT, /* 53 */ - PCH_GPIO_INPUT, /* 54 */ - PCH_GPIO_INPUT, /* 55 */ - PCH_GPIO_INPUT, /* 56 */ - PCH_GPIO_INPUT, /* 57 */ - PCH_GPIO_INPUT, /* 58 */ - PCH_GPIO_INPUT, /* 59 */ - PCH_GPIO_INPUT, /* 60 */ - PCH_GPIO_NATIVE, /* 61 */ - PCH_GPIO_NATIVE, /* 62 */ - PCH_GPIO_NATIVE, /* 63 */ - PCH_GPIO_INPUT, /* 64 */ - PCH_GPIO_INPUT, /* 65 */ - PCH_GPIO_INPUT, /* 66 */ - PCH_GPIO_INPUT, /* 67 */ - PCH_GPIO_INPUT, /* 68 */ - PCH_GPIO_INPUT, /* 69 */ - PCH_GPIO_INPUT, /* 70 */ - PCH_GPIO_NATIVE, /* 71 */ - PCH_GPIO_NATIVE, /* 72 */ - PCH_GPIO_INPUT, /* 73 */ - PCH_GPIO_NATIVE, /* 74 */ - PCH_GPIO_NATIVE, /* 75 */ - PCH_GPIO_NATIVE, /* 76 */ - PCH_GPIO_INPUT, /* 77 */ - PCH_GPIO_INPUT, /* 78 */ - PCH_GPIO_INPUT, /* 79 */ - PCH_GPIO_INPUT, /* 80 */ - PCH_GPIO_NATIVE, /* 81 */ - PCH_GPIO_NATIVE, /* 82 */ - PCH_GPIO_INPUT, /* 83 */ - PCH_GPIO_INPUT, /* 84 */ - PCH_GPIO_INPUT, /* 85 */ - PCH_GPIO_INPUT, /* 86 */ - PCH_GPIO_INPUT, /* 87 */ - PCH_GPIO_INPUT, /* 88 */ - PCH_GPIO_INPUT, /* 89 */ - PCH_GPIO_INPUT, /* 90 */ - PCH_GPIO_INPUT, /* 91 */ - PCH_GPIO_INPUT, /* 92 */ - PCH_GPIO_INPUT, /* 93 */ - PCH_GPIO_INPUT, /* 94 */ - PCH_GPIO_END + LP_GPIO_INPUT, /* 0 */ + LP_GPIO_INPUT, /* 1 */ + LP_GPIO_INPUT, /* 2 */ + LP_GPIO_INPUT, /* 3 */ + LP_GPIO_INPUT, /* 4 */ + LP_GPIO_INPUT, /* 5 */ + LP_GPIO_INPUT, /* 6 */ + LP_GPIO_INPUT, /* 7 */ + LP_GPIO_INPUT, /* 8 */ + LP_GPIO_INPUT, /* 9 */ + LP_GPIO_ACPI_SCI, /* 10 */ + LP_GPIO_INPUT, /* 11 */ + LP_GPIO_INPUT, /* 12 */ + LP_GPIO_INPUT, /* 13 */ + LP_GPIO_INPUT, /* 14 */ + LP_GPIO_INPUT, /* 15 */ + LP_GPIO_INPUT, /* 16 */ + LP_GPIO_INPUT, /* 17 */ + LP_GPIO_NATIVE, /* 18 */ + LP_GPIO_NATIVE, /* 19 */ + LP_GPIO_INPUT, /* 20 */ + LP_GPIO_INPUT, /* 21 */ + LP_GPIO_INPUT, /* 22 */ + LP_GPIO_INPUT, /* 23 */ + LP_GPIO_INPUT, /* 24 */ + LP_GPIO_INPUT, /* 25 */ + LP_GPIO_INPUT, /* 26 */ + LP_GPIO_INPUT, /* 27 */ + LP_GPIO_INPUT, /* 28 */ + LP_GPIO_NATIVE, /* 29 */ + LP_GPIO_NATIVE, /* 30 */ + LP_GPIO_NATIVE, /* 31 */ + LP_GPIO_INPUT, /* 32 */ + LP_GPIO_INPUT, /* 33 */ + LP_GPIO_INPUT, /* 34 */ + LP_GPIO_NATIVE, /* 35 */ + LP_GPIO_NATIVE, /* 36 */ + LP_GPIO_NATIVE, /* 37 */ + LP_GPIO_INPUT, /* 38 */ + LP_GPIO_NATIVE, /* 39 */ + LP_GPIO_NATIVE, /* 40 */ + LP_GPIO_INPUT, /* 41 */ + LP_GPIO_INPUT, /* 42 */ + LP_GPIO_INPUT, /* 43 */ + LP_GPIO_INPUT, /* 44 */ + LP_GPIO_INPUT, /* 45 */ + LP_GPIO_INPUT, /* 46 */ + LP_GPIO_INPUT, /* 47 */ + LP_GPIO_INPUT, /* 48 */ + LP_GPIO_INPUT, /* 49 */ + LP_GPIO_INPUT, /* 50 */ + LP_GPIO_INPUT, /* 51 */ + LP_GPIO_INPUT, /* 52 */ + LP_GPIO_INPUT, /* 53 */ + LP_GPIO_INPUT, /* 54 */ + LP_GPIO_INPUT, /* 55 */ + LP_GPIO_INPUT, /* 56 */ + LP_GPIO_INPUT, /* 57 */ + LP_GPIO_INPUT, /* 58 */ + LP_GPIO_INPUT, /* 59 */ + LP_GPIO_INPUT, /* 60 */ + LP_GPIO_NATIVE, /* 61 */ + LP_GPIO_NATIVE, /* 62 */ + LP_GPIO_NATIVE, /* 63 */ + LP_GPIO_INPUT, /* 64 */ + LP_GPIO_INPUT, /* 65 */ + LP_GPIO_INPUT, /* 66 */ + LP_GPIO_INPUT, /* 67 */ + LP_GPIO_INPUT, /* 68 */ + LP_GPIO_INPUT, /* 69 */ + LP_GPIO_INPUT, /* 70 */ + LP_GPIO_NATIVE, /* 71 */ + LP_GPIO_NATIVE, /* 72 */ + LP_GPIO_INPUT, /* 73 */ + LP_GPIO_NATIVE, /* 74 */ + LP_GPIO_NATIVE, /* 75 */ + LP_GPIO_NATIVE, /* 76 */ + LP_GPIO_INPUT, /* 77 */ + LP_GPIO_INPUT, /* 78 */ + LP_GPIO_INPUT, /* 79 */ + LP_GPIO_INPUT, /* 80 */ + LP_GPIO_NATIVE, /* 81 */ + LP_GPIO_NATIVE, /* 82 */ + LP_GPIO_INPUT, /* 83 */ + LP_GPIO_INPUT, /* 84 */ + LP_GPIO_INPUT, /* 85 */ + LP_GPIO_INPUT, /* 86 */ + LP_GPIO_INPUT, /* 87 */ + LP_GPIO_INPUT, /* 88 */ + LP_GPIO_INPUT, /* 89 */ + LP_GPIO_INPUT, /* 90 */ + LP_GPIO_INPUT, /* 91 */ + LP_GPIO_INPUT, /* 92 */ + LP_GPIO_INPUT, /* 93 */ + LP_GPIO_INPUT, /* 94 */ + LP_GPIO_END }; diff --git a/src/soc/intel/broadwell/include/soc/gpio.h b/src/soc/intel/broadwell/include/soc/gpio.h index e11ceb8..bff7ee6 100644 --- a/src/soc/intel/broadwell/include/soc/gpio.h +++ b/src/soc/intel/broadwell/include/soc/gpio.h @@ -90,61 +90,61 @@ #define GPIO_PIRQ_APIC_MASK 0 #define GPIO_PIRQ_APIC_ROUTE 1 -#define PCH_GPIO_END \ +#define LP_GPIO_END \ { .conf0 = GPIO_LIST_END } -#define PCH_GPIO_NATIVE \ +#define LP_GPIO_NATIVE \ { .conf0 = GPIO_MODE_NATIVE } -#define PCH_GPIO_UNUSED \ +#define LP_GPIO_UNUSED \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT, \ .owner = GPIO_OWNER_GPIO, \ .conf1 = GPIO_SENSE_DISABLE } -#define PCH_GPIO_ACPI_SCI \ +#define LP_GPIO_ACPI_SCI \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT, \ .owner = GPIO_OWNER_ACPI, \ .route = GPIO_ROUTE_SCI } -#define PCH_GPIO_ACPI_SMI \ +#define LP_GPIO_ACPI_SMI \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT, \ .owner = GPIO_OWNER_ACPI, \ .route = GPIO_ROUTE_SMI } -#define PCH_GPIO_INPUT \ +#define LP_GPIO_INPUT \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT, \ .owner = GPIO_OWNER_GPIO } -#define PCH_GPIO_INPUT_INVERT \ +#define LP_GPIO_INPUT_INVERT \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT, \ .owner = GPIO_OWNER_GPIO } -#define PCH_GPIO_IRQ_EDGE \ +#define LP_GPIO_IRQ_EDGE \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_EDGE, \ .owner = GPIO_OWNER_GPIO, \ .irqen = GPIO_IRQ_ENABLE } -#define PCH_GPIO_IRQ_LEVEL \ +#define LP_GPIO_IRQ_LEVEL \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_IRQ_LEVEL, \ .owner = GPIO_OWNER_GPIO, \ .irqen = GPIO_IRQ_ENABLE } -#define PCH_GPIO_PIRQ \ +#define LP_GPIO_PIRQ \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT, \ .owner = GPIO_OWNER_GPIO, \ .pirq = GPIO_PIRQ_APIC_ROUTE } -#define PCH_GPIO_PIRQ_INVERT \ +#define LP_GPIO_PIRQ_INVERT \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_INPUT | GPIO_INVERT, \ .owner = GPIO_OWNER_GPIO, \ .pirq = GPIO_PIRQ_APIC_ROUTE } -#define PCH_GPIO_OUT_HIGH \ +#define LP_GPIO_OUT_HIGH \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_OUTPUT | GPO_LEVEL_HIGH, \ .owner = GPIO_OWNER_GPIO, \ .conf1 = GPIO_SENSE_DISABLE } -#define PCH_GPIO_OUT_LOW \ +#define LP_GPIO_OUT_LOW \ { .conf0 = GPIO_MODE_GPIO | GPIO_DIR_OUTPUT | GPO_LEVEL_LOW, \ .owner = GPIO_OWNER_GPIO, \ .conf1 = GPIO_SENSE_DISABLE } -- To view, visit https://review.coreboot.org/c/coreboot/+/49283 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I32566ac4df7175bb4ba3e1f7216aa36de2b821a1 Gerrit-Change-Number: 49283 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE`
by Angel Pons (Code Review) 10 Jan '21

10 Jan '21

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49282 ) Change subject: soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE` ...................................................................... soc/intel/denverton_ns: Drop redundant `DEFAULT_ACPI_BASE` It is only used in one place, and there's two other equivalent macros. Change-Id: I7c8241e28f688abd2df8180559dd02ee441c7023 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/denverton_ns/include/soc/iomap.h M src/soc/intel/denverton_ns/pmc.c 2 files changed, 1 insertion(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/49282/1 diff --git a/src/soc/intel/denverton_ns/include/soc/iomap.h b/src/soc/intel/denverton_ns/include/soc/iomap.h index fb5aafd..c252ca1 100644 --- a/src/soc/intel/denverton_ns/include/soc/iomap.h +++ b/src/soc/intel/denverton_ns/include/soc/iomap.h @@ -12,7 +12,6 @@ /* Southbridge internal device IO BARs (Set to match FSP settings) */ #define DEFAULT_PMBASE 0x1800 -#define DEFAULT_ACPI_BASE DEFAULT_PMBASE #define ACPI_BASE_ADDRESS DEFAULT_PMBASE #define DEFAULT_TCO_BASE 0x400 diff --git a/src/soc/intel/denverton_ns/pmc.c b/src/soc/intel/denverton_ns/pmc.c index 8755825..258e6a4 100644 --- a/src/soc/intel/denverton_ns/pmc.c +++ b/src/soc/intel/denverton_ns/pmc.c @@ -16,7 +16,7 @@ /* While we read BAR dynamically in case it changed, let's * initialize it with a same value */ -static u16 acpi_base = DEFAULT_ACPI_BASE; +static u16 acpi_base = ACPI_BASE_ADDRESS; static u32 pwrm_base = DEFAULT_PWRM_BASE; static void pch_power_options(struct device *dev) { /* TODO */ } -- To view, visit https://review.coreboot.org/c/coreboot/+/49282 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c8241e28f688abd2df8180559dd02ee441c7023 Gerrit-Change-Number: 49282 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: [WIP] ChromeOS: Refactor SMBIOS type0 bios_version()
by build bot (Jenkins) (Code Review) 10 Jan '21

10 Jan '21

Attention is currently required from: Lance Zhao. build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/49281 ) Change subject: [WIP] ChromeOS: Refactor SMBIOS type0 bios_version() ...................................................................... Patch Set 1: (1 comment) File src/arch/x86/smbios.c: https://review.coreboot.org/c/coreboot/+/49281/comment/0a08a728_c7e77a3f PS1, Line 418: if (CONFIG(CHROMEOS)) { trailing statements should be on next line -- To view, visit https://review.coreboot.org/c/coreboot/+/49281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9405afbea29b896488b4cdd6dd32c4db686fe48c Gerrit-Change-Number: 49281 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Lance Zhao Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Lance Zhao Gerrit-Comment-Date: Sun, 10 Jan 2021 17:01:46 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: [WIP] ChromeOS: Refactor SMBIOS type0 bios_version()
by Kyösti Mälkki (Code Review) 10 Jan '21

10 Jan '21

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/49281 ) Change subject: [WIP] ChromeOS: Refactor SMBIOS type0 bios_version() ...................................................................... [WIP] ChromeOS: Refactor SMBIOS type0 bios_version() Pointer to an empty string (filled with spaces) is stored inside GNVS and depthcharge fills it in? Change-Id: I9405afbea29b896488b4cdd6dd32c4db686fe48c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/acpi/chromeos-gnvs.c M src/arch/x86/smbios.c M src/include/acpi/acpi_gnvs.h 3 files changed, 23 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/49281/1 diff --git a/src/acpi/chromeos-gnvs.c b/src/acpi/chromeos-gnvs.c index 8d96769..ff073f3 100644 --- a/src/acpi/chromeos-gnvs.c +++ b/src/acpi/chromeos-gnvs.c @@ -27,3 +27,13 @@ gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW; } + +void gnvs_set_vbt10(void) +{ + chromeos_acpi_t *gnvs_chromeos = gnvs_chromeos_ptr(acpi_get_gnvs()); + if (!gnvs_chromeos) + return; + + /* Location of smbios_type0.bios_version() string filled with spaces. */ + gnvs_chromeos->vbt10 = smbios_type0_bios_version_address(); +} diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index aaf989d..8ab7c05 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -16,9 +16,6 @@ #include <device/pci_ids.h> #include <device/pci_def.h> #include <device/pci.h> -#if CONFIG(CHROMEOS) -#include <vendorcode/google/chromeos/gnvs.h> -#endif #include <drivers/vpd/vpd.h> #include <stdlib.h> @@ -398,6 +395,13 @@ return coreboot_version; } +static uintptr_t bios_version_address; + +uintptr_t smbios_type0_bios_version_address(void) +{ + return bios_version_address; +} + static int smbios_write_type0(unsigned long *current, int handle) { struct smbios_type0 *t = (struct smbios_type0 *)*current; @@ -411,11 +415,11 @@ t->vendor = smbios_add_string(t->eos, "coreboot"); t->bios_release_date = smbios_add_string(t->eos, coreboot_dmi_date); -#if CONFIG(CHROMEOS) && CONFIG(HAVE_ACPI_TABLES) - u32 version_offset = (u32)smbios_string_table_len(t->eos); - /* SMBIOS offsets start at 1 rather than 0 */ - chromeos_get_chromeos_acpi()->vbt10 = (uintptr_t)t->eos + (version_offset - 1); -#endif + if (CONFIG(CHROMEOS)) { + /* SMBIOS offsets start at 1 rather than 0 */ + bios_version_address = (uintptr_t)t->eos; + bios_version_address += (u32)smbios_string_table_len(t->eos) - 1; + } t->bios_version = smbios_add_string(t->eos, get_bios_version()); uint32_t rom_size = CONFIG_ROM_SIZE; rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB); diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h index b5f65ca..32aaf28 100644 --- a/src/include/acpi/acpi_gnvs.h +++ b/src/include/acpi/acpi_gnvs.h @@ -11,6 +11,7 @@ void gnvs_assign_chromeos(void); void gnvs_set_ecfw_rw(void); +void gnvs_set_vbt10(uintptr_t bios_version); /* Platform code must implement these. */ struct global_nvs; -- To view, visit https://review.coreboot.org/c/coreboot/+/49281 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9405afbea29b896488b4cdd6dd32c4db686fe48c Gerrit-Change-Number: 49281 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit January 2021