coreboot-gerrit August 2020

coreboot-gerrit@coreboot.org

1 participants
2457 discussions

Change in coreboot[master]: amd/picasso/acpi: Add power resources for UART0
by Kangheui Won (Code Review) 07 Aug '20

07 Aug '20

Kangheui Won has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/44266 ) Change subject: amd/picasso/acpi: Add power resources for UART0 ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/c/coreboot/+/44266/1//COMMIT_MSG Commit Message: https://review.coreboot.org/c/coreboot/+/44266/1//COMMIT_MSG@9 PS1, Line 9: Follow-up for CB:42473. > Please reference commit hashes, as that is, what git works with. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/44266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25457e18b69d28a83e42c2fe02b45a3979ad58cd Gerrit-Change-Number: 44266 Gerrit-PatchSet: 2 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Thu, 06 Aug 2020 22:39:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: amd/picasso/acpi: Add power resources for UART0
by Kangheui Won (Code Review) 07 Aug '20

07 Aug '20

Hello build bot (Jenkins), Raul Rangel, Aaron Durbin, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/44266 to look at the new patch set (#2). Change subject: amd/picasso/acpi: Add power resources for UART0 ...................................................................... amd/picasso/acpi: Add power resources for UART0 Follow-up for a31a769 - "amd/picasso/acpi: Add power resources for I2C and UART". Now PSP properly handles UART0 D3, we can shutdown UART0. BUG=b:158772504 TEST=suspend_stress_test for 50 cycles, * echo 1 > /sys/module/acpi/parameters/aml_debug_output * dmesg | grep FUR to check on&off for FUR0 [ 2413.647500] ACPI Debug: "AOAC.FUR0._OFF" [ 2413.736265] ACPI Debug: "AOAC.FUR0._ON" Change-Id: I25457e18b69d28a83e42c2fe02b45a3979ad58cd Signed-off-by: Kangheui Won <khwon(a)chromium.org> --- M src/soc/amd/picasso/acpi/aoac.asl M src/soc/amd/picasso/acpi/sb_fch.asl 2 files changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/44266/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/44266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I25457e18b69d28a83e42c2fe02b45a3979ad58cd Gerrit-Change-Number: 44266 Gerrit-PatchSet: 2 Gerrit-Owner: Kangheui Won <khwon(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: mb/google/kukui: Add a new config 'Fennel'
by Tao Xia (Code Review) 07 Aug '20

07 Aug '20

Tao Xia has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44061 ) Change subject: mb/google/kukui: Add a new config 'Fennel' ...................................................................... mb/google/kukui: Add a new config 'Fennel' A new board introduced to Kukui family. BUG=b:162042552 TEST=make # select Fennel BRANCH=kukui Signed-off-by: xiatao5 <xiatao5(a)huaqin.corp-partner.google.com> Change-Id: I1f742a36793f38c37fbd4e1b4cbddbd542e785ec --- M src/mainboard/google/kukui/Kconfig M src/mainboard/google/kukui/Kconfig.name 2 files changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/44061/1 diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig index 906dfea..e06e60f 100644 --- a/src/mainboard/google/kukui/Kconfig +++ b/src/mainboard/google/kukui/Kconfig @@ -57,6 +57,7 @@ default "Willow" if BOARD_GOOGLE_WILLOW default "Esche" if BOARD_GOOGLE_ESCHE default "Burnet" if BOARD_GOOGLE_BURNET + default "Fennel" if BOARD_GOOGLE_FENNEL config DRIVER_TPM_SPI_BUS hex diff --git a/src/mainboard/google/kukui/Kconfig.name b/src/mainboard/google/kukui/Kconfig.name index 77cdc67..3558113 100644 --- a/src/mainboard/google/kukui/Kconfig.name +++ b/src/mainboard/google/kukui/Kconfig.name @@ -57,3 +57,7 @@ config BOARD_GOOGLE_BURNET bool "-> Burnet" select BOARD_GOOGLE_JACUZZI_COMMON + +config BOARD_GOOGLE_FENNEL + bool "-> Fennel" + select BOARD_GOOGLE_JACUZZI_COMMON -- To view, visit https://review.coreboot.org/c/coreboot/+/44061 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f742a36793f38c37fbd4e1b4cbddbd542e785ec Gerrit-Change-Number: 44061 Gerrit-PatchSet: 1 Gerrit-Owner: Tao Xia <xiatao5(a)huaqin.corp-partner.google.com> Gerrit-MessageType: newchange

6 9

Change in coreboot[master]: drivers/nvidia/optimus: Write _ROM method
by Angel Pons (Code Review) 07 Aug '20

07 Aug '20

Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43074 ) Change subject: drivers/nvidia/optimus: Write _ROM method ...................................................................... Patch Set 4: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/43074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida87aebf8fdf341ab350c2bb3704d2ef695cf8f0 Gerrit-Change-Number: 43074 Gerrit-PatchSet: 4 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jeremy Soller <jeremy(a)system76.com> Gerrit-CC: Prasun Gera Gerrit-Comment-Date: Thu, 06 Aug 2020 20:34:11 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: drivers/nvidia/optimus: Write _ROM method
by Benjamin Doron (Code Review) 07 Aug '20

07 Aug '20

Hello build bot (Jenkins), Patrick Georgi, Martin Roth, Patrick Rudolph, Evgeny Zinoviev, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/43074 to look at the new patch set (#4). Change subject: drivers/nvidia/optimus: Write _ROM method ...................................................................... drivers/nvidia/optimus: Write _ROM method Make OptionROM available to an OS driver, which may require the configuration data contained within. This may be required for GPUs that do not contain their vBIOS, or perhaps the drivers require it in this form/fashion. Working on an Acer Aspire VN7-572G (Skylake-U). nouveau successfully obtains the vBIOS via ACPI. Example: Kconfig: select DRIVERS_NVIDIA_OPTIMUS devicetree.cb: device pci 1c.0 on chip drivers/nvidia/optimus device pci 00.0 on end end end Change-Id: Ida87aebf8fdf341ab350c2bb3704d2ef695cf8f0 Signed-off-by: Benjamin Doron <benjamin.doron00(a)gmail.com> --- A src/drivers/nvidia/optimus/Makefile.inc A src/drivers/nvidia/optimus/optimus_vbios.c 2 files changed, 50 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/43074/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/43074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida87aebf8fdf341ab350c2bb3704d2ef695cf8f0 Gerrit-Change-Number: 43074 Gerrit-PatchSet: 4 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Jeremy Soller <jeremy(a)system76.com> Gerrit-CC: Prasun Gera Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: drivers/nvidia/optimus: Write _ROM method
by Benjamin Doron (Code Review) 07 Aug '20

07 Aug '20

Benjamin Doron has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/43074 ) Change subject: drivers/nvidia/optimus: Write _ROM method ...................................................................... Patch Set 3: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/43074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ida87aebf8fdf341ab350c2bb3704d2ef695cf8f0 Gerrit-Change-Number: 43074 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Evgeny Zinoviev <me(a)ch1p.io> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Jeremy Soller <jeremy(a)system76.com> Gerrit-CC: Prasun Gera Gerrit-Comment-Date: Thu, 06 Aug 2020 20:27:48 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: mb/google/zork: Configure GPIO_89 as PAD_NC
by Furquan Shaikh (Code Review) 07 Aug '20

07 Aug '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44190 ) Change subject: mb/google/zork: Configure GPIO_89 as PAD_NC ...................................................................... mb/google/zork: Configure GPIO_89 as PAD_NC GPIO_89 was marked as EN_DEV_BEEP_L in pre-v3.6 schematics, but it was never really used on any of the zork variants. Starting with v3.6, GPIO_89 is left unused in schematics. This change configures GPIO_89 as PAD_NC for all variants since it was never used. BUG=b:62108046 Change-Id: I026cd6cb598667ce6e115c3ec9357a6a56051d39 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/44190/1 diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index a07529f..a9ba801 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -103,8 +103,8 @@ PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE), /* EMMC_DATA5 */ PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE), - /* EN_DEV_BEEP_L */ - PAD_GPO(GPIO_89, HIGH), + /* GPIO_89 - unused*/ + PAD_NC(GPIO_89), /* RAM ID 1 */ PAD_GPI(GPIO_90, PULL_NONE), /* EN_SPKR */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index c6c728e..978b5aa 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -109,8 +109,8 @@ PAD_NF(GPIO_87, EMMC_DATA7, PULL_NONE), /* EMMC_DATA5 */ PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE), - /* EN_DEV_BEEP_L */ - PAD_GPO(GPIO_89, HIGH), + /* GPIO_89 - unused */ + PAD_NC(GPIO_89), /* Testpoint */ PAD_NC(GPIO_90), /* EN_SPKR */ -- To view, visit https://review.coreboot.org/c/coreboot/+/44190 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I026cd6cb598667ce6e115c3ec9357a6a56051d39 Gerrit-Change-Number: 44190 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

3 9

Change in coreboot[master]: mb/google/zork: Add touchscreen power control
by Furquan Shaikh (Code Review) 07 Aug '20

07 Aug '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44193 ) Change subject: mb/google/zork: Add touchscreen power control ...................................................................... mb/google/zork: Add touchscreen power control This change adds support for touchscreen power control using: * GPIO_90 for trembyle based boards * GPIO_32 for dalboz based boards By default, baseboard tables configure these GPIOs as PAD_GPO driven low and override trees expose these pads as enable_gpio to be used by ACPI power resource. In order to support pre-v3.6 boards, override tables configure these pads as PAD_NC and drop the enable_gpio setting from device tree based on board version. BUG=b:161935640, b:162747210 Change-Id: Iba5e36b65b44ea11613b4d5fc8f13ce6433f83ab Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/ramstage_common.c M src/mainboard/google/zork/variants/berknip/gpio.c M src/mainboard/google/zork/variants/berknip/overridetree.cb M src/mainboard/google/zork/variants/dalboz/gpio.c M src/mainboard/google/zork/variants/dirinboz/gpio.c M src/mainboard/google/zork/variants/ezkinil/gpio.c M src/mainboard/google/zork/variants/ezkinil/overridetree.cb M src/mainboard/google/zork/variants/morphius/gpio.c M src/mainboard/google/zork/variants/morphius/overridetree.cb M src/mainboard/google/zork/variants/vilboz/gpio.c M src/mainboard/google/zork/variants/vilboz/overridetree.cb M src/mainboard/google/zork/variants/woomax/gpio.c M src/mainboard/google/zork/variants/woomax/overridetree.cb 15 files changed, 40 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/44193/1 diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index a48773e..1cd08e3 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -65,8 +65,8 @@ PAD_NF(GPIO_30, ESPI_CS_L, PULL_NONE), /* EC_AP_INT_ODL (Sensor Framesync) */ PAD_GPI(GPIO_31, PULL_NONE), - /* TP */ - PAD_NC(GPIO_32), + /* EN_PWR_TOUCHSCREEN */ + PAD_GPO(GPIO_32, LOW), /* GPIO_33 - GPIO_39: Not available */ /* NVME_AUX_RESET_L */ PAD_GPO(GPIO_40, HIGH), diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index ec5a2d0..08a9564 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -111,8 +111,8 @@ PAD_NF(GPIO_88, EMMC_DATA5, PULL_NONE), /* GPIO_89 - unused */ PAD_NC(GPIO_89), - /* Testpoint */ - PAD_NC(GPIO_90), + /* EN_PWR_TOUCHSCREEN */ + PAD_GPO(GPIO_90, LOW), /* EN_SPKR */ PAD_GPO(GPIO_91, LOW), /* CLK_REQ0_L - WIFI */ diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c index 681087c..4c8a60e 100644 --- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c +++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c @@ -240,5 +240,7 @@ continue; cfg->reset_gpio.active_low = 0; + cfg->enable_gpio.pin_count = 0; + cfg->enable_gpio.pins[0] = 0; } } diff --git a/src/mainboard/google/zork/variants/berknip/gpio.c b/src/mainboard/google/zork/variants/berknip/gpio.c index 2a43b5a..e92bc17 100644 --- a/src/mainboard/google/zork/variants/berknip/gpio.c +++ b/src/mainboard/google/zork/variants/berknip/gpio.c @@ -27,6 +27,8 @@ }; static const struct soc_amd_gpio berknip_bid2_gpio_set_stage_ram[] = { + /* TP */ + PAD_NC(GPIO_90), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), }; diff --git a/src/mainboard/google/zork/variants/berknip/overridetree.cb b/src/mainboard/google/zork/variants/berknip/overridetree.cb index 45b80a2..58f5844 100644 --- a/src/mainboard/google/zork/variants/berknip/overridetree.cb +++ b/src/mainboard/google/zork/variants/berknip/overridetree.cb @@ -71,6 +71,8 @@ register "desc" = ""Raydium Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "enable_delay_ms" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" # 32ms: Rise time of the reset line # 20ms: Firmware ready time @@ -84,6 +86,8 @@ register "desc" = ""ELAN Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "enable_delay_ms" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "reset_delay_ms" = "20" register "has_power_resource" = "1" @@ -94,6 +98,8 @@ register "generic.desc" = ""G2TOUCH Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" register "generic.probed" = "1" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "generic.enable_delay_ms" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_delay_ms" = "50" register "generic.has_power_resource" = "1" diff --git a/src/mainboard/google/zork/variants/dalboz/gpio.c b/src/mainboard/google/zork/variants/dalboz/gpio.c index 7b13d83..20a2fa3 100644 --- a/src/mainboard/google/zork/variants/dalboz/gpio.c +++ b/src/mainboard/google/zork/variants/dalboz/gpio.c @@ -13,6 +13,8 @@ PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC /* USB_OC2_L - USB A0 & A1 */ PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE), + /* TP */ + PAD_NC(GPIO_32), /* EN_PWR_TOUCHPAD_PS2 */ PAD_GPO(GPIO_67, HIGH), /* USI_RESET */ @@ -24,6 +26,8 @@ static const struct soc_amd_gpio bid_2_gpio_set_stage_ram[] = { /* DMIC_SEL */ PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC + /* TP */ + PAD_NC(GPIO_32), /* EN_PWR_TOUCHPAD_PS2 */ PAD_GPO(GPIO_67, HIGH), /* USI_RESET */ diff --git a/src/mainboard/google/zork/variants/dirinboz/gpio.c b/src/mainboard/google/zork/variants/dirinboz/gpio.c index 7269b23..b79c1d6 100644 --- a/src/mainboard/google/zork/variants/dirinboz/gpio.c +++ b/src/mainboard/google/zork/variants/dirinboz/gpio.c @@ -8,6 +8,8 @@ #include <ec/google/chromeec/ec.h> static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { + /* TP */ + PAD_NC(GPIO_32), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), }; diff --git a/src/mainboard/google/zork/variants/ezkinil/gpio.c b/src/mainboard/google/zork/variants/ezkinil/gpio.c index b490b3a..1bbc301 100644 --- a/src/mainboard/google/zork/variants/ezkinil/gpio.c +++ b/src/mainboard/google/zork/variants/ezkinil/gpio.c @@ -39,6 +39,8 @@ PAD_NC(GPIO_69), /* MST_GPIO_2 (Fw Update HDMI hub) Change NC */ PAD_NC(GPIO_86), + /* TP */ + PAD_NC(GPIO_90), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), }; @@ -48,6 +50,8 @@ PAD_NC(GPIO_11), /* FPMCU_BOOT0 Change NC */ PAD_NC(GPIO_69), + /* TP */ + PAD_NC(GPIO_90), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), }; diff --git a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb index b06f4bc..82d21f6 100644 --- a/src/mainboard/google/zork/variants/ezkinil/overridetree.cb +++ b/src/mainboard/google/zork/variants/ezkinil/overridetree.cb @@ -73,6 +73,8 @@ register "desc" = ""Raydium Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "enable_delay_ms" = "1" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" # 32ms: Rise time of the reset line # 20ms: Firmware ready time @@ -86,6 +88,8 @@ register "generic.desc" = ""ELAN Touchscreen"" register "generic.probed" = "1" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "generic.enable_delay_ms" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_delay_ms" = "20" register "generic.has_power_resource" = "1" diff --git a/src/mainboard/google/zork/variants/morphius/gpio.c b/src/mainboard/google/zork/variants/morphius/gpio.c index ece2dd6..8376e8c 100644 --- a/src/mainboard/google/zork/variants/morphius/gpio.c +++ b/src/mainboard/google/zork/variants/morphius/gpio.c @@ -48,6 +48,8 @@ }; static const struct soc_amd_gpio morphius_bid3_gpio_set_stage_ram[] = { + /* TP */ + PAD_NC(GPIO_90), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), }; diff --git a/src/mainboard/google/zork/variants/morphius/overridetree.cb b/src/mainboard/google/zork/variants/morphius/overridetree.cb index caaddb8..e39596d 100644 --- a/src/mainboard/google/zork/variants/morphius/overridetree.cb +++ b/src/mainboard/google/zork/variants/morphius/overridetree.cb @@ -71,6 +71,8 @@ register "generic.desc" = ""Goodix Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" register "generic.probed" = "1" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "generic.enable_delay_ms" = "10" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_delay_ms" = "120" register "generic.reset_off_delay_ms" = "1" diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c index 7269b23..b79c1d6 100644 --- a/src/mainboard/google/zork/variants/vilboz/gpio.c +++ b/src/mainboard/google/zork/variants/vilboz/gpio.c @@ -8,6 +8,8 @@ #include <ec/google/chromeec/ec.h> static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { + /* TP */ + PAD_NC(GPIO_32), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), }; diff --git a/src/mainboard/google/zork/variants/vilboz/overridetree.cb b/src/mainboard/google/zork/variants/vilboz/overridetree.cb index 17cc17c..0f7198b 100644 --- a/src/mainboard/google/zork/variants/vilboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/vilboz/overridetree.cb @@ -91,6 +91,8 @@ register "generic.desc" = ""Goodix Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" register "generic.probed" = "1" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_32)" + register "generic.enable_delay_ms" = "10" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_off_delay_ms" = "1" register "generic.reset_delay_ms" = "120" diff --git a/src/mainboard/google/zork/variants/woomax/gpio.c b/src/mainboard/google/zork/variants/woomax/gpio.c index 3625a71..d493882 100644 --- a/src/mainboard/google/zork/variants/woomax/gpio.c +++ b/src/mainboard/google/zork/variants/woomax/gpio.c @@ -18,6 +18,8 @@ PAD_NC(GPIO_69), /* RAM_ID_4 */ PAD_NC(GPIO_84), + /* TP */ + PAD_NC(GPIO_90), /* USI_RESET */ PAD_GPO(GPIO_140, HIGH), /* GPIO_141 NC */ diff --git a/src/mainboard/google/zork/variants/woomax/overridetree.cb b/src/mainboard/google/zork/variants/woomax/overridetree.cb index bdcc9bb..557e032 100644 --- a/src/mainboard/google/zork/variants/woomax/overridetree.cb +++ b/src/mainboard/google/zork/variants/woomax/overridetree.cb @@ -69,6 +69,8 @@ register "generic.desc" = ""ELAN Touchscreen"" register "generic.probed" = "1" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" + register "generic.enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_90)" + register "generic.enable_delay_ms" = "1" register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" register "generic.reset_delay_ms" = "20" register "generic.has_power_resource" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/44193 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iba5e36b65b44ea11613b4d5fc8f13ce6433f83ab Gerrit-Change-Number: 44193 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: newchange

2 10

Change in coreboot[master]: mb/google/zork: Switch USI_RESET to active low polarity for v3.6+
by Furquan Shaikh (Code Review) 07 Aug '20

07 Aug '20

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44192 ) Change subject: mb/google/zork: Switch USI_RESET to active low polarity for v3.6+ ...................................................................... mb/google/zork: Switch USI_RESET to active low polarity for v3.6+ v3.6 of reference schematics have switched the polarity of reset signal to touchscreen controller from active high to active low. This change updates the default configuration in baseboard gpio tables to set the reset GPIO to output low and override tables in variants to set the reset GPIO to output high. Additionally, devicetree by default exposes ACTIVE_LOW configuration for reset GPIO. In order to support pre-v3.6 boards, reset GPIO is updated to ACTIVE_HIGH based on board version. BUG=b:161937506 Change-Id: I092f274d8eb1920a1cd6d3eccbe8f26b0b28928a Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/zork/mainboard.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c M src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c M src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h M src/mainboard/google/zork/variants/baseboard/ramstage_common.c M src/mainboard/google/zork/variants/berknip/gpio.c M src/mainboard/google/zork/variants/dalboz/gpio.c M src/mainboard/google/zork/variants/dalboz/overridetree.cb M src/mainboard/google/zork/variants/dirinboz/Makefile.inc A src/mainboard/google/zork/variants/dirinboz/gpio.c M src/mainboard/google/zork/variants/ezkinil/gpio.c M src/mainboard/google/zork/variants/morphius/gpio.c M src/mainboard/google/zork/variants/trembyle/gpio.c M src/mainboard/google/zork/variants/trembyle/overridetree.cb M src/mainboard/google/zork/variants/vilboz/Makefile.inc A src/mainboard/google/zork/variants/vilboz/gpio.c M src/mainboard/google/zork/variants/woomax/gpio.c 17 files changed, 165 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/44192/1 diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c index 1e4ea06..4206fdf 100644 --- a/src/mainboard/google/zork/mainboard.c +++ b/src/mainboard/google/zork/mainboard.c @@ -136,6 +136,7 @@ { variant_audio_update(); variant_bluetooth_update(); + variant_touchscreen_update(); variant_devtree_update(); } diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c index a9ba801..a48773e 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_dalboz.c @@ -150,8 +150,8 @@ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), /* DEV_BEEP_BCLK */ PAD_GPI(GPIO_139, PULL_NONE), - /* USI_RESET */ - PAD_GPO(GPIO_140, HIGH), + /* USI_RESET_L */ + PAD_GPO(GPIO_140, LOW), /* USB_HUB_RST_L */ PAD_GPO(GPIO_141, HIGH), /* SD_AUX_RESET_L */ diff --git a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c index 978b5aa..ec5a2d0 100644 --- a/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c +++ b/src/mainboard/google/zork/variants/baseboard/gpio_baseboard_trembyle.c @@ -164,8 +164,8 @@ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), /* DEV_BEEP_BCLK */ PAD_GPI(GPIO_139, PULL_NONE), - /* USI_RESET */ - PAD_GPO(GPIO_140, HIGH), + /* USI_RESET_L */ + PAD_GPO(GPIO_140, LOW), /* UART1_RXD - FPMCU */ PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), /* SD_AUX_RESET_L */ diff --git a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h index 8770944..93aad0f 100644 --- a/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/zork/variants/baseboard/include/baseboard/variants.h @@ -37,6 +37,8 @@ void variant_audio_update(void); /* Update bluetooth configuration in devicetree during ramstage. */ void variant_bluetooth_update(void); +/* Update touchscreen configuration in devicetree during ramstage. */ +void variant_touchscreen_update(void); /* Configure PCIe GPIOs as per variant sequencing requirements. */ void variant_pcie_gpio_configure(void); diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c index 8a6fa47..681087c 100644 --- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c +++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c @@ -6,6 +6,7 @@ #include <device/device.h> #include <drivers/amd/i2s_machine_dev/chip.h> #include <drivers/i2c/generic/chip.h> +#include <drivers/i2c/hid/chip.h> #include <drivers/usb/acpi/chip.h> #include <ec/google/chromeec/ec.h> #include <soc/gpio.h> @@ -13,7 +14,7 @@ extern struct chip_operations drivers_amd_i2s_machine_dev_ops; extern struct chip_operations drivers_i2c_generic_ops; - +extern struct chip_operations drivers_i2c_hid_ops; static void update_hp_int_odl(void) { @@ -202,3 +203,42 @@ baseboard_remove_bluetooth_reset_gpio(); } + +void variant_touchscreen_update(void) +{ + DEVTREE_CONST struct device *mmio_dev = NULL; + struct device *child = NULL; + + if (variant_uses_v3_6_schematics()) + return; + + while (1) { + mmio_dev = dev_find_path(mmio_dev, DEVICE_PATH_MMIO); + if (mmio_dev == NULL) + break; + if (mmio_dev->path.mmio.addr == 0xfedc4000) + break; + } + + while ((child = dev_bus_each_child(mmio_dev->link_list, child)) != NULL) { + struct drivers_i2c_generic_config *cfg; + + if (child->chip_info == NULL) + continue; + + if (child->chip_ops == &drivers_i2c_generic_ops) { + cfg = child->chip_info; + } else if (child->chip_ops == &drivers_i2c_hid_ops) { + struct drivers_i2c_hid_config *hid_cfg; + hid_cfg = child->chip_info; + cfg = &hid_cfg->generic; + } else { + continue; + } + + if (cfg->reset_gpio.pins[0] != GPIO_140) + continue; + + cfg->reset_gpio.active_low = 0; + } +} diff --git a/src/mainboard/google/zork/variants/berknip/gpio.c b/src/mainboard/google/zork/variants/berknip/gpio.c index 08b1c4d..2a43b5a 100644 --- a/src/mainboard/google/zork/variants/berknip/gpio.c +++ b/src/mainboard/google/zork/variants/berknip/gpio.c @@ -22,6 +22,13 @@ PAD_GPI(GPIO_86, PULL_NONE), /* MST_GPIO_3 (Fw Update HDMI hub) */ PAD_GPI(GPIO_90, PULL_NONE), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), +}; + +static const struct soc_amd_gpio berknip_bid2_gpio_set_stage_ram[] = { + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) @@ -39,6 +46,9 @@ if (board_version <= 1) { *size = ARRAY_SIZE(berknip_bid1_gpio_set_stage_ram); return berknip_bid1_gpio_set_stage_ram; + } else if (board_version <= 2) { + *size = ARRAY_SIZE(berknip_bid2_gpio_set_stage_ram); + return berknip_bid2_gpio_set_stage_ram; } *size = 0; diff --git a/src/mainboard/google/zork/variants/dalboz/gpio.c b/src/mainboard/google/zork/variants/dalboz/gpio.c index 73c0042..7b13d83 100644 --- a/src/mainboard/google/zork/variants/dalboz/gpio.c +++ b/src/mainboard/google/zork/variants/dalboz/gpio.c @@ -15,6 +15,8 @@ PAD_NF(GPIO_18, USB_OC2_L, PULL_NONE), /* EN_PWR_TOUCHPAD_PS2 */ PAD_GPO(GPIO_67, HIGH), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), /* Unused */ PAD_NC(GPIO_143), }; @@ -24,6 +26,8 @@ PAD_GPO(GPIO_6, LOW), // Select Camera 1 DMIC /* EN_PWR_TOUCHPAD_PS2 */ PAD_GPO(GPIO_67, HIGH), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) diff --git a/src/mainboard/google/zork/variants/dalboz/overridetree.cb b/src/mainboard/google/zork/variants/dalboz/overridetree.cb index 9fe15c5..8735a06 100644 --- a/src/mainboard/google/zork/variants/dalboz/overridetree.cb +++ b/src/mainboard/google/zork/variants/dalboz/overridetree.cb @@ -48,7 +48,7 @@ register "desc" = ""Raydium Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" # 32ms: Rise time of the reset line # 20ms: Firmware ready time register "reset_delay_ms" = "32 + 20" @@ -61,7 +61,7 @@ register "desc" = ""ELAN Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "reset_delay_ms" = "20" register "has_power_resource" = "1" device i2c 10 on end @@ -71,7 +71,7 @@ register "generic.desc" = ""Synaptics Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" register "generic.probed" = "1" - register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "generic.reset_delay_ms" = "45" register "generic.has_power_resource" = "1" register "generic.disable_gpio_export_in_crs" = "1" @@ -83,7 +83,7 @@ register "generic.desc" = ""Goodix Touchscreen"" register "generic.irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" register "generic.probed" = "1" - register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "generic.reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "generic.reset_delay_ms" = "120" register "generic.reset_off_delay_ms" = "1" register "generic.stop_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_144)" diff --git a/src/mainboard/google/zork/variants/dirinboz/Makefile.inc b/src/mainboard/google/zork/variants/dirinboz/Makefile.inc index 9dc5159..afdbf4d 100644 --- a/src/mainboard/google/zork/variants/dirinboz/Makefile.inc +++ b/src/mainboard/google/zork/variants/dirinboz/Makefile.inc @@ -1,3 +1,6 @@ # SPDX-License-Identifier: GPL-2.0-or-later subdirs-y += ../baseboard/spd + +ramstage-y += gpio.c + diff --git a/src/mainboard/google/zork/variants/dirinboz/gpio.c b/src/mainboard/google/zork/variants/dirinboz/gpio.c new file mode 100644 index 0000000..7269b23 --- /dev/null +++ b/src/mainboard/google/zork/variants/dirinboz/gpio.c @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> +#include <soc/gpio.h> +#include <ec/google/chromeec/ec.h> + +static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), +}; + +const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) +{ + uint32_t board_version; + + /* + * If board version cannot be read, assume that this is an older revision of the board + * and so apply overrides. If board version is provided by the EC, then apply overrides + * if version < 2. + */ + if (google_chromeec_cbi_get_board_version(&board_version)) + board_version = 1; + + if (board_version < 2) { + *size = ARRAY_SIZE(bid_1_gpio_set_stage_ram); + return bid_1_gpio_set_stage_ram; + } + + *size = 0; + return NULL; +} diff --git a/src/mainboard/google/zork/variants/ezkinil/gpio.c b/src/mainboard/google/zork/variants/ezkinil/gpio.c index 053c3c8..b490b3a 100644 --- a/src/mainboard/google/zork/variants/ezkinil/gpio.c +++ b/src/mainboard/google/zork/variants/ezkinil/gpio.c @@ -22,6 +22,8 @@ PAD_GPI(GPIO_86, PULL_NONE), /* MST_GPIO_3 (Fw Update HDMI hub) */ PAD_GPI(GPIO_90, PULL_NONE), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; static const struct soc_amd_gpio ezkinil_bid2_gpio_set_stage_ram[] = { @@ -37,6 +39,8 @@ PAD_NC(GPIO_69), /* MST_GPIO_2 (Fw Update HDMI hub) Change NC */ PAD_NC(GPIO_86), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; static const struct soc_amd_gpio ezkinil_bid3_gpio_set_stage_ram[] = { @@ -44,6 +48,8 @@ PAD_NC(GPIO_11), /* FPMCU_BOOT0 Change NC */ PAD_NC(GPIO_69), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) diff --git a/src/mainboard/google/zork/variants/morphius/gpio.c b/src/mainboard/google/zork/variants/morphius/gpio.c index 074fe00..ece2dd6 100644 --- a/src/mainboard/google/zork/variants/morphius/gpio.c +++ b/src/mainboard/google/zork/variants/morphius/gpio.c @@ -24,6 +24,8 @@ PAD_GPI(GPIO_86, PULL_NONE), /* MST_GPIO_3 (Fw Update HDMI hub) */ PAD_GPI(GPIO_90, PULL_NONE), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; static const struct soc_amd_gpio morphius_bid2_gpio_set_stage_ram[] = { @@ -41,6 +43,13 @@ PAD_GPI(GPIO_86, PULL_NONE), /* MST_GPIO_3 (Fw Update HDMI hub) */ PAD_GPI(GPIO_90, PULL_NONE), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), +}; + +static const struct soc_amd_gpio morphius_bid3_gpio_set_stage_ram[] = { + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) @@ -61,6 +70,9 @@ } else if (board_version <= 2) { *size = ARRAY_SIZE(morphius_bid2_gpio_set_stage_ram); return morphius_bid2_gpio_set_stage_ram; + } else if (board_version <= 3) { + *size = ARRAY_SIZE(morphius_bid3_gpio_set_stage_ram); + return morphius_bid3_gpio_set_stage_ram; } *size = 0; diff --git a/src/mainboard/google/zork/variants/trembyle/gpio.c b/src/mainboard/google/zork/variants/trembyle/gpio.c index d8367e7..fc0d2c6 100644 --- a/src/mainboard/google/zork/variants/trembyle/gpio.c +++ b/src/mainboard/google/zork/variants/trembyle/gpio.c @@ -24,6 +24,8 @@ PAD_GPI(GPIO_86, PULL_NONE), /* MST_GPIO_3 (Fw Update HDMI hub) */ PAD_GPI(GPIO_90, PULL_NONE), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; static const struct soc_amd_gpio trembyle_bid3_gpio_set_stage_ram[] = { @@ -41,6 +43,8 @@ PAD_GPI(GPIO_86, PULL_NONE), /* MST_GPIO_3 (Fw Update HDMI hub) */ PAD_GPI(GPIO_90, PULL_NONE), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), }; const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) diff --git a/src/mainboard/google/zork/variants/trembyle/overridetree.cb b/src/mainboard/google/zork/variants/trembyle/overridetree.cb index 26d9a3e..9e7660b 100644 --- a/src/mainboard/google/zork/variants/trembyle/overridetree.cb +++ b/src/mainboard/google/zork/variants/trembyle/overridetree.cb @@ -71,7 +71,7 @@ register "desc" = ""Raydium Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" # 32ms: Rise time of the reset line # 20ms: Firmware ready time register "reset_delay_ms" = "32 + 20" @@ -84,7 +84,7 @@ register "desc" = ""ELAN Touchscreen"" register "probed" = "1" register "irq_gpio" = "ACPI_GPIO_IRQ_EDGE_LOW(GPIO_12)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPIO_140)" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPIO_140)" register "reset_delay_ms" = "20" register "has_power_resource" = "1" device i2c 10 on end diff --git a/src/mainboard/google/zork/variants/vilboz/Makefile.inc b/src/mainboard/google/zork/variants/vilboz/Makefile.inc index dc1e411..4bcc964 100644 --- a/src/mainboard/google/zork/variants/vilboz/Makefile.inc +++ b/src/mainboard/google/zork/variants/vilboz/Makefile.inc @@ -3,3 +3,5 @@ subdirs-y += ./spd ramstage-y += variant.c +ramstage-y += gpio.c + diff --git a/src/mainboard/google/zork/variants/vilboz/gpio.c b/src/mainboard/google/zork/variants/vilboz/gpio.c new file mode 100644 index 0000000..7269b23 --- /dev/null +++ b/src/mainboard/google/zork/variants/vilboz/gpio.c @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#include <baseboard/gpio.h> +#include <baseboard/variants.h> +#include <boardid.h> +#include <gpio.h> +#include <soc/gpio.h> +#include <ec/google/chromeec/ec.h> + +static const struct soc_amd_gpio bid_1_gpio_set_stage_ram[] = { + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), +}; + +const struct soc_amd_gpio *variant_override_gpio_table(size_t *size) +{ + uint32_t board_version; + + /* + * If board version cannot be read, assume that this is an older revision of the board + * and so apply overrides. If board version is provided by the EC, then apply overrides + * if version < 2. + */ + if (google_chromeec_cbi_get_board_version(&board_version)) + board_version = 1; + + if (board_version < 2) { + *size = ARRAY_SIZE(bid_1_gpio_set_stage_ram); + return bid_1_gpio_set_stage_ram; + } + + *size = 0; + return NULL; +} diff --git a/src/mainboard/google/zork/variants/woomax/gpio.c b/src/mainboard/google/zork/variants/woomax/gpio.c index 9c779d7..3625a71 100644 --- a/src/mainboard/google/zork/variants/woomax/gpio.c +++ b/src/mainboard/google/zork/variants/woomax/gpio.c @@ -18,6 +18,8 @@ PAD_NC(GPIO_69), /* RAM_ID_4 */ PAD_NC(GPIO_84), + /* USI_RESET */ + PAD_GPO(GPIO_140, HIGH), /* GPIO_141 NC */ PAD_NC(GPIO_141), /* GPIO_143 NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/44192 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I092f274d8eb1920a1cd6d3eccbe8f26b0b28928a Gerrit-Change-Number: 44192 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

3 7

Change in coreboot[master]: mb/google/zork: Use dev_nested_path for dmic gpio update
by Josie Nordrum (Code Review) 07 Aug '20

07 Aug '20

Josie Nordrum has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/44158 ) Change subject: mb/google/zork: Use dev_nested_path for dmic gpio update ...................................................................... mb/google/zork: Use dev_nested_path for dmic gpio update Created function update_dmic_gpio to update gpio machine and rewrote to use the new find_dev_nested_path function for consistency. BUG=None BRANCH=None TEST=None Change-Id: I96cf207f24c6117d98ff2bf7e6e5cd282489e805 Signed-off-by: Josie Nordrum <josienordrum(a)google.com> --- M src/mainboard/google/zork/variants/baseboard/ramstage_common.c 1 file changed, 46 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/58/44158/1 diff --git a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c index e4c9869..d80f478 100644 --- a/src/mainboard/google/zork/variants/baseboard/ramstage_common.c +++ b/src/mainboard/google/zork/variants/baseboard/ramstage_common.c @@ -13,6 +13,22 @@ extern struct chip_operations drivers_amd_i2s_machine_dev_ops; extern struct chip_operations drivers_i2c_generic_ops; +static const struct device_path acp_machine_path[] = { + { + .type = DEVICE_PATH_PCI, + .pci.devfn = PCIE_GPP_A_DEVFN + }, + { + .type = DEVICE_PATH_PCI, + .pci.devfn = AUDIO_DEVFN + }, + { + .type = DEVICE_PATH_GENERIC, + .generic.id = 0, + .generic.subid = 0 + } +}; + static const struct device_path rt5682_path[] = { { .type = DEVICE_PATH_PCI, @@ -36,17 +52,17 @@ void update_hp_int_odl(void) { - const struct device *rt5682_dev; - struct drivers_i2c_generic_config *cfg; - struct acpi_gpio *gpio; + const struct device *rt5682_dev; struct + drivers_i2c_generic_config * cfg; struct acpi_gpio *gpio; if (!variant_uses_codec_gpi()) return; rt5682_dev = find_dev_nested_path( - pci_root_bus(), rt5682_path, ARRAY_SIZE(rt5682_path)); + pci_root_bus(), rt5682_path, ARRAY_SIZE(rt5682_path)); if (!rt5682_dev) { - printk(BIOS_ERR, "%s: Failed to find audio device\n", __func__); + printk(BIOS_ERR, "%s: Failed to find audio device\n", + __func__); return; } @@ -61,44 +77,39 @@ } -void variant_audio_update(void) +void update_dmic_gpio(void) { - const struct device *gpp_a_dev; - const struct device *acp_dev; - struct device *machine_dev = NULL; + const struct device *machine_dev; struct + drivers_amd_i2s_machine_dev_config * cfg; struct acpi_gpio *gpio; if (variant_uses_v3_schematics()) return; - gpp_a_dev = pcidev_path_on_root(PCIE_GPP_A_DEVFN); - if (gpp_a_dev == NULL) + machine_dev = find_dev_nested_path( + pci_root_bus(), acp_machine_path, ARRAY_SIZE(acp_machine_path)); + if (!machine_dev) { + printk(BIOS_ERR, "%s: Failed to find ACP machine device\n", + __func__); return; - - acp_dev = pcidev_path_behind(gpp_a_dev->link_list, AUDIO_DEVFN); - if (acp_dev == NULL) - return; - - while ((machine_dev = dev_bus_each_child(acp_dev->link_list, machine_dev)) != NULL) { - struct drivers_amd_i2s_machine_dev_config *cfg; - struct acpi_gpio *gpio; - - if (machine_dev->chip_info == NULL) - continue; - - if (machine_dev->chip_ops != &drivers_amd_i2s_machine_dev_ops) - continue; - - cfg = machine_dev->chip_info; - gpio = &cfg->dmic_select_gpio; - - if (CONFIG(BOARD_GOOGLE_BASEBOARD_TREMBYLE)) - gpio->pins[0] = GPIO_13; - else - gpio->pins[0] = GPIO_6; - - break; } + if (machine_dev->chip_ops != &drivers_amd_i2s_machine_dev_ops) { + printk(BIOS_ERR, "%s: Incorrect device found\n", __func__); + return; + } + + cfg = config_of(machine_dev); gpio = &cfg->dmic_select_gpio; + + if (CONFIG(BOARD_GOOGLE_BASEBOARD_TREMBYLE)) + gpio->pins[0] = GPIO_13; + else + gpio->pins[0] = GPIO_6; + +} + +void update_hp_int_odl(void) +{ + update_dmic_gpio(); update_hp_int_odl(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/44158 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96cf207f24c6117d98ff2bf7e6e5cd282489e805 Gerrit-Change-Number: 44158 Gerrit-PatchSet: 1 Gerrit-Owner: Josie Nordrum <josienordrum(a)google.com> Gerrit-MessageType: newchange

3 7

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit August 2020