coreboot-gerrit June 2020

coreboot-gerrit@coreboot.org

1 participants
2825 discussions

Change in coreboot[master]: mb/*: Remove remaining fadt.c files
by Kyösti Mälkki (Code Review) 08 Jun '20

08 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41947 ) Change subject: mb/*: Remove remaining fadt.c files ...................................................................... mb/*: Remove remaining fadt.c files Change-Id: I13ed3b6e8608c37c1ebe51838e4052f89a638d83 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/intel/harcuvar/acpi_tables.c D src/mainboard/intel/harcuvar/fadt.c M src/mainboard/ocp/tiogapass/acpi_tables.c D src/mainboard/ocp/tiogapass/fadt.c M src/mainboard/scaleway/tagada/acpi_tables.c D src/mainboard/scaleway/tagada/fadt.c 6 files changed, 18 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/41947/1 diff --git a/src/mainboard/intel/harcuvar/acpi_tables.c b/src/mainboard/intel/harcuvar/acpi_tables.c index 046d3ac..f2e6678 100644 --- a/src/mainboard/intel/harcuvar/acpi_tables.c +++ b/src/mainboard/intel/harcuvar/acpi_tables.c @@ -23,3 +23,9 @@ /* TPM Present */ gnvs->tpmp = 0; } + +void motherboard_fill_fadt(acpi_fadt_t *fadt) +{ + fadt->reserved = 0; + fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; +} diff --git a/src/mainboard/intel/harcuvar/fadt.c b/src/mainboard/intel/harcuvar/fadt.c deleted file mode 100644 index fc12fee..0000000 --- a/src/mainboard/intel/harcuvar/fadt.c +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> - -#include <soc/acpi.h> -#include <soc/soc_util.h> - -void motherboard_fill_fadt(acpi_fadt_t *fadt) -{ - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; -} diff --git a/src/mainboard/ocp/tiogapass/acpi_tables.c b/src/mainboard/ocp/tiogapass/acpi_tables.c index 9a36bd3..3d359b1 100644 --- a/src/mainboard/ocp/tiogapass/acpi_tables.c +++ b/src/mainboard/ocp/tiogapass/acpi_tables.c @@ -9,3 +9,9 @@ { acpi_init_gnvs(gnvs); } + +void motherboard_fill_fadt(acpi_fadt_t *fadt) +{ + fadt->reserved = 0; + fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; +} diff --git a/src/mainboard/ocp/tiogapass/fadt.c b/src/mainboard/ocp/tiogapass/fadt.c deleted file mode 100644 index 6e07787..0000000 --- a/src/mainboard/ocp/tiogapass/fadt.c +++ /dev/null @@ -1,10 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <acpi/acpi.h> -#include <soc/acpi.h> - -void motherboard_fill_fadt(acpi_fadt_t *fadt) -{ - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; -} diff --git a/src/mainboard/scaleway/tagada/acpi_tables.c b/src/mainboard/scaleway/tagada/acpi_tables.c index 046d3ac..f2e6678 100644 --- a/src/mainboard/scaleway/tagada/acpi_tables.c +++ b/src/mainboard/scaleway/tagada/acpi_tables.c @@ -23,3 +23,9 @@ /* TPM Present */ gnvs->tpmp = 0; } + +void motherboard_fill_fadt(acpi_fadt_t *fadt) +{ + fadt->reserved = 0; + fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; +} diff --git a/src/mainboard/scaleway/tagada/fadt.c b/src/mainboard/scaleway/tagada/fadt.c deleted file mode 100644 index fc12fee..0000000 --- a/src/mainboard/scaleway/tagada/fadt.c +++ /dev/null @@ -1,12 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <acpi/acpi.h> - -#include <soc/acpi.h> -#include <soc/soc_util.h> - -void motherboard_fill_fadt(acpi_fadt_t *fadt) -{ - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; -} -- To view, visit https://review.coreboot.org/c/coreboot/+/41947 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13ed3b6e8608c37c1ebe51838e4052f89a638d83 Gerrit-Change-Number: 41947 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

5 6

Change in coreboot[master]: soc/intel/braswell,broadwell,quark: Select COMMON_FADT
by Kyösti Mälkki (Code Review) 08 Jun '20

08 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41920 ) Change subject: soc/intel/braswell,broadwell,quark: Select COMMON_FADT ...................................................................... soc/intel/braswell,broadwell,quark: Select COMMON_FADT Change-Id: I04b602b2c23fbd163fcd110a44ad25c6be07ab66 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- D src/mainboard/facebook/fbg1701/fadt.c D src/mainboard/google/auron/fadt.c D src/mainboard/google/cyan/fadt.c D src/mainboard/google/jecht/fadt.c D src/mainboard/google/rambi/fadt.c D src/mainboard/intel/galileo/acpi_tables.c D src/mainboard/intel/strago/fadt.c D src/mainboard/intel/wtm2/fadt.c D src/mainboard/portwell/m107/fadt.c D src/mainboard/protectli/vault_bsw/fadt.c D src/mainboard/purism/librem_bdw/fadt.c M src/soc/intel/braswell/Kconfig M src/soc/intel/broadwell/Kconfig M src/soc/intel/quark/Kconfig 14 files changed, 3 insertions(+), 355 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/41920/1 diff --git a/src/mainboard/facebook/fbg1701/fadt.c b/src/mainboard/facebook/fbg1701/fadt.c deleted file mode 100644 index c6c53e3..0000000 --- a/src/mainboard/facebook/fbg1701/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - motherboard_fill_fadt(fadt); - - header->checksum = - acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/google/auron/fadt.c b/src/mainboard/google/auron/fadt.c deleted file mode 100644 index d6d3ea0..0000000 --- a/src/mainboard/google/auron/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <string.h> -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/google/cyan/fadt.c b/src/mainboard/google/cyan/fadt.c deleted file mode 100644 index 901fc82..0000000 --- a/src/mainboard/google/cyan/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <soc/acpi.h> -#include <string.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/google/jecht/fadt.c b/src/mainboard/google/jecht/fadt.c deleted file mode 100644 index d6d3ea0..0000000 --- a/src/mainboard/google/jecht/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <string.h> -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/google/rambi/fadt.c b/src/mainboard/google/rambi/fadt.c deleted file mode 100644 index d6d3ea0..0000000 --- a/src/mainboard/google/rambi/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <string.h> -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/intel/galileo/acpi_tables.c b/src/mainboard/intel/galileo/acpi_tables.c deleted file mode 100644 index 6666be3..0000000 --- a/src/mainboard/intel/galileo/acpi_tables.c +++ /dev/null @@ -1,25 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <string.h> -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - /* Initialize the FADT header */ - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = ACPI_FADT_REV_ACPI_5_0; - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - /* Fill in SoC specific values */ - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/intel/strago/fadt.c b/src/mainboard/intel/strago/fadt.c deleted file mode 100644 index 901fc82..0000000 --- a/src/mainboard/intel/strago/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <soc/acpi.h> -#include <string.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/intel/wtm2/fadt.c b/src/mainboard/intel/wtm2/fadt.c deleted file mode 100644 index 6858bc1..0000000 --- a/src/mainboard/intel/wtm2/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <string.h> -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t * fadt, acpi_facs_t * facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = ACPI_FADT_REV_ACPI_5_0; - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/portwell/m107/fadt.c b/src/mainboard/portwell/m107/fadt.c deleted file mode 100644 index c6c53e3..0000000 --- a/src/mainboard/portwell/m107/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long) facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - motherboard_fill_fadt(fadt); - - header->checksum = - acpi_checksum((void *) fadt, header->length); -} diff --git a/src/mainboard/protectli/vault_bsw/fadt.c b/src/mainboard/protectli/vault_bsw/fadt.c deleted file mode 100644 index 3fb84d2..0000000 --- a/src/mainboard/protectli/vault_bsw/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-or-later */ - -#include <soc/acpi.h> -#include <string.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &(fadt->header); - - memset((void *) fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (unsigned long)facs; - fadt->dsdt = (unsigned long) dsdt; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (unsigned long)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (unsigned long)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - motherboard_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *)fadt, header->length); -} diff --git a/src/mainboard/purism/librem_bdw/fadt.c b/src/mainboard/purism/librem_bdw/fadt.c deleted file mode 100644 index 5904f62..0000000 --- a/src/mainboard/purism/librem_bdw/fadt.c +++ /dev/null @@ -1,33 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <string.h> -#include <soc/acpi.h> -#include <version.h> - -void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) -{ - acpi_header_t *header = &fadt->header; - - memset(fadt, 0, sizeof(acpi_fadt_t)); - memcpy(header->signature, "FACP", 4); - header->length = sizeof(acpi_fadt_t); - header->revision = get_acpi_table_revision(FADT); - memcpy(header->oem_id, OEM_ID, 6); - memcpy(header->oem_table_id, ACPI_TABLE_CREATOR, 8); - memcpy(header->asl_compiler_id, ASLC, 4); - header->asl_compiler_revision = asl_revision; - - fadt->firmware_ctrl = (u32)facs; - fadt->dsdt = (u32)dsdt; - fadt->reserved = 0; - fadt->preferred_pm_profile = PM_MOBILE; - - fadt->x_firmware_ctl_l = (u32)facs; - fadt->x_firmware_ctl_h = 0; - fadt->x_dsdt_l = (u32)dsdt; - fadt->x_dsdt_h = 0; - - acpi_fill_fadt(fadt); - - header->checksum = acpi_checksum((void *)fadt, header->length); -} diff --git a/src/soc/intel/braswell/Kconfig b/src/soc/intel/braswell/Kconfig index a437db2..f99ab98 100644 --- a/src/soc/intel/braswell/Kconfig +++ b/src/soc/intel/braswell/Kconfig @@ -15,6 +15,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select SUPPORT_CPU_UCODE_IN_CBFS + select COMMON_FADT select CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED select HAVE_SMI_HANDLER select NO_FIXED_XIP_ROM_SIZE diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 67f7563..a3c6f03 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -15,6 +15,7 @@ select BOOT_DEVICE_SUPPORTS_WRITES select CACHE_MRC_SETTINGS select MRC_SETTINGS_PROTECT + select COMMON_FADT select CPU_INTEL_COMMON select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select SUPPORT_CPU_UCODE_IN_CBFS diff --git a/src/soc/intel/quark/Kconfig b/src/soc/intel/quark/Kconfig index 4ecf6c1..12bcb99 100644 --- a/src/soc/intel/quark/Kconfig +++ b/src/soc/intel/quark/Kconfig @@ -26,6 +26,7 @@ select UNCOMPRESSED_RAMSTAGE select USE_MARCH_586 select NO_SMM + select COMMON_FADT ##### # Debug serial output -- To view, visit https://review.coreboot.org/c/coreboot/+/41920 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04b602b2c23fbd163fcd110a44ad25c6be07ab66 Gerrit-Change-Number: 41920 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

8 18

Change in coreboot[master]: acpi,mb/*: Use motherboard_fill_fadt()
by Kyösti Mälkki (Code Review) 08 Jun '20

08 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41917 ) Change subject: acpi,mb/*: Use motherboard_fill_fadt() ...................................................................... acpi,mb/*: Use motherboard_fill_fadt() Change-Id: I0453c0edc9aeb86cf4f5d912613b8fa8beb63ab4 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/facebook/fbg1701/acpi_tables.c M src/mainboard/facebook/fbg1701/fadt.c M src/mainboard/portwell/m107/acpi_tables.c M src/mainboard/portwell/m107/fadt.c M src/mainboard/protectli/vault_bsw/acpi_tables.c M src/mainboard/protectli/vault_bsw/fadt.c 6 files changed, 18 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/41917/1 diff --git a/src/mainboard/facebook/fbg1701/acpi_tables.c b/src/mainboard/facebook/fbg1701/acpi_tables.c index 539a74e..fc0aa60 100644 --- a/src/mainboard/facebook/fbg1701/acpi_tables.c +++ b/src/mainboard/facebook/fbg1701/acpi_tables.c @@ -37,3 +37,8 @@ return current; } + +void motherboard_fill_fadt(acpi_fadt_t *fadt) +{ + fadt->iapc_boot_arch &= ~ACPI_FADT_8042; +} diff --git a/src/mainboard/facebook/fbg1701/fadt.c b/src/mainboard/facebook/fbg1701/fadt.c index 3785f15..9f8f058 100644 --- a/src/mainboard/facebook/fbg1701/fadt.c +++ b/src/mainboard/facebook/fbg1701/fadt.c @@ -26,8 +26,7 @@ fadt->x_dsdt_h = 0; acpi_fill_in_fadt(fadt); - - fadt->iapc_boot_arch &= ~ACPI_FADT_8042; + motherboard_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); diff --git a/src/mainboard/portwell/m107/acpi_tables.c b/src/mainboard/portwell/m107/acpi_tables.c index 539a74e..fc0aa60 100644 --- a/src/mainboard/portwell/m107/acpi_tables.c +++ b/src/mainboard/portwell/m107/acpi_tables.c @@ -37,3 +37,8 @@ return current; } + +void motherboard_fill_fadt(acpi_fadt_t *fadt) +{ + fadt->iapc_boot_arch &= ~ACPI_FADT_8042; +} diff --git a/src/mainboard/portwell/m107/fadt.c b/src/mainboard/portwell/m107/fadt.c index 3785f15..9f8f058 100644 --- a/src/mainboard/portwell/m107/fadt.c +++ b/src/mainboard/portwell/m107/fadt.c @@ -26,8 +26,7 @@ fadt->x_dsdt_h = 0; acpi_fill_in_fadt(fadt); - - fadt->iapc_boot_arch &= ~ACPI_FADT_8042; + motherboard_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); diff --git a/src/mainboard/protectli/vault_bsw/acpi_tables.c b/src/mainboard/protectli/vault_bsw/acpi_tables.c index f502741..b80f83f 100644 --- a/src/mainboard/protectli/vault_bsw/acpi_tables.c +++ b/src/mainboard/protectli/vault_bsw/acpi_tables.c @@ -27,3 +27,8 @@ return current; } + +void motherboard_fill_fadt(acpi_fadt_t *fadt) +{ + fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES; +} diff --git a/src/mainboard/protectli/vault_bsw/fadt.c b/src/mainboard/protectli/vault_bsw/fadt.c index 755ac6e..8a23eba 100644 --- a/src/mainboard/protectli/vault_bsw/fadt.c +++ b/src/mainboard/protectli/vault_bsw/fadt.c @@ -27,8 +27,7 @@ fadt->x_dsdt_h = 0; acpi_fill_in_fadt(fadt); - - fadt->iapc_boot_arch = ACPI_FADT_LEGACY_DEVICES; + motherboard_fill_fadt(fadt); header->checksum = acpi_checksum((void *)fadt, header->length); } -- To view, visit https://review.coreboot.org/c/coreboot/+/41917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0453c0edc9aeb86cf4f5d912613b8fa8beb63ab4 Gerrit-Change-Number: 41917 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

6 10

Change in coreboot[master]: soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax
by Venkata Krishna Nimmagadda (Code Review) 08 Jun '20

08 Jun '20

Venkata Krishna Nimmagadda has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41800 ) Change subject: soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax ...................................................................... soc/intel/tigerlake/acpi: Update gpio_op.asl to ASL2.0 syntax This change updates gpio_op.asl to use ASL2.0 syntax. This increases the readability of the ASL code. BUG=none BRANCH=none TEST="BUILD for Volteer" Signed-off-by: Venkata Krishna Nimmagadda <venkata.krishna.nimmagadda(a)intel.com> Change-Id: Ib54b3f7da828ce8d232fcea0639077970638f610 --- M src/soc/intel/tigerlake/acpi/gpio_op.asl 1 file changed, 16 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/41800/1 diff --git a/src/soc/intel/tigerlake/acpi/gpio_op.asl b/src/soc/intel/tigerlake/acpi/gpio_op.asl index 16e7690..1ba47cd 100644 --- a/src/soc/intel/tigerlake/acpi/gpio_op.asl +++ b/src/soc/intel/tigerlake/acpi/gpio_op.asl @@ -11,7 +11,7 @@ { VAL0, 32 } - And (PAD_CFG0_RX_STATE, ShiftRight (VAL0, PAD_CFG0_RX_STATE_BIT), Local0) + Local0 = PAD_CFG0_RX_STATE & (VAL0 >> PAD_CFG0_RX_STATE_BIT) Return (Local0) } @@ -27,7 +27,7 @@ { VAL0, 32 } - And (PAD_CFG0_TX_STATE, VAL0, Local0) + Local0 = PAD_CFG0_TX_STATE & VAL0 Return (Local0) } @@ -43,7 +43,7 @@ { VAL0, 32 } - Or (PAD_CFG0_TX_STATE, VAL0, VAL0) + VAL0 = PAD_CFG0_TX_STATE | VAL0 } /* @@ -57,7 +57,7 @@ { VAL0, 32 } - And (Not (PAD_CFG0_TX_STATE), VAL0, VAL0) + VAL0 = ~PAD_CFG0_TX_STATE & VAL0 } /* @@ -76,10 +76,10 @@ { VAL0, 32 } - Store (VAL0, Local0) - And (Not (PAD_CFG0_MODE_MASK), Local0, Local0) - And (ShiftLeft (Arg1, PAD_CFG0_MODE_SHIFT, Arg1), PAD_CFG0_MODE_MASK, Arg1) - Or (Local0, Arg1, VAL0) + Local0 = VAL0 + Local0 = ~PAD_CFG0_MODE_MASK & Local0 + Arg1 = (Arg1 >> PAD_CFG0_MODE_SHIFT) & PAD_CFG0_MODE_MASK + VAL0 = Local0 | Arg1 } /* @@ -97,10 +97,10 @@ VAL0, 32 } - If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_TX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_TX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_TX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_TX_DISABLE | VAL0 } } @@ -119,9 +119,9 @@ VAL0, 32 } - If (LEqual (Arg1, 1)) { - And (Not (PAD_CFG0_RX_DISABLE), VAL0, VAL0) - } ElseIf (LEqual (Arg1, 0)){ - Or (PAD_CFG0_RX_DISABLE, VAL0, VAL0) + If (Arg1 == 1) { + VAL0 = ~PAD_CFG0_RX_DISABLE & VAL0 + } ElseIf (Arg1 == 0){ + VAL0 = PAD_CFG0_RX_DISABLE | VAL0 } } -- To view, visit https://review.coreboot.org/c/coreboot/+/41800 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib54b3f7da828ce8d232fcea0639077970638f610 Gerrit-Change-Number: 41800 Gerrit-PatchSet: 1 Gerrit-Owner: Venkata Krishna Nimmagadda <Venkata.krishna.nimmagadda(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: newchange

4 6

Change in coreboot[master]: drivers/mrc_cache: generate debug messages for MRC cache update
by Jonathan Zhang (Code Review) 08 Jun '20

08 Jun '20

Jonathan Zhang has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41981 ) Change subject: drivers/mrc_cache: generate debug messages for MRC cache update ...................................................................... drivers/mrc_cache: generate debug messages for MRC cache update When MRC cached data update is performed, messages are written to event log, which is flash based. For system that does not have flash based event log, the messages are lost. Added corresponding BIOS_DEBUG messages. Signed-off-by: Jonathan Zhang <jonzhang(a)fb.com> Change-Id: I1ef4794151fea7213c8317ddc898b0e37da280b5 --- M src/drivers/mrc_cache/mrc_cache.c 1 file changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/81/41981/1 diff --git a/src/drivers/mrc_cache/mrc_cache.c b/src/drivers/mrc_cache/mrc_cache.c index 4e6e91c..73f5701 100644 --- a/src/drivers/mrc_cache/mrc_cache.c +++ b/src/drivers/mrc_cache/mrc_cache.c @@ -397,6 +397,7 @@ return; if (!mrc_cache_needs_update(&latest_rdev, to_be_updated)) { + printk(BIOS_DEBUG, "MRC: '%s' does not need update.\n", cr->name); log_event_cache_update(cr->elog_slot, ALREADY_UPTODATE); return; } @@ -405,10 +406,13 @@ if (region_file_update_data(&cache_file, cbmem_entry_start(to_be_updated), - cbmem_entry_size(to_be_updated)) < 0) + cbmem_entry_size(to_be_updated)) < 0){ + printk(BIOS_DEBUG, "MRC: failed to update '%s'.\n", cr->name); log_event_cache_update(cr->elog_slot, UPDATE_FAILURE); - else + } else { + printk(BIOS_DEBUG, "MRC: updated '%s'.\n", cr->name); log_event_cache_update(cr->elog_slot, UPDATE_SUCCESS); + } } /* Read flash status register to determine if write protect is active */ -- To view, visit https://review.coreboot.org/c/coreboot/+/41981 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1ef4794151fea7213c8317ddc898b0e37da280b5 Gerrit-Change-Number: 41981 Gerrit-PatchSet: 1 Gerrit-Owner: Jonathan Zhang <jonzhang(a)fb.com> Gerrit-MessageType: newchange

7 9

Change in coreboot[master]: mb/pcengines/apu2: Change GPIO configuration functions
by Kyösti Mälkki (Code Review) 08 Jun '20

08 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42038 ) Change subject: mb/pcengines/apu2: Change GPIO configuration functions ...................................................................... mb/pcengines/apu2: Change GPIO configuration functions The definitions of GPIO_xx equal IOMUX_GPIO_xx shifted by two. Change-Id: I0ee821c71c88bf535122a9526862a9d1e68bd755 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/pcengines/apu2/gpio_ftns.c M src/mainboard/pcengines/apu2/gpio_ftns.h M src/mainboard/pcengines/apu2/romstage.c 3 files changed, 38 insertions(+), 52 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/42038/1 diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.c b/src/mainboard/pcengines/apu2/gpio_ftns.c index 1969a88..c249c2d 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.c +++ b/src/mainboard/pcengines/apu2/gpio_ftns.c @@ -7,8 +7,10 @@ #include <FchPlatform.h> #include "gpio_ftns.h" -static u32 gpio_read_wrapper(u32 gpio) +static u32 gpio_read_wrapper(u32 iomux_gpio) { + u32 gpio = iomux_gpio << 2; + if (gpio < 0x100) return gpio0_read32(gpio & 0xff); else if (gpio >= 0x100 && gpio < 0x200) @@ -19,8 +21,10 @@ die("Invalid GPIO"); } -static void gpio_write_wrapper(u32 gpio, u32 setting) +static void gpio_write_wrapper(u32 iomux_gpio, u32 setting) { + u32 gpio = iomux_gpio << 2; + if (gpio < 0x100) gpio0_write32(gpio & 0xff, setting); else if (gpio >= 0x100 && gpio < 0x200) @@ -29,7 +33,7 @@ gpio2_write32(gpio & 0xff, setting); } -void configure_gpio(u8 iomux_gpio, u8 iomux_ftn, u32 gpio, u32 setting) +void configure_gpio(u32 gpio, u8 iomux_ftn, u32 setting) { u32 bdata; @@ -43,7 +47,7 @@ | GPIO_PULL_UP_ENABLE | GPIO_PULL_DOWN_ENABLE)); gpio_write_wrapper(gpio, bdata); - iomux_write8(iomux_gpio, iomux_ftn & 0x3); + iomux_write8(gpio, iomux_ftn & 0x3); } u8 read_gpio(u32 gpio) diff --git a/src/mainboard/pcengines/apu2/gpio_ftns.h b/src/mainboard/pcengines/apu2/gpio_ftns.h index 7cc03e8..d1e76de 100644 --- a/src/mainboard/pcengines/apu2/gpio_ftns.h +++ b/src/mainboard/pcengines/apu2/gpio_ftns.h @@ -3,48 +3,30 @@ #ifndef GPIO_FTNS_H #define GPIO_FTNS_H -void configure_gpio(u8 iomux_gpio, u8 iomux_ftn, u32 gpio, u32 setting); +void configure_gpio(u32 gpio, u8 iomux_ftn, u32 setting); u8 read_gpio(u32 gpio); void write_gpio(u32 gpio, u8 value); int get_spd_offset(void); -#define IOMUX_OFFSET 0xD00 -#define GPIO_OFFSET 0x1500 - // // Based on PC Engines APU2C and APU3A schematics // http://www.pcengines.ch/schema/apu2c.pdf // http://www.pcengines.ch/schema/apu3a.pdf // -#define IOMUX_GPIO_22 0x09 // MODESW (APU5) -#define IOMUX_GPIO_32 0x59 // MODESW (SIMSWAP2 on APU5) -#define IOMUX_GPIO_33 0x5A // SIMSWAP (SIMSWAP3 on APU5) -#define IOMUX_GPIO_49 0x40 // STRAP0 -#define IOMUX_GPIO_50 0x41 // STRAP1 -#define IOMUX_GPIO_51 0x42 // PE3 Reset (SIM1 Reset on APU5) -#define IOMUX_GPIO_55 0x43 // PE4 Reset (SIM2 Reset on APU5) -#define IOMUX_GPIO_57 0x44 // LED1# -#define IOMUX_GPIO_58 0x45 // LED2# -#define IOMUX_GPIO_59 0x46 // LED3# -#define IOMUX_GPIO_64 0x47 // PE3_WDIS (SIM3 Reset on APU5) -#define IOMUX_GPIO_66 0x5B // SPKR -#define IOMUX_GPIO_68 0x48 // PE4_WDIS (SIMSWAP1 on APU5) -#define IOMUX_GPIO_71 0x4D // PROCHOT - -#define GPIO_22 0x24 // MODESW (APU5) -#define GPIO_32 0x164 // MODESW (SIMSWAP2 on APU5) -#define GPIO_33 0x168 // SIMSWAP (SIMSWAP3 on APU5) -#define GPIO_49 0x100 // STRAP0 -#define GPIO_50 0x104 // STRAP1 -#define GPIO_51 0x108 // PE3 Reset (SIM1 Reset on APU5) -#define GPIO_55 0x10C // PE4 Reset (SIM2 Reset on APU5) -#define GPIO_57 0x110 // LED1# -#define GPIO_58 0x114 // LED2# -#define GPIO_59 0x118 // LED3# -#define GPIO_64 0x11C // PE3_WDIS (SIM3 Reset on APU5) -#define GPIO_66 0x16C // SPKR -#define GPIO_68 0x120 // PE4_WDIS (SIMSWAP1 on APU5) -#define GPIO_71 0x134 // PROCHOT +#define GPIO_22 0x09 // MODESW (APU5) +#define GPIO_32 0x59 // MODESW (SIMSWAP2 on APU5) +#define GPIO_33 0x5A // SIMSWAP (SIMSWAP3 on APU5) +#define GPIO_49 0x40 // STRAP0 +#define GPIO_50 0x41 // STRAP1 +#define GPIO_51 0x42 // PE3 Reset (SIM1 Reset on APU5) +#define GPIO_55 0x43 // PE4 Reset (SIM2 Reset on APU5) +#define GPIO_57 0x44 // LED1# +#define GPIO_58 0x45 // LED2# +#define GPIO_59 0x46 // LED3# +#define GPIO_64 0x47 // PE3_WDIS (SIM3 Reset on APU5) +#define GPIO_66 0x5B // SPKR +#define GPIO_68 0x48 // PE4_WDIS (SIMSWAP1 on APU5) +#define GPIO_71 0x4D // PROCHOT #define GPIO_OUTPUT_ENABLE BIT23 #define GPIO_OUTPUT_VALUE BIT22 diff --git a/src/mainboard/pcengines/apu2/romstage.c b/src/mainboard/pcengines/apu2/romstage.c index d098bee..0fc472f 100644 --- a/src/mainboard/pcengines/apu2/romstage.c +++ b/src/mainboard/pcengines/apu2/romstage.c @@ -36,18 +36,18 @@ // Configure output disabled, value low, pull up/down disabled // if (CONFIG(BOARD_PCENGINES_APU5)) { - configure_gpio(IOMUX_GPIO_22, Function0, GPIO_22, setting); + configure_gpio(GPIO_22, Function0, setting); } if (CONFIG(BOARD_PCENGINES_APU2) || CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4)) { - configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting); + configure_gpio(GPIO_32, Function0, setting); } - configure_gpio(IOMUX_GPIO_49, Function2, GPIO_49, setting); - configure_gpio(IOMUX_GPIO_50, Function2, GPIO_50, setting); - configure_gpio(IOMUX_GPIO_71, Function0, GPIO_71, setting); + configure_gpio(GPIO_49, Function2, setting); + configure_gpio(GPIO_50, Function2, setting); + configure_gpio(GPIO_71, Function0, setting); // // Configure output enabled, value low, pull up/down disabled @@ -55,12 +55,12 @@ setting = GPIO_OUTPUT_ENABLE; if (CONFIG(BOARD_PCENGINES_APU3) || CONFIG(BOARD_PCENGINES_APU4)) { - configure_gpio(IOMUX_GPIO_33, Function0, GPIO_33, setting); + configure_gpio(GPIO_33, Function0, setting); } - configure_gpio(IOMUX_GPIO_57, Function1, GPIO_57, setting); - configure_gpio(IOMUX_GPIO_58, Function1, GPIO_58, setting); - configure_gpio(IOMUX_GPIO_59, Function3, GPIO_59, setting); + configure_gpio(GPIO_57, Function1, setting); + configure_gpio(GPIO_58, Function1, setting); + configure_gpio(GPIO_59, Function3, setting); // // Configure output enabled, value high, pull up/down disabled @@ -68,12 +68,12 @@ setting = GPIO_OUTPUT_ENABLE | GPIO_OUTPUT_VALUE; if (CONFIG(BOARD_PCENGINES_APU5)) { - configure_gpio(IOMUX_GPIO_32, Function0, GPIO_32, setting); - configure_gpio(IOMUX_GPIO_33, Function0, GPIO_33, setting); + configure_gpio(GPIO_32, Function0, setting); + configure_gpio(GPIO_33, Function0, setting); } - configure_gpio(IOMUX_GPIO_51, Function2, GPIO_51, setting); - configure_gpio(IOMUX_GPIO_55, Function3, GPIO_55, setting); - configure_gpio(IOMUX_GPIO_64, Function2, GPIO_64, setting); - configure_gpio(IOMUX_GPIO_68, Function0, GPIO_68, setting); + configure_gpio(GPIO_51, Function2, setting); + configure_gpio(GPIO_55, Function3, setting); + configure_gpio(GPIO_64, Function2, setting); + configure_gpio(GPIO_68, Function0, setting); } -- To view, visit https://review.coreboot.org/c/coreboot/+/42038 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ee821c71c88bf535122a9526862a9d1e68bd755 Gerrit-Change-Number: 42038 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-MessageType: newchange

4 3

Change in coreboot[master]: mb,soc/intel: Rename acpi_fill_in_fadt() to acpi_fill_fadt()
by Kyösti Mälkki (Code Review) 08 Jun '20

08 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/41919 ) Change subject: mb,soc/intel: Rename acpi_fill_in_fadt() to acpi_fill_fadt() ...................................................................... mb,soc/intel: Rename acpi_fill_in_fadt() to acpi_fill_fadt() Change-Id: I9025ca3b6b438e5f9a790076fc84460342362fc2 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M Documentation/Intel/Board/board.html M Documentation/Intel/SoC/soc.html M src/mainboard/facebook/fbg1701/fadt.c M src/mainboard/google/auron/fadt.c M src/mainboard/google/cyan/fadt.c M src/mainboard/google/jecht/fadt.c M src/mainboard/google/rambi/fadt.c M src/mainboard/intel/galileo/acpi_tables.c M src/mainboard/intel/strago/fadt.c M src/mainboard/intel/wtm2/fadt.c M src/mainboard/portwell/m107/fadt.c M src/mainboard/protectli/vault_bsw/fadt.c M src/mainboard/purism/librem_bdw/fadt.c M src/soc/intel/baytrail/acpi.c M src/soc/intel/baytrail/include/soc/acpi.h M src/soc/intel/braswell/acpi.c M src/soc/intel/braswell/include/soc/acpi.h M src/soc/intel/broadwell/acpi.c M src/soc/intel/broadwell/include/soc/acpi.h M src/soc/intel/quark/acpi.c M src/soc/intel/quark/include/soc/acpi.h M src/soc/intel/skylake/include/soc/acpi.h 22 files changed, 17 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/41919/1 diff --git a/Documentation/Intel/Board/board.html b/Documentation/Intel/Board/board.html index 4ba51df..0d4631a 100644 --- a/Documentation/Intel/Board/board.html +++ b/Documentation/Intel/Board/board.html @@ -222,7 +222,7 @@ <li>Add the acpi_create_fadt routine <ol type="I"> <li>fill in the ACPI header</li> - <li>Call the acpi_fill_in_fadt routine</li> + <li>Call the acpi_fill_fadt routine</li> </ol> </li> </ol> diff --git a/Documentation/Intel/SoC/soc.html b/Documentation/Intel/SoC/soc.html index 53131c6..8d565d5 100644 --- a/Documentation/Intel/SoC/soc.html +++ b/Documentation/Intel/SoC/soc.html @@ -667,7 +667,7 @@ </li> <li>Create a acpi.c module: <ol type="A"> - <li>Add the acpi_fill_in_fadt routine and initialize the values above</li> + <li>Add the acpi_fill_fadt routine and initialize the values above</li> </ol> </li> </ol> diff --git a/src/mainboard/facebook/fbg1701/fadt.c b/src/mainboard/facebook/fbg1701/fadt.c index 9f8f058..c6c53e3 100644 --- a/src/mainboard/facebook/fbg1701/fadt.c +++ b/src/mainboard/facebook/fbg1701/fadt.c @@ -25,7 +25,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); motherboard_fill_fadt(fadt); header->checksum = diff --git a/src/mainboard/google/auron/fadt.c b/src/mainboard/google/auron/fadt.c index 653ebb4..d6d3ea0 100644 --- a/src/mainboard/google/auron/fadt.c +++ b/src/mainboard/google/auron/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/google/cyan/fadt.c b/src/mainboard/google/cyan/fadt.c index ab2db11..901fc82 100644 --- a/src/mainboard/google/cyan/fadt.c +++ b/src/mainboard/google/cyan/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/google/jecht/fadt.c b/src/mainboard/google/jecht/fadt.c index 653ebb4..d6d3ea0 100644 --- a/src/mainboard/google/jecht/fadt.c +++ b/src/mainboard/google/jecht/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/google/rambi/fadt.c b/src/mainboard/google/rambi/fadt.c index 653ebb4..d6d3ea0 100644 --- a/src/mainboard/google/rambi/fadt.c +++ b/src/mainboard/google/rambi/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/intel/galileo/acpi_tables.c b/src/mainboard/intel/galileo/acpi_tables.c index 0787530..6666be3 100644 --- a/src/mainboard/intel/galileo/acpi_tables.c +++ b/src/mainboard/intel/galileo/acpi_tables.c @@ -19,7 +19,7 @@ header->asl_compiler_revision = asl_revision; /* Fill in SoC specific values */ - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/intel/strago/fadt.c b/src/mainboard/intel/strago/fadt.c index ab2db11..901fc82 100644 --- a/src/mainboard/intel/strago/fadt.c +++ b/src/mainboard/intel/strago/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/intel/wtm2/fadt.c b/src/mainboard/intel/wtm2/fadt.c index 77231e2..6858bc1 100644 --- a/src/mainboard/intel/wtm2/fadt.c +++ b/src/mainboard/intel/wtm2/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *) fadt, header->length); } diff --git a/src/mainboard/portwell/m107/fadt.c b/src/mainboard/portwell/m107/fadt.c index 9f8f058..c6c53e3 100644 --- a/src/mainboard/portwell/m107/fadt.c +++ b/src/mainboard/portwell/m107/fadt.c @@ -25,7 +25,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); motherboard_fill_fadt(fadt); header->checksum = diff --git a/src/mainboard/protectli/vault_bsw/fadt.c b/src/mainboard/protectli/vault_bsw/fadt.c index 8a23eba..3fb84d2 100644 --- a/src/mainboard/protectli/vault_bsw/fadt.c +++ b/src/mainboard/protectli/vault_bsw/fadt.c @@ -26,7 +26,7 @@ fadt->x_dsdt_l = (unsigned long)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); motherboard_fill_fadt(fadt); header->checksum = acpi_checksum((void *)fadt, header->length); diff --git a/src/mainboard/purism/librem_bdw/fadt.c b/src/mainboard/purism/librem_bdw/fadt.c index b756fb9..5904f62 100644 --- a/src/mainboard/purism/librem_bdw/fadt.c +++ b/src/mainboard/purism/librem_bdw/fadt.c @@ -27,7 +27,7 @@ fadt->x_dsdt_l = (u32)dsdt; fadt->x_dsdt_h = 0; - acpi_fill_in_fadt(fadt); + acpi_fill_fadt(fadt); header->checksum = acpi_checksum((void *)fadt, header->length); } diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index f9eb500..d008dd8 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -123,7 +123,7 @@ return current; } -void acpi_fill_in_fadt(acpi_fadt_t *fadt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { const uint16_t pmbase = ACPI_BASE_ADDRESS; diff --git a/src/soc/intel/baytrail/include/soc/acpi.h b/src/soc/intel/baytrail/include/soc/acpi.h index 342d6ba..fc8f8ab 100644 --- a/src/soc/intel/baytrail/include/soc/acpi.h +++ b/src/soc/intel/baytrail/include/soc/acpi.h @@ -6,7 +6,6 @@ #include <acpi/acpi.h> #include <soc/nvs.h> -void acpi_fill_in_fadt(acpi_fadt_t *fadt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index e6790a7..0bac42c 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -127,7 +127,7 @@ return current; } -void acpi_fill_in_fadt(acpi_fadt_t *fadt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { const uint16_t pmbase = ACPI_BASE_ADDRESS; diff --git a/src/soc/intel/braswell/include/soc/acpi.h b/src/soc/intel/braswell/include/soc/acpi.h index 8676dcf..5bff07a 100644 --- a/src/soc/intel/braswell/include/soc/acpi.h +++ b/src/soc/intel/braswell/include/soc/acpi.h @@ -7,7 +7,6 @@ #include <soc/nvs.h> void acpi_create_serialio_ssdt(acpi_header_t *ssdt); -void acpi_fill_in_fadt(acpi_fadt_t *fadt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); void southcluster_inject_dsdt(const struct device *device); diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 081b08a..fce2e45 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -179,7 +179,7 @@ return current; } -void acpi_fill_in_fadt(acpi_fadt_t *fadt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { const uint16_t pmbase = ACPI_BASE_ADDRESS; diff --git a/src/soc/intel/broadwell/include/soc/acpi.h b/src/soc/intel/broadwell/include/soc/acpi.h index 66ad450..46cc42a 100644 --- a/src/soc/intel/broadwell/include/soc/acpi.h +++ b/src/soc/intel/broadwell/include/soc/acpi.h @@ -12,7 +12,6 @@ #define PSS_LATENCY_TRANSITION 10 #define PSS_LATENCY_BUSMASTER 10 -void acpi_fill_in_fadt(acpi_fadt_t *fadt); unsigned long acpi_madt_irq_overrides(unsigned long current); void acpi_init_gnvs(global_nvs_t *gnvs); unsigned long northbridge_write_acpi_tables(const struct device *dev, diff --git a/src/soc/intel/quark/acpi.c b/src/soc/intel/quark/acpi.c index 364a4f9..bf173d9 100644 --- a/src/soc/intel/quark/acpi.c +++ b/src/soc/intel/quark/acpi.c @@ -16,7 +16,7 @@ return current; } -void acpi_fill_in_fadt(acpi_fadt_t *fadt) +void acpi_fill_fadt(acpi_fadt_t *fadt) { struct device *dev = pcidev_on_root(PCI_DEVICE_NUMBER_QNC_LPC, PCI_FUNCTION_NUMBER_QNC_LPC); diff --git a/src/soc/intel/quark/include/soc/acpi.h b/src/soc/intel/quark/include/soc/acpi.h index 36f18eb..d40fe81 100644 --- a/src/soc/intel/quark/include/soc/acpi.h +++ b/src/soc/intel/quark/include/soc/acpi.h @@ -6,6 +6,5 @@ #include <acpi/acpi.h> #include <acpi/acpigen.h> -void acpi_fill_in_fadt(acpi_fadt_t *fadt); #endif /* _SOC_ACPI_H_ */ diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h index 478f258..3422ece 100644 --- a/src/soc/intel/skylake/include/soc/acpi.h +++ b/src/soc/intel/skylake/include/soc/acpi.h @@ -12,7 +12,6 @@ #define PSS_LATENCY_TRANSITION 10 #define PSS_LATENCY_BUSMASTER 10 -void acpi_fill_in_fadt(acpi_fadt_t *fadt); unsigned long acpi_madt_irq_overrides(unsigned long current); void southbridge_inject_dsdt(const struct device *device); unsigned long southbridge_write_acpi_tables(const struct device *device, -- To view, visit https://review.coreboot.org/c/coreboot/+/41919 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9025ca3b6b438e5f9a790076fc84460342362fc2 Gerrit-Change-Number: 41919 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Piotr Król <piotr.krol(a)3mdeb.com> Gerrit-Reviewer: Wim Vervoorn <wvervoorn(a)eltan.com> Gerrit-MessageType: newchange

7 6

Change in coreboot[master]: mb/pcengines/apu1: Use fixed acpimmio_base
by Kyösti Mälkki (Code Review) 08 Jun '20

08 Jun '20

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42037 ) Change subject: mb/pcengines/apu1: Use fixed acpimmio_base ...................................................................... mb/pcengines/apu1: Use fixed acpimmio_base Change-Id: Iaaa0cc0b486145517939f46943f2fee82053d98e Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/pcengines/apu1/gpio_ftns.c M src/mainboard/pcengines/apu1/gpio_ftns.h M src/mainboard/pcengines/apu1/mainboard.c M src/mainboard/pcengines/apu1/romstage.c 4 files changed, 18 insertions(+), 37 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/42037/1 diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.c b/src/mainboard/pcengines/apu1/gpio_ftns.c index 151345b..f6b7a9a 100644 --- a/src/mainboard/pcengines/apu1/gpio_ftns.c +++ b/src/mainboard/pcengines/apu1/gpio_ftns.c @@ -5,16 +5,7 @@ #include <southbridge/amd/cimx/sb800/SBPLATFORM.h> #include "gpio_ftns.h" -uintptr_t find_gpio_base(void) -{ - uintptr_t base_addr; - /* Get the ACPIMMIO base address */ - base_addr = pm_read32(0x24); - base_addr &= 0xFFFFF000; - return base_addr; -} - -void configure_gpio(uintptr_t base_addr, u8 gpio, u8 iomux_ftn, u8 setting) +void configure_gpio(u8 gpio, u8 iomux_ftn, u8 setting) { u8 bdata; @@ -26,14 +17,13 @@ gpio_100_write8(gpio, bdata); } -u8 read_gpio(uintptr_t base_addr, u8 gpio) +u8 read_gpio(u8 gpio) { return (gpio_100_read8(gpio) & GPIO_DATA_IN) ? 1 : 0; } int get_spd_offset(void) { - uintptr_t base_addr = find_gpio_base(); - u8 spd_offset = read_gpio(base_addr, GPIO_16); + u8 spd_offset = read_gpio(GPIO_16); return spd_offset; } diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.h b/src/mainboard/pcengines/apu1/gpio_ftns.h index 03a7b45..79ed4a6 100644 --- a/src/mainboard/pcengines/apu1/gpio_ftns.h +++ b/src/mainboard/pcengines/apu1/gpio_ftns.h @@ -5,13 +5,10 @@ #include <stdint.h> -uintptr_t find_gpio_base(void); -void configure_gpio(uintptr_t base_addr, u8 gpio, u8 iomux_ftn, u8 setting); -u8 read_gpio(uintptr_t base_addr, u8 gpio); +void configure_gpio(u8 gpio, u8 iomux_ftn, u8 setting); +u8 read_gpio(u8 gpio); int get_spd_offset(void); -#define IOMUX_OFFSET 0xD00 -#define GPIO_OFFSET 0x100 #define GPIO_10 10 // PE3 Reset #define GPIO_11 11 // PE4 Reset #define GPIO_15 15 // board rev strap ms bit diff --git a/src/mainboard/pcengines/apu1/mainboard.c b/src/mainboard/pcengines/apu1/mainboard.c index acb5748..a2a78c5 100644 --- a/src/mainboard/pcengines/apu1/mainboard.c +++ b/src/mainboard/pcengines/apu1/mainboard.c @@ -362,8 +362,6 @@ static void mainboard_final(void *chip_info) { - u32 mmio_base; - printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Final.\n"); /* @@ -371,10 +369,9 @@ * LED2/D6/GPIO_190 should be 1 * LED3/D5/GPIO_191 should be 1 */ - mmio_base = find_gpio_base(); - configure_gpio(mmio_base, GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); - configure_gpio(mmio_base, GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); - configure_gpio(mmio_base, GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); usb_oc_setup(); } diff --git a/src/mainboard/pcengines/apu1/romstage.c b/src/mainboard/pcengines/apu1/romstage.c index 858c210..f594827 100644 --- a/src/mainboard/pcengines/apu1/romstage.c +++ b/src/mainboard/pcengines/apu1/romstage.c @@ -8,8 +8,6 @@ static void early_lpc_init(void) { - u32 mmio_base; - /* PC Engines requires system boot when power is applied. This feature is * controlled in PM_REG 5Bh register. "Always Power On" works by writing a * value of 05h. @@ -26,17 +24,16 @@ pm_write8(SB_PMIOA_REGEA, bdata); //configure required GPIOs - mmio_base = find_gpio_base(); - configure_gpio(mmio_base, GPIO_10, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); - configure_gpio(mmio_base, GPIO_11, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); - configure_gpio(mmio_base, GPIO_15, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_16, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_17, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_18, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_187, GPIO_FTN_1, GPIO_INPUT); - configure_gpio(mmio_base, GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); - configure_gpio(mmio_base, GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); - configure_gpio(mmio_base, GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_10, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_11, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_HIGH); + configure_gpio(GPIO_15, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_16, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_17, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_18, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_187, GPIO_FTN_1, GPIO_INPUT); + configure_gpio(GPIO_189, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_190, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); + configure_gpio(GPIO_191, GPIO_FTN_1, GPIO_OUTPUT | GPIO_DATA_LOW); } void board_BeforeAgesa(struct sysinfo *cb) -- To view, visit https://review.coreboot.org/c/coreboot/+/42037 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iaaa0cc0b486145517939f46943f2fee82053d98e Gerrit-Change-Number: 42037 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

4 3

Change in coreboot[master]: sb/intel/bd82x6x: Align some ME functions
by Angel Pons (Code Review) 08 Jun '20

08 Jun '20

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42009 ) Change subject: sb/intel/bd82x6x: Align some ME functions ...................................................................... sb/intel/bd82x6x: Align some ME functions This eliminates the differences in the first part of the file. Change-Id: Ifb7d57da08e02664a28819e65bc8e9697ed38c4c Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/southbridge/intel/bd82x6x/me.c M src/southbridge/intel/bd82x6x/me_8.x.c 2 files changed, 11 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/42009/1 diff --git a/src/southbridge/intel/bd82x6x/me.c b/src/southbridge/intel/bd82x6x/me.c index 4550f7e..f961bfba 100644 --- a/src/southbridge/intel/bd82x6x/me.c +++ b/src/southbridge/intel/bd82x6x/me.c @@ -10,10 +10,10 @@ #include <acpi/acpi.h> #include <device/mmio.h> -#include <device/pci_ops.h> -#include <console/console.h> #include <device/device.h> #include <device/pci.h> +#include <device/pci_ops.h> +#include <console/console.h> #include <device/pci_ids.h> #include <device/pci_def.h> #include <string.h> @@ -597,7 +597,7 @@ printk(BIOS_DEBUG, "ME: MEI resource not present!\n"); return -1; } - mei_base_address = (u32*)(uintptr_t)res->base; + mei_base_address = (u32 *)(uintptr_t)res->base; /* Ensure Memory and Bus Master bits are set */ pci_or_config16(dev, PCI_COMMAND, PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY); diff --git a/src/southbridge/intel/bd82x6x/me_8.x.c b/src/southbridge/intel/bd82x6x/me_8.x.c index 4fcc090..32c96ad 100644 --- a/src/southbridge/intel/bd82x6x/me_8.x.c +++ b/src/southbridge/intel/bd82x6x/me_8.x.c @@ -25,12 +25,11 @@ #include "pch.h" #if CONFIG(CHROMEOS) -#include <vendorcode/google/chromeos/chromeos.h> #include <vendorcode/google/chromeos/gnvs.h> #endif /* Path that the BIOS should take based on ME state */ -static const char *me_bios_path_values[] __unused = { +static const char *me_bios_path_values[] __unused = { [ME_NORMAL_BIOS_PATH] = "Normal", [ME_S3WAKE_BIOS_PATH] = "S3 Wake", [ME_ERROR_BIOS_PATH] = "Error", @@ -38,12 +37,10 @@ [ME_DISABLE_BIOS_PATH] = "Disable", [ME_FIRMWARE_UPDATE_BIOS_PATH] = "Firmware Update", }; -static int intel_me_read_mbp(me_bios_payload *mbp_data); /* MMIO base address for MEI interface */ static u32 *mei_base_address; - static void mei_dump(void *ptr, int dword, int offset, const char *type) { struct mei_csr *csr; @@ -292,7 +289,7 @@ if (!mkhi_rsp.is_response || mkhi->group_id != mkhi_rsp.group_id || mkhi->command != mkhi_rsp.command) { - printk(BIOS_ERR, "ME: invalid response, group %u ?= %u," + printk(BIOS_ERR, "ME: invalid response, group %u ?= %u, " "command %u ?= %u, is_response %u\n", mkhi->group_id, mkhi_rsp.group_id, mkhi->command, mkhi_rsp.command, mkhi_rsp.is_response); @@ -568,6 +565,10 @@ return 0; } +#if CONFIG(CHROMEOS) +#include <vendorcode/google/chromeos/chromeos.h> +#endif + /* Read the Extend register hash of ME firmware */ static int intel_me_extend_valid(struct device *dev) { @@ -622,6 +623,8 @@ pch_enable(dev); } +static int intel_me_read_mbp(me_bios_payload *mbp_data); + /* Check whether ME is present and do basic init */ static void intel_me_init(struct device *dev) { -- To view, visit https://review.coreboot.org/c/coreboot/+/42009 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifb7d57da08e02664a28819e65bc8e9697ed38c4c Gerrit-Change-Number: 42009 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

5 8

Change in coreboot[master]: lockdown: Add Kconfigs for SPI media protection mode
by Daniel Gröber (dxld) (Code Review) 08 Jun '20

08 Jun '20

Hello Daniel Gröber, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/41747 to review the following change. Change subject: lockdown: Add Kconfigs for SPI media protection mode ...................................................................... lockdown: Add Kconfigs for SPI media protection mode SPI_WRITE_PROTECTION_REBOOT seems to be a Winbond thing, other vendors such as Macronix only support permanent protection but conditional on the WP# pin state. Change-Id: Iba7c1229c82c86e1303d74c7bc8f89662b5bb58c Signed-off-by: Daniel Gröber <dxld(a)darkboxed.org> --- M src/drivers/spi/boot_device_rw_nommap.c M src/security/lockdown/Kconfig 2 files changed, 37 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/41747/1 diff --git a/src/drivers/spi/boot_device_rw_nommap.c b/src/drivers/spi/boot_device_rw_nommap.c index ba11d05..1d68285 100644 --- a/src/drivers/spi/boot_device_rw_nommap.c +++ b/src/drivers/spi/boot_device_rw_nommap.c @@ -96,9 +96,16 @@ if (type == MEDIA_WP) { if (spi_flash_is_write_protected(boot_dev, region_device_region(rd)) != 1) { + enum spi_flash_status_reg_lockdown lock; + if (CONFIG(BOOTMEDIA_SPI_LOCK_REBOOT)) + lock = SPI_WRITE_PROTECTION_REBOOT; + else if (CONFIG(BOOTMEDIA_SPI_LOCK_PIN)) + lock = SPI_WRITE_PROTECTION_PIN; + else if (CONFIG(BOOTMEDIA_SPI_LOCK_PERMANENT)) + lock = SPI_WRITE_PROTECTION_PERMANENT; + return spi_flash_set_write_protected(boot_dev, - region_device_region(rd), - SPI_WRITE_PROTECTION_REBOOT); + region_device_region(rd), lock); } /* Already write protected */ diff --git a/src/security/lockdown/Kconfig b/src/security/lockdown/Kconfig index 30b5237..97094ff 100644 --- a/src/security/lockdown/Kconfig +++ b/src/security/lockdown/Kconfig @@ -82,3 +82,31 @@ possible. This option prevents using write protecting facilities in ramstage, like the MRC cache for example. Use this option if you don't trust code running after verstage. + +choice + prompt "SPI Flash write protection duration" + default BOOTMEDIA_SPI_LOCK_REBOOT + depends on BOOTMEDIA_LOCK_CHIP + depends on BOOT_DEVICE_SPI_FLASH + +config BOOTMEDIA_SPI_LOCK_REBOOT + bool "Lock SPI flash until next reboot" + help + The SPI chip is locked until power is removed and re-applied. + Supported by Winbond parts. + +config BOOTMEDIA_SPI_LOCK_PIN + bool "Lock SPI flash using WP# pin" + help + The SPI chip is locked using a non-volatile configuration bit. Writes + are only possible if the WP# is not asserted. Supported by Winbond + and Macronix parts. + +config BOOTMEDIA_SPI_LOCK_PERMANENT + bool "Lock SPI flash permanently" + help + The SPI chip is permanently locked using a non-volatile configuration + bit. No writes are ever possible again after we perform the lock. + Supported by Winbond parts. + +endchoice -- To view, visit https://review.coreboot.org/c/coreboot/+/41747 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iba7c1229c82c86e1303d74c7bc8f89662b5bb58c Gerrit-Change-Number: 41747 Gerrit-PatchSet: 1 Gerrit-Owner: Daniel Gröber (dxld) Gerrit-Reviewer: Daniel Gröber <dxld(a)darkboxed.org> Gerrit-MessageType: newchange

4 5

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit June 2020