Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Duncan Laurie, Sridhar Siricilla, Aamir Bohra, Srinidhi N Kaushik, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Nathaniel L Desimone,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41728
to look at the new patch set (#14).
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
drivers/intel/fsp2_0: Add FSP 2.2 specific support
• Based on FSP EAS v2.1 – Backward compatibility is retained.
• Added multi-phase silicon initialization to increase the modularity of the
FspSiliconInit() API.
• Added FspMultiPhaseSiInit() API
• FSP_INFO_HEADER changes
o Added FspMultiPhaseSiInitEntryOffset
• Added FSPS_ARCH_UPD
o Added EnableMultiPhaseSiliconInit, bootloaders designed for
FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and
continue to use FspSiliconInit() without change.
FSP 2.2 Specification:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-…
Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/commonlib/include/commonlib/timestamp_serialized.h
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/header_display.c
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/include/fsp/upd.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/util.c
M src/include/console/post_codes.h
10 files changed, 175 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41728/14
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Martin Roth has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42065 )
Change subject: soc/amd/picasso: Remove unnecessary includes from pmutil.c
......................................................................
soc/amd/picasso: Remove unnecessary includes from pmutil.c
While working on psp_verstage, I noticed that this file had a number of
unnecessary includes. Remove them.
BUG=b:158124527
TEST=Build & boot psp_verstage on trembyle
Signed-off-by: Martin Roth <martin(a)coreboot.org>
Change-Id: I32188e2dda39ece9dc98d0344824d997a2e80303
---
M src/soc/amd/picasso/pmutil.c
1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/42065/1
diff --git a/src/soc/amd/picasso/pmutil.c b/src/soc/amd/picasso/pmutil.c
index a2ad2db..5baf923 100644
--- a/src/soc/amd/picasso/pmutil.c
+++ b/src/soc/amd/picasso/pmutil.c
@@ -1,9 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0-only */
-#include <acpi/acpi.h>
-#include <soc/southbridge.h>
-#include <amdblocks/acpimmio.h>
-#include <security/vboot/vboot_common.h>
#include <security/vboot/vbnv.h>
#include <pc80/mc146818rtc.h>
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 )
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
Patch Set 13:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41728/13/src/drivers/intel/fsp2_0/…
File src/drivers/intel/fsp2_0/header_display.c:
https://review.coreboot.org/c/coreboot/+/41728/13/src/drivers/intel/fsp2_0/…
PS13, Line 45: hdr->multi_phase_si_init_entry_offset);
code indent should use tabs where possible
https://review.coreboot.org/c/coreboot/+/41728/13/src/drivers/intel/fsp2_0/…
PS13, Line 45: hdr->multi_phase_si_init_entry_offset);
please, no spaces at the start of a line
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Gerrit-Comment-Date: Mon, 08 Jun 2020 07:12:21 +0000
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Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/41728 )
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/c/coreboot/+/41728/12/src/drivers/intel/fsp2_0/…
File src/drivers/intel/fsp2_0/include/fsp/util.h:
https://review.coreboot.org/c/coreboot/+/41728/12/src/drivers/intel/fsp2_0/…
PS12, Line 24: enum fsp_multi_phase_action {
: GET_NUMBER_OF_PHASES = 0,
: EXECUTE_PHASE = 1
: };
:
: struct fsp_multi_phase_get_number_of_phases_params {
: uint32_t number_of_phases;
: uint32_t phases_executed;
: };
> nit: Should these enum/structures be exposed externally?
Below is newly created entry point hence function prototype is here.
typedef asmlinkage uint32_t (*fsp_multi_phase_si_init_fn)(struct fsp_multi_phase_params *);
enum fsp_multi_phase_action is part of API structure hence need to here as well
They are being used in only silicon_init.c .
moved fsp_multi_phase_get_number_of_phases_params into silicon_init.c itself as its an intermediate call.
notify.c is also just calling those notify related function /macros (line 20-22)but they do exist here. Its more towards FSP spec symmetry
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/…
File src/drivers/intel/fsp2_0/util.c:
https://review.coreboot.org/c/coreboot/+/41728/11/src/drivers/intel/fsp2_0/…
PS11, Line 53: multi_phase_si_init_entry_offset
> Do you want to log the offset in the ""src/drivers/intel/fsp2_0/header_display. […]
Done
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Hello build bot (Jenkins), Furquan Shaikh, Wonkyu Kim, Maulik V Vaghela, Duncan Laurie, Sridhar Siricilla, Aamir Bohra, Srinidhi N Kaushik, Andrey Petrov, Aaron Durbin, Patrick Rudolph, Nathaniel L Desimone,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/41728
to look at the new patch set (#13).
Change subject: drivers/intel/fsp2_0: Add FSP 2.2 specific support
......................................................................
drivers/intel/fsp2_0: Add FSP 2.2 specific support
• Based on FSP EAS v2.1 – Backward compatibility is retained.
• Added multi-phase silicon initialization to increase the modularity of the
FspSiliconInit() API.
• Added FspMultiPhaseSiInit() API
• FSP_INFO_HEADER changes
o Added FspMultiPhaseSiInitEntryOffset
• Added FSPS_ARCH_UPD
o Added EnableMultiPhaseSiliconInit, bootloaders designed for
FSP 2.0/2.1 can disable the FspMultiPhaseSiInit() API and
continue to use FspSiliconInit() without change.
FSP 2.2 Specification:
https://www.intel.com/content/www/us/en/intelligent-systems/intel-firmware-…
Change-Id: If7177a267f3a9b4cbb60a639f1c737b9a3341913
Signed-off-by: Subrata Banik <subrata.banik(a)intel.com>
---
M src/commonlib/include/commonlib/timestamp_serialized.h
M src/drivers/intel/fsp2_0/Kconfig
M src/drivers/intel/fsp2_0/header_display.c
M src/drivers/intel/fsp2_0/include/fsp/api.h
M src/drivers/intel/fsp2_0/include/fsp/info_header.h
M src/drivers/intel/fsp2_0/include/fsp/upd.h
M src/drivers/intel/fsp2_0/include/fsp/util.h
M src/drivers/intel/fsp2_0/silicon_init.c
M src/drivers/intel/fsp2_0/util.c
M src/include/console/post_codes.h
10 files changed, 175 insertions(+), 13 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/41728/13
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Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/42099 )
Change subject: mb/asrock/b85m_pro4: Make VGA work on Linux
......................................................................
mb/asrock/b85m_pro4: Make VGA work on Linux
Currently, having libgfxinit try to enable VGA will result in a hang.
On the Asrock B85M Pro4, DDI E (VGA) was not being enabled in coreboot,
so it did not hang. However, this renders Linux's i915 driver unable to
use VGA at all. In absence of monitors with digital inputs, this is bad.
To work around this problem, mark DDI E as enabled, and comment out VGA
from gma-mainboard.ads for the time being. This allows one to use a VGA
monitor, even if it only works after Linux drivers have taken over.
Change-Id: Idd6a9e8515a1065ad3c6ddf136896fef9f0fa732
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
---
M src/mainboard/asrock/b85m_pro4/devicetree.cb
M src/mainboard/asrock/b85m_pro4/gma-mainboard.ads
2 files changed, 5 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/99/42099/1
diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb
index 5cf4cf4..eec921ec 100644
--- a/src/mainboard/asrock/b85m_pro4/devicetree.cb
+++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb
@@ -1,5 +1,8 @@
chip northbridge/intel/haswell
+ # This mainboard has VGA
+ register "gpu_ddi_e_connected" = "1"
+
device cpu_cluster 0 on
chip cpu/intel/haswell
register "c1_acpower" = "1"
diff --git a/src/mainboard/asrock/b85m_pro4/gma-mainboard.ads b/src/mainboard/asrock/b85m_pro4/gma-mainboard.ads
index 393275b..49ca38c 100644
--- a/src/mainboard/asrock/b85m_pro4/gma-mainboard.ads
+++ b/src/mainboard/asrock/b85m_pro4/gma-mainboard.ads
@@ -11,7 +11,8 @@
ports : constant Port_List :=
(HDMI1, -- DVI-D
HDMI3, -- HDMI
- Analog, -- VGA
+ -- FIXME: Haswell VGA support in libgfxinit is broken
+ -- Analog, -- VGA
others => Disabled);
end GMA.Mainboard;
--
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