Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46713 )
Change subject: driver/usb/acpi: Add power resources for devices on USB ports
......................................................................
driver/usb/acpi: Add power resources for devices on USB ports
Allow a USB device to define PowerResource in its SSDT AML code.
PowerResouce ACPI generation expects SoC to define the callbacks for
generating AML code for GPIO manipulation.
Device requiring PowerResource needs to define following parameters:
* Reset GPIO - Optional, GPIO to put device into reset or take it out
of reset.
* Reset delay - Delay after reset GPIO is asserted (default 0).
* Reset off delay - Delay after reset GPIO is de-asserted (default 0).
* Enable GPIO - Optional, GPIO to enable device.
* Enable delay - Delay after enable GPIO is asserted (default 0).
* Enable off delay - Delay after enable GPIO is de-asserted (default 0).
BUG=b:163100335
TEST=Ensure that the Power Resource ACPI object is added under the
concerned USB device.
Change-Id: Icc1aebfb9e3e646a7f608f0cd391079fd30dd1c0
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/46713
Reviewed-by: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Reviewed-by: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com>
Reviewed-by: Furquan Shaikh <furquan(a)google.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/drivers/usb/acpi/chip.h
M src/drivers/usb/acpi/usb_acpi.c
2 files changed, 32 insertions(+), 2 deletions(-)
Approvals:
build bot (Jenkins): Verified
Furquan Shaikh: Looks good to me, approved
Tim Wawrzynczak: Looks good to me, approved
Peichao Wang: Looks good to me, approved
diff --git a/src/drivers/usb/acpi/chip.h b/src/drivers/usb/acpi/chip.h
index 8cd9268..8afdf6f 100644
--- a/src/drivers/usb/acpi/chip.h
+++ b/src/drivers/usb/acpi/chip.h
@@ -44,7 +44,21 @@
bool use_custom_pld;
struct acpi_pld custom_pld;
+ /* Does the device have a power resource? */
+ bool has_power_resource;
+
+ /* GPIO used to take device out of reset or to put it into reset. */
struct acpi_gpio reset_gpio;
+ /* Delay to be inserted after device is taken out of reset. */
+ unsigned int reset_delay_ms;
+ /* Delay to be inserted after device is put into reset. */
+ unsigned int reset_off_delay_ms;
+ /* GPIO used to enable device. */
+ struct acpi_gpio enable_gpio;
+ /* Delay to be inserted after device is enabled. */
+ unsigned int enable_delay_ms;
+ /* Delay to be inserted after device is disabled. */
+ unsigned int enable_off_delay_ms;
};
#endif /* __USB_ACPI_CHIP_H__ */
diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c
index 55ef1d3..8a597e3 100644
--- a/src/drivers/usb/acpi/usb_acpi.c
+++ b/src/drivers/usb/acpi/usb_acpi.c
@@ -11,9 +11,10 @@
static bool usb_acpi_add_gpios_to_crs(struct drivers_usb_acpi_config *cfg)
{
/*
- * Return false if reset GPIO is not provided.
+ * Return false if reset GPIO is not provided or is provided as part of power
+ * resource.
*/
- if (cfg->reset_gpio.pin_count == 0)
+ if (cfg->has_power_resource || cfg->reset_gpio.pin_count == 0)
return false;
return true;
@@ -61,6 +62,21 @@
acpi_dp_write(dsd);
}
+ if (config->has_power_resource) {
+ const struct acpi_power_res_params power_res_params = {
+ &config->reset_gpio,
+ config->reset_delay_ms,
+ config->reset_off_delay_ms,
+ &config->enable_gpio,
+ config->enable_delay_ms,
+ config->enable_off_delay_ms,
+ NULL,
+ 0,
+ 0
+ };
+ acpi_device_add_power_res(&power_res_params);
+ }
+
acpigen_pop_len();
printk(BIOS_INFO, "%s: %s at %s\n", path,
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Icc1aebfb9e3e646a7f608f0cd391079fd30dd1c0
Gerrit-Change-Number: 46713
Gerrit-PatchSet: 5
Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Peichao Wang <pwang12(a)lenovo.corp-partner.google.com>
Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Rasheed Hsueh <rasheed.hsueh(a)lcfc.corp-partner.google.com>
Gerrit-MessageType: merged
David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47228 )
Change subject: mb/google/volteer/var/voema: Add memory parts and generate DRAM IDs
......................................................................
mb/google/volteer/var/voema: Add memory parts and generate DRAM IDs
This change adds memory parts used by variant voema to
mem_parts_used.txt and generates DRAM IDs allocated to these parts.
Added memory
1. MT53E512M64D4NW-046 WT:E
2. MT53E1G64D8NW-046 WT:E
BUG=b:171755775
TEST=emerge-volteer coreboot chromeos-bootimage
Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com>
Change-Id: I24d466f92a7e0fa3ab2f6241f0b5af025c53ed98
---
M src/mainboard/google/volteer/variants/voema/memory/Makefile.inc
M src/mainboard/google/volteer/variants/voema/memory/dram_id.generated.txt
M src/mainboard/google/volteer/variants/voema/memory/mem_parts_used.txt
3 files changed, 7 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/47228/1
diff --git a/src/mainboard/google/volteer/variants/voema/memory/Makefile.inc b/src/mainboard/google/volteer/variants/voema/memory/Makefile.inc
index b0ca222..3c8ea48 100644
--- a/src/mainboard/google/volteer/variants/voema/memory/Makefile.inc
+++ b/src/mainboard/google/volteer/variants/voema/memory/Makefile.inc
@@ -1,5 +1,6 @@
## SPDX-License-Identifier: GPL-2.0-or-later
## This is an auto-generated file. Do not edit!!
-## Add memory parts in mem_parts_used.txt and run spd_tools to regenerate.
-SPD_SOURCES = placeholder.spd.hex
+SPD_SOURCES =
+SPD_SOURCES += lp4x-spd-1.hex # ID = 0(0b0000) Parts = MT53E512M64D4NW-046 WT:E
+SPD_SOURCES += lp4x-spd-3.hex # ID = 1(0b0001) Parts = MT53E1G64D8NW-046 WT:E
diff --git a/src/mainboard/google/volteer/variants/voema/memory/dram_id.generated.txt b/src/mainboard/google/volteer/variants/voema/memory/dram_id.generated.txt
index fa24790..02e7443 100644
--- a/src/mainboard/google/volteer/variants/voema/memory/dram_id.generated.txt
+++ b/src/mainboard/google/volteer/variants/voema/memory/dram_id.generated.txt
@@ -1 +1,3 @@
DRAM Part Name ID to assign
+MT53E512M64D4NW-046 WT:E 0 (0000)
+MT53E1G64D8NW-046 WT:E 1 (0001)
diff --git a/src/mainboard/google/volteer/variants/voema/memory/mem_parts_used.txt b/src/mainboard/google/volteer/variants/voema/memory/mem_parts_used.txt
index f51b3af..b74da4a 100644
--- a/src/mainboard/google/volteer/variants/voema/memory/mem_parts_used.txt
+++ b/src/mainboard/google/volteer/variants/voema/memory/mem_parts_used.txt
@@ -1,4 +1,2 @@
-# This is a CSV file containing a list of memory parts used by this variant.
-# Generate an updated Makefile.inc and dram_id.generated.txt by running the
-# gen_part_id tool from util/spd_tools/ddr4 or util/spd_tools/lp4x
-# See util/spd_tools/{ddr4,lp4x}/README.md for more details and instructions.
+MT53E512M64D4NW-046 WT:E
+MT53E1G64D8NW-046 WT:E
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I24d466f92a7e0fa3ab2f6241f0b5af025c53ed98
Gerrit-Change-Number: 47228
Gerrit-PatchSet: 1
Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com>
Gerrit-MessageType: newchange
Srinidhi N Kaushik has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47209 )
Change subject: soc/intel/tigerlake: Utilize vbt data size Kconfig option
......................................................................
soc/intel/tigerlake: Utilize vbt data size Kconfig option
From Tigerlake FSP v3373 onwards vbt binary size changed from 8KiB
to 9KiB. Commit cf5d58328fe004d967466be42de62d6bab4c3133 had changed
the size from 8 to 9 Kib in drivers/gma. This change makes use of
Kconfig option to pick the size for tigerlake.
BUG=b:171401992
BRANCH=none
TEST=build and boot delbin and verify fw screen is loaded
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>
Change-Id: I21a0bba9ae01bac326f0f931641c98e8d308310f
---
M src/soc/intel/tigerlake/Kconfig
1 file changed, 4 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/47209/1
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index ed35bd6..b9a5b60 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -186,6 +186,10 @@
config TPM_CR50
select CR50_USE_LONG_INTERRUPT_PULSES
+config VBT_DATA_SIZE_KB
+ int
+ default 9
+
config VBOOT
select VBOOT_SEPARATE_VERSTAGE
select VBOOT_MUST_REQUEST_DISPLAY
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I21a0bba9ae01bac326f0f931641c98e8d308310f
Gerrit-Change-Number: 47209
Gerrit-PatchSet: 1
Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com>
Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org>
Gerrit-MessageType: newchange