Change in coreboot[master]: soc/intel/tigerlake: Add PCH PCIe RPs wake up events to event log

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coreboot-gerrit@coreboot.org

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  • Furquan Shaikh (Code Review)
  • Karthik Ramasubramanian (Code Review)
  • Patrick Georgi (Code Review)
  • Tim Wawrzynczak (Code Review)