Johnny Li has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47225 )
Change subject: mb/google/volteer/variants/volteer2: Tune I2C3 camera bus freq 400 kHz
......................................................................
mb/google/volteer/variants/volteer2: Tune I2C3 camera bus freq 400 kHz
The current I2C3 bus frequency is 341 kHZ, which does not meet the spec.
This change updates scl_lcnt, scl_hcnt, sda_hold value for I2C3 to bring
the bus frequency closer to 400kHz.
BUG=b:153588771
TEST=Verified that I2C3 frequency is 394kHz.
Signed-off-by: Johnny Li <johnny_li(a)wistron.corp-partner.google.com>
Change-Id: Ie1ef95bb39d71fbb113120a0ec88305bc23e7ab9
---
M src/mainboard/google/volteer/variants/volteer2/overridetree.cb
1 file changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/47225/1
diff --git a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
index bb4db53..1cb0b52 100644
--- a/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
+++ b/src/mainboard/google/volteer/variants/volteer2/overridetree.cb
@@ -39,6 +39,12 @@
},
.i2c[3] = {
.speed = I2C_SPEED_FAST,
+ .speed_config[0] = {
+ .speed = I2C_SPEED_FAST,
+ .scl_lcnt = 153,
+ .scl_hcnt = 75,
+ .sda_hold = 36,
+ },
},
.i2c[5] = {
.speed = I2C_SPEED_FAST,
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ie1ef95bb39d71fbb113120a0ec88305bc23e7ab9
Gerrit-Change-Number: 47225
Gerrit-PatchSet: 1
Gerrit-Owner: Johnny Li <johnny_li(a)wistron.corp-partner.google.com>
Gerrit-MessageType: newchange
Hello Arthur Heymans,
I'd like you to do a code review. Please visit
https://review.coreboot.org/c/coreboot/+/45003
to review the following change.
Change subject: sec/intel/txt/Kconfig: Remove the menu for including ACMs
......................................................................
sec/intel/txt/Kconfig: Remove the menu for including ACMs
This is consistent with how other binaries (e.g. FSP) are added via
Kconfig. This also makes it more visible that things need to be
configured.
Change-Id: I399de6270cc4c0ab3b8c8a9543aec0d68d3cfc03
Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz>
---
M src/security/intel/txt/Kconfig
1 file changed, 0 insertions(+), 4 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/45003/1
diff --git a/src/security/intel/txt/Kconfig b/src/security/intel/txt/Kconfig
index d828a9d..049705f 100644
--- a/src/security/intel/txt/Kconfig
+++ b/src/security/intel/txt/Kconfig
@@ -26,8 +26,6 @@
if INTEL_TXT
-menu "Intel"
-
config INTEL_TXT_BIOSACM_FILE
string "BIOS ACM file"
default "3rdparty/blobs/soc/intel/fsp_broadwell_de/biosacm.bin" if SOC_INTEL_FSP_BROADWELL_DE
@@ -71,6 +69,4 @@
string
default "txt_sinit_acm.bin"
-endmenu # Intel
-
endif
--
To view, visit https://review.coreboot.org/c/coreboot/+/45003
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Gerrit-Project: coreboot
Gerrit-Branch: 4.11_branch
Gerrit-Change-Id: I399de6270cc4c0ab3b8c8a9543aec0d68d3cfc03
Gerrit-Change-Number: 45003
Gerrit-PatchSet: 1
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz>
Gerrit-MessageType: newchange