
Change in coreboot[master]: mb/intel/adlrvp: Enable TCSS xDCI, TBT PCIe RP and DMA controllers
by V Sowmya (Code Review) Nov. 7, 2020
by V Sowmya (Code Review) Nov. 7, 2020
Nov. 7, 2020
2
3

Change in coreboot[master]: mb/intel/adlrvp: Configure the HPD GPIO's
by V Sowmya (Code Review) Nov. 7, 2020
by V Sowmya (Code Review) Nov. 7, 2020
Nov. 7, 2020
3
6

Change in coreboot[master]: soc/intel/skylake: Enable PCH thermal depending on devicetree
by Benjamin Doron (Code Review) Nov. 7, 2020
by Benjamin Doron (Code Review) Nov. 7, 2020
Nov. 7, 2020
1
0

Change in coreboot[master]: vc/intel/FSP2_0/CPX-SP: update to ww34 release and accomodate waterma...
by Jonathan Zhang (Code Review) Nov. 7, 2020
by Jonathan Zhang (Code Review) Nov. 7, 2020
Nov. 7, 2020
5
16

Change in coreboot[master]: soc/intel/skylake: Enable PCH thermal depending on devicetree
by Michael Niewöhner (Code Review) Nov. 7, 2020
by Michael Niewöhner (Code Review) Nov. 7, 2020
Nov. 7, 2020
1
0

Change in coreboot[master]: soc/intel/skylake: Enable PCH thermal depending on devicetree
by Benjamin Doron (Code Review) Nov. 6, 2020
by Benjamin Doron (Code Review) Nov. 6, 2020
Nov. 6, 2020
1
0

Change in coreboot[master]: sc7180: Correct mmu configuration for AOP SRAM regions
by mturney mturney (Code Review) Nov. 6, 2020
by mturney mturney (Code Review) Nov. 6, 2020
Nov. 6, 2020
2
5

Change in coreboot[master]: soc/intel/skylake: Enable PCH thermal depending on devicetree
by Michael Niewöhner (Code Review) Nov. 6, 2020
by Michael Niewöhner (Code Review) Nov. 6, 2020
Nov. 6, 2020
1
0

Change in coreboot[master]: console: Allow VPD to disable an otherwise enabled coreboot console
by Marc Jones (Code Review) Nov. 6, 2020
by Marc Jones (Code Review) Nov. 6, 2020
Nov. 6, 2020
1
0

Change in coreboot[master]: soc/intel/skylake: Enable PCH thermal depending on devicetree
by Benjamin Doron (Code Review) Nov. 6, 2020
by Benjamin Doron (Code Review) Nov. 6, 2020
Nov. 6, 2020
1
0