coreboot-gerrit January 2020

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/intel/tglrvp : Add ACPI support for CNVi
by Furquan Shaikh (Code Review) 07 Jan '20

07 Jan '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37887 ) Change subject: mb/intel/tglrvp : Add ACPI support for CNVi ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/37887/3/src/mainboard/intel/tglrvp… File src/mainboard/intel/tglrvp/acpi/cnvi.asl: PS3: > some of method is using GPIO which is board specific(SBTE, GBTE) […] Nothing in this patch is really using those methods. Are those even required? -- To view, visit https://review.coreboot.org/c/coreboot/+/37887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66091374f8ebcb06457296252c9a8924734a7fa5 Gerrit-Change-Number: 37887 Gerrit-PatchSet: 3 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Jan 2020 04:11:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in coreboot[master]: src/ec/google/chromeec: Get Type-C Mux info from EC
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37867 ) Change subject: src/ec/google/chromeec: Get Type-C Mux info from EC ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/37867 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I96bfb6036f4340ba42a078cfd7ecaae777a3ed00 Gerrit-Change-Number: 37867 Gerrit-PatchSet: 2 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Divya S Sasidharan <divya.s.sasidharan(a)intel.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 07 Jan 2020 02:31:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/tigerlake: Add code for early tcss
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37870 ) Change subject: soc/intel/tigerlake: Add code for early tcss ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/37870 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I45c3fe9d4a2ec2f2f51b78cca2bd7e623540c00e Gerrit-Change-Number: 37870 Gerrit-PatchSet: 3 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 07 Jan 2020 02:27:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/tglrvp : Add ACPI support for CNVi
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37887 ) Change subject: mb/intel/tglrvp : Add ACPI support for CNVi ...................................................................... Patch Set 3: (1 comment) I think we also need devicetree change to enable CNVi https://review.coreboot.org/c/coreboot/+/37887/3/src/mainboard/intel/tglrvp… File src/mainboard/intel/tglrvp/acpi/cnvi.asl: PS3: > I think this file needs to be cleaned up, but is there any reason why this is put under mainboard an […] some of method is using GPIO which is board specific(SBTE, GBTE) We can split asls to board dependent and soc dependent. -- To view, visit https://review.coreboot.org/c/coreboot/+/37887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66091374f8ebcb06457296252c9a8924734a7fa5 Gerrit-Change-Number: 37887 Gerrit-PatchSet: 3 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Jan 2020 02:25:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

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Change in gerrit-avatars[master]: avatar for user 1002745
by Jenrus (Джэнрус) (Code Review) 07 Jan '20

07 Jan '20

Jenrus (Джэнрус) has uploaded this change for review. ( https://review.coreboot.org/c/gerrit-avatars/+/38144 ) Change subject: avatar for user 1002745 ...................................................................... avatar for user 1002745 Change-Id: I5ecd2c9e8cba906a5b62e1d2dfcc7ea70ab88316 --- A 1002745.jpg 1 file changed, 0 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/gerrit-avatars refs/changes/44/38144/1 diff --git a/1002745.jpg b/1002745.jpg new file mode 100644 index 0000000..175fde4 --- /dev/null +++ b/1002745.jpg Binary files differ -- To view, visit https://review.coreboot.org/c/gerrit-avatars/+/38144 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: gerrit-avatars Gerrit-Branch: master Gerrit-Change-Id: I5ecd2c9e8cba906a5b62e1d2dfcc7ea70ab88316 Gerrit-Change-Number: 38144 Gerrit-PatchSet: 1 Gerrit-Owner: Jenrus (Джэнрус) <jenrus(a)tuta.io> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/picasso: Support reset vector in romstage
by Marshall Dawson (Code Review) 07 Jan '20

07 Jan '20

Marshall Dawson has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33759 ) Change subject: soc/amd/picasso: Support reset vector in romstage ...................................................................... Patch Set 20: (1 comment) https://review.coreboot.org/c/coreboot/+/33759/20/src/soc/amd/picasso/Makef… File src/soc/amd/picasso/Makefile.inc: https://review.coreboot.org/c/coreboot/+/33759/20/src/soc/amd/picasso/Makef… PS20, Line 211: ifeq ($(CONFIG_RESET_VECTOR_IN_RAM_ROMSTAGE),y) > AFAICS if you incorporate ELF parsing into amdfwtool and remove the separate util/cbfstool/amdcompre […] Yes, you're right. However the reason I wanted to keep it out of amdfwtool was looking forward for when the biosbin might need to be somewhere outside of the traditional amdfw.rom. If we rely on amdfwtool (assuming a single pass), then it won't know where to set the source field. Maybe it could be moved there, providing the option of doing a simple single pass or one to build the boisbin and another that could pass an image and source address on the command line. -- To view, visit https://review.coreboot.org/c/coreboot/+/33759 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id8c6175de34a0728ad41085e9c7cd310bd280976 Gerrit-Change-Number: 33759 Gerrit-PatchSet: 20 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aaron Durbin <adurbin(a)chromium.org> Gerrit-CC: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 06 Jan 2020 23:54:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: comment

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Change in coreboot[master]: mb/intel/tglrvp: Add initial mainboard code
by Srinidhi N Kaushik (Code Review) 07 Jan '20

07 Jan '20

Srinidhi N Kaushik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37868 ) Change subject: mb/intel/tglrvp: Add initial mainboard code ...................................................................... Patch Set 10: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/37868 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86ada611de1cf28a1b872eea35cf41c0dc1c57f1 Gerrit-Change-Number: 37868 Gerrit-PatchSet: 10 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 06 Jan 2020 23:45:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/drallion: Increase number of CPU's
by Bernardo Perez Priego (Code Review) 07 Jan '20

07 Jan '20

Bernardo Perez Priego has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37763 ) Change subject: mb/google/drallion: Increase number of CPU's ...................................................................... mb/google/drallion: Increase number of CPU's Signed-off-by: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Change-Id: Id1fa81282a7674e2a80972b1278423c59dcd7a01 --- M src/mainboard/google/drallion/Kconfig 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/37763/1 diff --git a/src/mainboard/google/drallion/Kconfig b/src/mainboard/google/drallion/Kconfig index 27818c0..cf3a8e6 100644 --- a/src/mainboard/google/drallion/Kconfig +++ b/src/mainboard/google/drallion/Kconfig @@ -77,7 +77,7 @@ config MAX_CPUS int - default 8 + default 12 config UART_FOR_CONSOLE int -- To view, visit https://review.coreboot.org/c/coreboot/+/37763 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id1fa81282a7674e2a80972b1278423c59dcd7a01 Gerrit-Change-Number: 37763 Gerrit-PatchSet: 1 Gerrit-Owner: Bernardo Perez Priego <bernardo.perez.priego(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/amdfwtool: Add instances for APCB backup
by Marshall Dawson (Code Review) 07 Jan '20

07 Jan '20

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/38168 ) Change subject: util/amdfwtool: Add instances for APCB backup ...................................................................... util/amdfwtool: Add instances for APCB backup Match each of the possible APCB items with a corresponding backup APCB. A missing backup copy can prevent the system from booting. Change-Id: I400194b2763239896214ea42cfe6fbeb8ed261a8 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 5 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/68/38168/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 02564cf..39cc45f 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -362,7 +362,11 @@ { .type = AMD_BIOS_APCB, .inst = 2, .level = BDT_BOTH }, { .type = AMD_BIOS_APCB, .inst = 3, .level = BDT_BOTH }, { .type = AMD_BIOS_APCB, .inst = 4, .level = BDT_BOTH }, - { .type = AMD_BIOS_APCB_BK, .level = BDT_BOTH }, + { .type = AMD_BIOS_APCB_BK, .inst = 0, .level = BDT_BOTH }, + { .type = AMD_BIOS_APCB_BK, .inst = 1, .level = BDT_BOTH }, + { .type = AMD_BIOS_APCB_BK, .inst = 2, .level = BDT_BOTH }, + { .type = AMD_BIOS_APCB_BK, .inst = 3, .level = BDT_BOTH }, + { .type = AMD_BIOS_APCB_BK, .inst = 4, .level = BDT_BOTH }, { .type = AMD_BIOS_APOB, .level = BDT_BOTH }, { .type = AMD_BIOS_BIN, .reset = 1, .copy = 1, .zlib = 1, .level = BDT_BOTH }, -- To view, visit https://review.coreboot.org/c/coreboot/+/38168 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I400194b2763239896214ea42cfe6fbeb8ed261a8 Gerrit-Change-Number: 38168 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: util/inteltool: Add GPIO dumping capabilites for Icelake U systems
by Matt DeVillier (Code Review) 06 Jan '20

06 Jan '20

Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/38175 ) Change subject: util/inteltool: Add GPIO dumping capabilites for Icelake U systems ...................................................................... Patch Set 7: > Matt, Jeremy, you probably are also working with Ice Lake devices. Maybe you can verify the code? sadly I don't have an ICL board yet to do so -- To view, visit https://review.coreboot.org/c/coreboot/+/38175 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib40f1dbae57169678e92ea9ad0df60ff91b5b22c Gerrit-Change-Number: 38175 Gerrit-PatchSet: 7 Gerrit-Owner: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Mimoja <coreboot(a)mimoja.de> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jeremy Soller <jeremy(a)system76.com> Gerrit-CC: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 06 Jan 2020 21:31:14 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit January 2020