Change in coreboot[master]: nb/intel/sandybridge: Use the MC_BIOS_DATA define
by Angel Pons (Code Review) Jan. 1, 2020
by Angel Pons (Code Review) Jan. 1, 2020
Jan. 1, 2020
2
2
Change in coreboot[master]: nb/intel/sandybridge: Make `PM_PDWN_Config` uppercase
by Angel Pons (Code Review) Jan. 1, 2020
by Angel Pons (Code Review) Jan. 1, 2020
Jan. 1, 2020
2
2
Change in coreboot[master]: nb/intel/sandybridge: add and use memory thermal configuration registers
by Felix Held (Code Review) Jan. 1, 2020
by Felix Held (Code Review) Jan. 1, 2020
Jan. 1, 2020
3
6
Change in coreboot[master]: nb/intel/sandybridge: add and use ME stolen memory and lock bit defines
by Felix Held (Code Review) Jan. 1, 2020
by Felix Held (Code Review) Jan. 1, 2020
Jan. 1, 2020
3
6
Change in coreboot[master]: nb/intel/sandybridge: remove unused duplicate PCIEXBAR define X60BAR
by Felix Held (Code Review) Jan. 1, 2020
by Felix Held (Code Review) Jan. 1, 2020
Jan. 1, 2020
3
3
Change in coreboot[master]: nb/intel/sandybridge: add and use more MCHBAR register defines
by Felix Held (Code Review) Jan. 1, 2020
by Felix Held (Code Review) Jan. 1, 2020
Jan. 1, 2020
3
10
Change in coreboot[master]: nb/intel/sandybridge: move MCHBAR register definitions to sandybridge.h
by Felix Held (Code Review) Jan. 1, 2020
by Felix Held (Code Review) Jan. 1, 2020
Jan. 1, 2020
3
3
Change in coreboot[master]: nb/intel/sandybridge: use MESEG register names from datasheet
by Felix Held (Code Review) Jan. 1, 2020
by Felix Held (Code Review) Jan. 1, 2020
Jan. 1, 2020
4
4
Change in coreboot[master]: soc/amd/stoneyridge: Change default locations for blobs
by Marshall Dawson (Code Review) Jan. 1, 2020
by Marshall Dawson (Code Review) Jan. 1, 2020
Jan. 1, 2020
4
8