January 2020 - coreboot-gerrit

Change in coreboot[master]: soc/intel/bsw/gpio.h: Drop unused values
by Angel Pons (Code Review) Jan. 2, 2020

Jan. 2, 2020

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37405 ) Change subject: soc/intel/bsw/gpio.h: Drop unused values ...................................................................... soc/intel/bsw/gpio.h: Drop unused values Most of these are leftovers from the initial copy from Baytrail. Change-Id: I1c437f34902400022ac6a5e95ff6168545ca557f Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/soc/intel/braswell/include/soc/gpio.h 1 file changed, 0 insertions(+), 94 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/37405/1 diff --git a/src/soc/intel/braswell/include/soc/gpio.h b/src/soc/intel/braswell/include/soc/gpio.h index 24318c5..f945752 100644 --- a/src/soc/intel/braswell/include/soc/gpio.h +++ b/src/soc/intel/braswell/include/soc/gpio.h @@ -128,10 +128,6 @@ /* Pad register offset */ #define PAD_CONF0_REG 0x0 #define PAD_CONF1_REG 0x4 -#define PAD_VAL_REG 0x8 - -/* Some banks have no legacy GPIO interface */ -#define GP_LEGACY_BASE_NONE 0xFFFF /* Number of GPIOs in each bank */ #define GPNCORE_COUNT 27 @@ -146,8 +142,6 @@ /* General */ #define GPIO_REGS_SIZE 8 #define NA 0 -#define LOW 0 -#define HIGH 1 #define MASK_WAKE 0 #define UNMASK_WAKE 1 #define GPE_CAPABLE 1 @@ -354,13 +348,7 @@ #define GPIO_END \ { .pad_conf0 = GPIO_LIST_END } -/* 16 DirectIRQs per supported bank */ -#define GPIO_MAX_DIRQS 16 - -#define GPIO_NONE 255 - /* Functions / defines for changing GPIOs in romstage */ -/* SCORE Pad definitions. */ #define UART_RXD_PAD 82 #define UART_TXD_PAD 83 #define PCU_SMB_CLK_PAD 88 @@ -374,7 +362,6 @@ struct soc_gpio_map { u32 pad_conf0; u32 pad_conf1; - u32 pad_val; u32 gpe; u32 int_mask:1; u32 wake_mask:1; @@ -393,39 +380,12 @@ struct gpio_bank { const int gpio_count; const u8 *gpio_to_pad; - const int legacy_base; const unsigned long pad_base; const u8 has_gpe_en:1; const u8 has_wake_en:1; }; typedef enum { - NATIVE = 0xff, - GPIO = 0, /* Native, no need to set PAD_VALUE */ - GPO = 1, /* GPI, input only in PAD_VALUE */ - GPI = 2, /* GPO, output only in PAD_VALUE */ - HI_Z = 3, - NA_GPO = 0, -} gpio_en_t; - -typedef enum { - LO = 0, - HI = 1, -} gpo_d4_t; - -typedef enum { - F0 = 0, - F1 = 1, - F2 = 2, - F3 = 3 -} gpio_func_num_t; - -typedef enum { - _CAP = 1, - _NOT_CAP = 0 -} int_capable_t; - -typedef enum { P_NONE = 0, /* Pull None */ P_20K_L = 1, /* Pull Down 20K */ P_5K_L = 2, /* Pull Down 5K */ @@ -436,42 +396,6 @@ } pull_type_t; typedef enum { - DISABLE = 0, /* Disable */ - ENABLE = 1, /* Enable */ -} park_mode_enb_t; - -typedef enum { - VOLT_3_3 = 0, /* Working on 3.3 Volts */ - VOLT_1_8 = 1, /* Working on 1.8 Volts */ -} voltage_t; - -typedef enum { - DISABLE_HS = 0, /* Disable high speed mode */ - ENABLE_HS = 1, /* Enable high speed mode */ -} hs_mode_t; - -typedef enum { - PULL_UP = 0, /* On Die Termination Up */ - PULL_DOWN = 1, /* On Die Termination Down */ -} odt_up_dn_t; - -typedef enum { - DISABLE_OD = 0, /* On Die Termination Disable */ - ENABLE_OD = 1, /* On Die Termination Enable */ -} odt_en_t; - -typedef enum { - ONE_BIT = 1, - TWO_BIT = 3, - THREE_BIT = 7, - FOUR_BIT = 15, - FIVE_BIT = 31, - SIX_BIT = 63, - SEVEN_BIT = 127, - EIGHT_BIT = 255 -} bit_t; - -typedef enum { M0 = 0, M1, M2, @@ -552,27 +476,9 @@ inv_tx_data = 0x8, } invert_rx_tx_t; -#define PAD_VAL_HIGH (1 << 0) - void setup_soc_gpios(struct soc_gpio_config *config, u8 enable_xdp_tap); struct soc_gpio_config *mainboard_get_gpios(void); -static inline void ncore_select_func(int pad, int func) -{ - -} - -/* These functions require that the input pad be configured as an input GPIO */ - -static inline int ssus_get_gpio(int pad) -{ - return 0; -} - -static inline void ssus_disable_internal_pull(int pad) -{ -} - typedef int gpio_t; int get_gpio(int community_base, int pad0_offset); -- To view, visit https://review.coreboot.org/c/coreboot/+/37405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c437f34902400022ac6a5e95ff6168545ca557f Gerrit-Change-Number: 37405 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: src: Remove unneeded 'include <arch/io.h>'
by HAOUAS Elyes (Code Review) Jan. 2, 2020

Jan. 2, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37983 ) Change subject: src: Remove unneeded 'include <arch/io.h>' ...................................................................... src: Remove unneeded 'include <arch/io.h>' Change-Id: Ie4293094ad703a2d8b68a8c640bd8d9cece2e6e8 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/pcengines/apu1/gpio_ftns.c M src/northbridge/intel/pineview/early_init.c M src/northbridge/intel/sandybridge/early_init.c M src/northbridge/intel/x4x/early_init.c M src/soc/amd/picasso/smbus.c M src/soc/amd/stoneyridge/smbus.c M src/soc/intel/broadwell/finalize.c M src/southbridge/amd/agesa/hudson/early_setup.c M src/southbridge/amd/pi/hudson/early_setup.c 9 files changed, 0 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/37983/1 diff --git a/src/mainboard/pcengines/apu1/gpio_ftns.c b/src/mainboard/pcengines/apu1/gpio_ftns.c index bedd15a..4e58d55 100644 --- a/src/mainboard/pcengines/apu1/gpio_ftns.c +++ b/src/mainboard/pcengines/apu1/gpio_ftns.c @@ -15,7 +15,6 @@ #include <stdint.h> #include <amdblocks/acpimmio.h> -#include <arch/io.h> #include <southbridge/amd/cimx/sb800/SBPLATFORM.h> #include "gpio_ftns.h" diff --git a/src/northbridge/intel/pineview/early_init.c b/src/northbridge/intel/pineview/early_init.c index aec910c..b5c5ee0 100644 --- a/src/northbridge/intel/pineview/early_init.c +++ b/src/northbridge/intel/pineview/early_init.c @@ -15,7 +15,6 @@ */ #include <console/console.h> -#include <arch/io.h> #include <device/pci_ops.h> #include <device/pci_def.h> #include <device/pci.h> diff --git a/src/northbridge/intel/sandybridge/early_init.c b/src/northbridge/intel/sandybridge/early_init.c index 4866558..95fc52d 100644 --- a/src/northbridge/intel/sandybridge/early_init.c +++ b/src/northbridge/intel/sandybridge/early_init.c @@ -17,7 +17,6 @@ */ #include <console/console.h> -#include <arch/io.h> #include <device/mmio.h> #include <device/device.h> #include <device/pci_ops.h> diff --git a/src/northbridge/intel/x4x/early_init.c b/src/northbridge/intel/x4x/early_init.c index f89411e..c9d44fc 100644 --- a/src/northbridge/intel/x4x/early_init.c +++ b/src/northbridge/intel/x4x/early_init.c @@ -15,7 +15,6 @@ */ #include <stdint.h> -#include <arch/io.h> #include <device/pci_ops.h> #include "iomap.h" #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX) diff --git a/src/soc/amd/picasso/smbus.c b/src/soc/amd/picasso/smbus.c index 31457f9..79f09d6 100644 --- a/src/soc/amd/picasso/smbus.c +++ b/src/soc/amd/picasso/smbus.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <stdint.h> #include <console/console.h> #include <amdblocks/acpimmio.h> diff --git a/src/soc/amd/stoneyridge/smbus.c b/src/soc/amd/stoneyridge/smbus.c index 31457f9..79f09d6 100644 --- a/src/soc/amd/stoneyridge/smbus.c +++ b/src/soc/amd/stoneyridge/smbus.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <stdint.h> #include <console/console.h> #include <amdblocks/acpimmio.h> diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index 7866c4c..442a870 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <arch/io.h> #include <bootstate.h> #include <console/console.h> #include <console/post_codes.h> diff --git a/src/southbridge/amd/agesa/hudson/early_setup.c b/src/southbridge/amd/agesa/hudson/early_setup.c index 84c4299..639a5e8 100644 --- a/src/southbridge/amd/agesa/hudson/early_setup.c +++ b/src/southbridge/amd/agesa/hudson/early_setup.c @@ -17,7 +17,6 @@ #define _HUDSON_EARLY_SETUP_C_ #include <stdint.h> -#include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> #include <amdblocks/acpimmio.h> diff --git a/src/southbridge/amd/pi/hudson/early_setup.c b/src/southbridge/amd/pi/hudson/early_setup.c index 0e3646b..191a96c 100644 --- a/src/southbridge/amd/pi/hudson/early_setup.c +++ b/src/southbridge/amd/pi/hudson/early_setup.c @@ -18,7 +18,6 @@ #include <assert.h> #include <stdint.h> -#include <arch/io.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <console/console.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/37983 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4293094ad703a2d8b68a8c640bd8d9cece2e6e8 Gerrit-Change-Number: 37983 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: mb/ibase/mb899: Remove unused includes
by HAOUAS Elyes (Code Review) Jan. 2, 2020

Jan. 2, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37897 ) Change subject: mb/ibase/mb899: Remove unused includes ...................................................................... mb/ibase/mb899: Remove unused includes Change-Id: I496da344cc0d3845c308bca4d5da46d9ca6f88a7 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/ibase/mb899/acpi_tables.c M src/mainboard/ibase/mb899/early_init.c 2 files changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/97/37897/1 diff --git a/src/mainboard/ibase/mb899/acpi_tables.c b/src/mainboard/ibase/mb899/acpi_tables.c index f41b847..447b448 100644 --- a/src/mainboard/ibase/mb899/acpi_tables.c +++ b/src/mainboard/ibase/mb899/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/ibase/mb899/early_init.c b/src/mainboard/ibase/mb899/early_init.c index fd96f66..7b5ff9a 100644 --- a/src/mainboard/ibase/mb899/early_init.c +++ b/src/mainboard/ibase/mb899/early_init.c @@ -14,9 +14,7 @@ */ #include <bootblock_common.h> -#include <stdint.h> #include <device/pnp_ops.h> -#include <cpu/x86/lapic.h> #include <device/pnp_def.h> #include <northbridge/intel/i945/i945.h> #include <southbridge/intel/i82801gx/i82801gx.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/37897 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I496da344cc0d3845c308bca4d5da46d9ca6f88a7 Gerrit-Change-Number: 37897 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

4 5

Change in coreboot[master]: mb/*/*/acpi_tables: Remove unused includes
by HAOUAS Elyes (Code Review) Jan. 2, 2020

Jan. 2, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37900 ) Change subject: mb/*/*/acpi_tables: Remove unused includes ...................................................................... mb/*/*/acpi_tables: Remove unused includes Change-Id: Ie8b9df7a64b45167de542182f3dfe6b320b9f2e2 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/apple/macbook21/acpi_tables.c M src/mainboard/asrock/g41c-gs/acpi_tables.c M src/mainboard/asus/p5gc-mx/acpi_tables.c M src/mainboard/asus/p5qpl-am/acpi_tables.c M src/mainboard/foxconn/d41s/acpi_tables.c M src/mainboard/foxconn/g41s-k/acpi_tables.c M src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c M src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c M src/mainboard/intel/d510mo/acpi_tables.c M src/mainboard/intel/dg41wv/acpi_tables.c M src/mainboard/kontron/986lcd-m/acpi_tables.c M src/mainboard/lenovo/t60/acpi_tables.c M src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c M src/mainboard/lenovo/x60/acpi_tables.c M src/mainboard/roda/rk886ex/acpi_tables.c 15 files changed, 0 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/37900/1 diff --git a/src/mainboard/apple/macbook21/acpi_tables.c b/src/mainboard/apple/macbook21/acpi_tables.c index 3e9a810..d58151c 100644 --- a/src/mainboard/apple/macbook21/acpi_tables.c +++ b/src/mainboard/apple/macbook21/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/asrock/g41c-gs/acpi_tables.c b/src/mainboard/asrock/g41c-gs/acpi_tables.c index 189c662..c9e3b3b 100644 --- a/src/mainboard/asrock/g41c-gs/acpi_tables.c +++ b/src/mainboard/asrock/g41c-gs/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <string.h> #include <southbridge/intel/i82801gx/nvs.h> diff --git a/src/mainboard/asus/p5gc-mx/acpi_tables.c b/src/mainboard/asus/p5gc-mx/acpi_tables.c index 3aa5829..c212315 100644 --- a/src/mainboard/asus/p5gc-mx/acpi_tables.c +++ b/src/mainboard/asus/p5gc-mx/acpi_tables.c @@ -13,8 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> - #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/asus/p5qpl-am/acpi_tables.c b/src/mainboard/asus/p5qpl-am/acpi_tables.c index 666bba6..c9e3b3b 100644 --- a/src/mainboard/asus/p5qpl-am/acpi_tables.c +++ b/src/mainboard/asus/p5qpl-am/acpi_tables.c @@ -15,7 +15,6 @@ */ #include <string.h> -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/foxconn/d41s/acpi_tables.c b/src/mainboard/foxconn/d41s/acpi_tables.c index 92688bf..6e619f4 100644 --- a/src/mainboard/foxconn/d41s/acpi_tables.c +++ b/src/mainboard/foxconn/d41s/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/foxconn/g41s-k/acpi_tables.c b/src/mainboard/foxconn/g41s-k/acpi_tables.c index c2b9714..4aa6ad6 100644 --- a/src/mainboard/foxconn/g41s-k/acpi_tables.c +++ b/src/mainboard/foxconn/g41s-k/acpi_tables.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <string.h> #include <southbridge/intel/i82801gx/nvs.h> diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c index ba3995e..c212315 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c b/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c index cab4ee2..9835872 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c +++ b/src/mainboard/gigabyte/ga-g41m-es2l/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <string.h> #include <southbridge/intel/i82801gx/nvs.h> diff --git a/src/mainboard/intel/d510mo/acpi_tables.c b/src/mainboard/intel/d510mo/acpi_tables.c index 92688bf..6e619f4 100644 --- a/src/mainboard/intel/d510mo/acpi_tables.c +++ b/src/mainboard/intel/d510mo/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <types.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/intel/dg41wv/acpi_tables.c b/src/mainboard/intel/dg41wv/acpi_tables.c index 666bba6..c9e3b3b 100644 --- a/src/mainboard/intel/dg41wv/acpi_tables.c +++ b/src/mainboard/intel/dg41wv/acpi_tables.c @@ -15,7 +15,6 @@ */ #include <string.h> -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/kontron/986lcd-m/acpi_tables.c b/src/mainboard/kontron/986lcd-m/acpi_tables.c index f41b847..447b448 100644 --- a/src/mainboard/kontron/986lcd-m/acpi_tables.c +++ b/src/mainboard/kontron/986lcd-m/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/lenovo/t60/acpi_tables.c b/src/mainboard/lenovo/t60/acpi_tables.c index bd10a0e..b2dbf1b 100644 --- a/src/mainboard/lenovo/t60/acpi_tables.c +++ b/src/mainboard/lenovo/t60/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> #include "thermal.h" diff --git a/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c b/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c index 666bba6..c9e3b3b 100644 --- a/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c +++ b/src/mainboard/lenovo/thinkcentre_a58/acpi_tables.c @@ -15,7 +15,6 @@ */ #include <string.h> -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) diff --git a/src/mainboard/lenovo/x60/acpi_tables.c b/src/mainboard/lenovo/x60/acpi_tables.c index bd10a0e..b2dbf1b 100644 --- a/src/mainboard/lenovo/x60/acpi_tables.c +++ b/src/mainboard/lenovo/x60/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> #include "thermal.h" diff --git a/src/mainboard/roda/rk886ex/acpi_tables.c b/src/mainboard/roda/rk886ex/acpi_tables.c index 3e9a810..d58151c 100644 --- a/src/mainboard/roda/rk886ex/acpi_tables.c +++ b/src/mainboard/roda/rk886ex/acpi_tables.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) -- To view, visit https://review.coreboot.org/c/coreboot/+/37900 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie8b9df7a64b45167de542182f3dfe6b320b9f2e2 Gerrit-Change-Number: 37900 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/qualcomm/qcs405: Remove unused QCS405_BLSP_SPI
by HAOUAS Elyes (Code Review) Jan. 2, 2020

Jan. 2, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37966 ) Change subject: soc/qualcomm/qcs405: Remove unused QCS405_BLSP_SPI ...................................................................... soc/qualcomm/qcs405: Remove unused QCS405_BLSP_SPI Change-Id: I73ff8adeb2751ed4035c60f7387576460bdd47e8 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/qualcomm/qcs405/Kconfig 1 file changed, 0 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/37966/1 diff --git a/src/soc/qualcomm/qcs405/Kconfig b/src/soc/qualcomm/qcs405/Kconfig index 48e2fd4..60d8e3a 100644 --- a/src/soc/qualcomm/qcs405/Kconfig +++ b/src/soc/qualcomm/qcs405/Kconfig @@ -18,11 +18,6 @@ select VBOOT_RETURN_FROM_VERSTAGE select VBOOT_STARTS_IN_BOOTBLOCK -config QCS405_BLSP_SPI - bool - default y - prompt "Build Flash Using SPI-NOR" - config BOOT_DEVICE_SPI_FLASH_BUS int default 5 -- To view, visit https://review.coreboot.org/c/coreboot/+/37966 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73ff8adeb2751ed4035c60f7387576460bdd47e8 Gerrit-Change-Number: 37966 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in coreboot[master]: arch/x86/Kconfig: Remove unused BOOTBLOCK_RESETS
by HAOUAS Elyes (Code Review) Jan. 2, 2020

Jan. 2, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37964 ) Change subject: arch/x86/Kconfig: Remove unused BOOTBLOCK_RESETS ...................................................................... arch/x86/Kconfig: Remove unused BOOTBLOCK_RESETS Change-Id: I792d271bdd2a93649bd9ca67c74b29fc5037542b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/Kconfig 1 file changed, 0 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/37964/1 diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 212c9f9..1c55bdb 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -166,9 +166,6 @@ Add a spin (JMP .) in bootblock_crt0.S during early bootblock to wait for a JTAG debugger to break into the execution sequence. -config BOOTBLOCK_RESETS - string - config HAVE_CMOS_DEFAULT def_bool n depends on HAVE_OPTION_TABLE -- To view, visit https://review.coreboot.org/c/coreboot/+/37964 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I792d271bdd2a93649bd9ca67c74b29fc5037542b Gerrit-Change-Number: 37964 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/intel/d945gclf: Remove unused include
by HAOUAS Elyes (Code Review) Jan. 2, 2020

Jan. 2, 2020

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37898 ) Change subject: mb/intel/d945gclf: Remove unused include ...................................................................... mb/intel/d945gclf: Remove unused include Change-Id: I023ce20b4144d782f22243911f845f6e28fdb2a3 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/intel/d945gclf/acpi_tables.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/37898/1 diff --git a/src/mainboard/intel/d945gclf/acpi_tables.c b/src/mainboard/intel/d945gclf/acpi_tables.c index ba3995e..c212315 100644 --- a/src/mainboard/intel/d945gclf/acpi_tables.c +++ b/src/mainboard/intel/d945gclf/acpi_tables.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdint.h> #include <southbridge/intel/i82801gx/nvs.h> void acpi_create_gnvs(global_nvs_t *gnvs) -- To view, visit https://review.coreboot.org/c/coreboot/+/37898 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I023ce20b4144d782f22243911f845f6e28fdb2a3 Gerrit-Change-Number: 37898 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/beltino/**/hda_verb.c: Correct pin configs
by Angel Pons (Code Review) Jan. 2, 2020

Jan. 2, 2020

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37852 ) Change subject: mb/google/beltino/**/hda_verb.c: Correct pin configs ...................................................................... mb/google/beltino/**/hda_verb.c: Correct pin configs NIDs 0x18 and 0x19 are flipped, and the verbs for NID 0x1b are instead applied onto NID 0x1a. Fix that. Change-Id: I20cc4b282602f8557fa4f25489adf899b7460a09 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/beltino/variants/mccloud/hda_verb.c M src/mainboard/google/beltino/variants/monroe/hda_verb.c M src/mainboard/google/beltino/variants/panther/hda_verb.c M src/mainboard/google/beltino/variants/tricky/hda_verb.c M src/mainboard/google/beltino/variants/zako/hda_verb.c 5 files changed, 25 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/37852/1 diff --git a/src/mainboard/google/beltino/variants/mccloud/hda_verb.c b/src/mainboard/google/beltino/variants/mccloud/hda_verb.c index 19c7c62..c6b12f8 100644 --- a/src/mainboard/google/beltino/variants/mccloud/hda_verb.c +++ b/src/mainboard/google/beltino/variants/mccloud/hda_verb.c @@ -39,8 +39,11 @@ /* Pin Complex (NID 0x17) MONO Out - Disabled */ AZALIA_PIN_CFG(0, 0x17, 0x411111f0), + /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */ + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + /* - * Pin Complex (NID 0x18) MIC1 PORTB + * Pin Complex (NID 0x19) MIC2 PORTF * group 1, cap 1 * black, jack detect * mic in, analog @@ -48,14 +51,11 @@ */ AZALIA_PIN_CFG(0, 0x19, 0x03a71011), - /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */ - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */ - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* * Pin Complex (NID 0x1d) PCBeep diff --git a/src/mainboard/google/beltino/variants/monroe/hda_verb.c b/src/mainboard/google/beltino/variants/monroe/hda_verb.c index 42729cc..a778dc7 100644 --- a/src/mainboard/google/beltino/variants/monroe/hda_verb.c +++ b/src/mainboard/google/beltino/variants/monroe/hda_verb.c @@ -39,17 +39,17 @@ /* Pin Complex (NID 0x17) MONO Out - Disabled */ AZALIA_PIN_CFG(0, 0x17, 0x411111f0), - /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled*/ - AZALIA_PIN_CFG(0, 0x19, 0x411111f0), - - /* Pin Complex (NID 0x19) MIC2 PORTF - 3.5mm Jack*/ + /* Pin Complex (NID 0x18) MIC1 PORTB - 3.5mm Jack*/ AZALIA_PIN_CFG(0, 0x18, 0x03a11020), + /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled*/ + AZALIA_PIN_CFG(0, 0x19, 0x411111f0), + /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */ - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* * Pin Complex (NID 0x1d) PCBeep diff --git a/src/mainboard/google/beltino/variants/panther/hda_verb.c b/src/mainboard/google/beltino/variants/panther/hda_verb.c index 19c7c62..c6b12f8 100644 --- a/src/mainboard/google/beltino/variants/panther/hda_verb.c +++ b/src/mainboard/google/beltino/variants/panther/hda_verb.c @@ -39,8 +39,11 @@ /* Pin Complex (NID 0x17) MONO Out - Disabled */ AZALIA_PIN_CFG(0, 0x17, 0x411111f0), + /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */ + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + /* - * Pin Complex (NID 0x18) MIC1 PORTB + * Pin Complex (NID 0x19) MIC2 PORTF * group 1, cap 1 * black, jack detect * mic in, analog @@ -48,14 +51,11 @@ */ AZALIA_PIN_CFG(0, 0x19, 0x03a71011), - /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */ - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */ - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* * Pin Complex (NID 0x1d) PCBeep diff --git a/src/mainboard/google/beltino/variants/tricky/hda_verb.c b/src/mainboard/google/beltino/variants/tricky/hda_verb.c index 19c7c62..c6b12f8 100644 --- a/src/mainboard/google/beltino/variants/tricky/hda_verb.c +++ b/src/mainboard/google/beltino/variants/tricky/hda_verb.c @@ -39,8 +39,11 @@ /* Pin Complex (NID 0x17) MONO Out - Disabled */ AZALIA_PIN_CFG(0, 0x17, 0x411111f0), + /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */ + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + /* - * Pin Complex (NID 0x18) MIC1 PORTB + * Pin Complex (NID 0x19) MIC2 PORTF * group 1, cap 1 * black, jack detect * mic in, analog @@ -48,14 +51,11 @@ */ AZALIA_PIN_CFG(0, 0x19, 0x03a71011), - /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */ - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */ - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* * Pin Complex (NID 0x1d) PCBeep diff --git a/src/mainboard/google/beltino/variants/zako/hda_verb.c b/src/mainboard/google/beltino/variants/zako/hda_verb.c index 19c7c62..c6b12f8 100644 --- a/src/mainboard/google/beltino/variants/zako/hda_verb.c +++ b/src/mainboard/google/beltino/variants/zako/hda_verb.c @@ -39,8 +39,11 @@ /* Pin Complex (NID 0x17) MONO Out - Disabled */ AZALIA_PIN_CFG(0, 0x17, 0x411111f0), + /* Pin Complex (NID 0x18) MIC1 PORTB - Disabled */ + AZALIA_PIN_CFG(0, 0x18, 0x411111f0), + /* - * Pin Complex (NID 0x18) MIC1 PORTB + * Pin Complex (NID 0x19) MIC2 PORTF * group 1, cap 1 * black, jack detect * mic in, analog @@ -48,14 +51,11 @@ */ AZALIA_PIN_CFG(0, 0x19, 0x03a71011), - /* Pin Complex (NID 0x19) MIC2 PORTF - Disabled */ - AZALIA_PIN_CFG(0, 0x18, 0x411111f0), - /* Pin Complex (NID 0x1a) LINE1 PORTC - Disabled */ AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* Pin Complex (NID 0x1b) LINE2 PORTE - Disabled */ - AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), + AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* * Pin Complex (NID 0x1d) PCBeep -- To view, visit https://review.coreboot.org/c/coreboot/+/37852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I20cc4b282602f8557fa4f25489adf899b7460a09 Gerrit-Change-Number: 37852 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/beltino/**/hda_verb.c: remove preprocessor guards
by Angel Pons (Code Review) Jan. 2, 2020

Jan. 2, 2020

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37851 ) Change subject: mb/google/beltino/**/hda_verb.c: remove preprocessor guards ...................................................................... mb/google/beltino/**/hda_verb.c: remove preprocessor guards These files are not headers. Change-Id: Ibe6c9a96c1c4b0952a8d03b7a8b17869a66511f2 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/beltino/variants/mccloud/hda_verb.c M src/mainboard/google/beltino/variants/monroe/hda_verb.c M src/mainboard/google/beltino/variants/panther/hda_verb.c M src/mainboard/google/beltino/variants/tricky/hda_verb.c M src/mainboard/google/beltino/variants/zako/hda_verb.c 5 files changed, 0 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/37851/1 diff --git a/src/mainboard/google/beltino/variants/mccloud/hda_verb.c b/src/mainboard/google/beltino/variants/mccloud/hda_verb.c index 8641455..19c7c62 100644 --- a/src/mainboard/google/beltino/variants/mccloud/hda_verb.c +++ b/src/mainboard/google/beltino/variants/mccloud/hda_verb.c @@ -13,9 +13,6 @@ * GNU General Public License for more details. */ -#ifndef HDA_VERB_H -#define HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -104,6 +101,4 @@ 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ }; -#endif /* HDA_VERB_H */ - AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/beltino/variants/monroe/hda_verb.c b/src/mainboard/google/beltino/variants/monroe/hda_verb.c index 545933d..42729cc 100644 --- a/src/mainboard/google/beltino/variants/monroe/hda_verb.c +++ b/src/mainboard/google/beltino/variants/monroe/hda_verb.c @@ -13,9 +13,6 @@ * GNU General Public License for more details. */ -#ifndef HDA_VERB_H -#define HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -102,6 +99,4 @@ 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ }; -#endif /* HDA_VERB_H */ - AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/beltino/variants/panther/hda_verb.c b/src/mainboard/google/beltino/variants/panther/hda_verb.c index 8641455..19c7c62 100644 --- a/src/mainboard/google/beltino/variants/panther/hda_verb.c +++ b/src/mainboard/google/beltino/variants/panther/hda_verb.c @@ -13,9 +13,6 @@ * GNU General Public License for more details. */ -#ifndef HDA_VERB_H -#define HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -104,6 +101,4 @@ 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ }; -#endif /* HDA_VERB_H */ - AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/beltino/variants/tricky/hda_verb.c b/src/mainboard/google/beltino/variants/tricky/hda_verb.c index 8641455..19c7c62 100644 --- a/src/mainboard/google/beltino/variants/tricky/hda_verb.c +++ b/src/mainboard/google/beltino/variants/tricky/hda_verb.c @@ -13,9 +13,6 @@ * GNU General Public License for more details. */ -#ifndef HDA_VERB_H -#define HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -104,6 +101,4 @@ 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ }; -#endif /* HDA_VERB_H */ - AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/beltino/variants/zako/hda_verb.c b/src/mainboard/google/beltino/variants/zako/hda_verb.c index 8641455..19c7c62 100644 --- a/src/mainboard/google/beltino/variants/zako/hda_verb.c +++ b/src/mainboard/google/beltino/variants/zako/hda_verb.c @@ -13,9 +13,6 @@ * GNU General Public License for more details. */ -#ifndef HDA_VERB_H -#define HDA_VERB_H - #include <device/azalia_device.h> const u32 cim_verb_data[] = { @@ -104,6 +101,4 @@ 0x00b37410, /* unmute mixer nid 0xb beep input and set volume */ }; -#endif /* HDA_VERB_H */ - AZALIA_ARRAY_SIZES; -- To view, visit https://review.coreboot.org/c/coreboot/+/37851 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe6c9a96c1c4b0952a8d03b7a8b17869a66511f2 Gerrit-Change-Number: 37851 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/**/hda_verb.c: Correct codec ID on subvendor verbs
by Angel Pons (Code Review) Jan. 2, 2020

Jan. 2, 2020

Angel Pons has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37850 ) Change subject: mb/**/hda_verb.c: Correct codec ID on subvendor verbs ...................................................................... mb/**/hda_verb.c: Correct codec ID on subvendor verbs Looks like the subvendor verb for codec #3 is erroneously using zero as its codec number. Fix that. Change-Id: I760533c229287627dd0548a06300c376e045302c Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> --- M src/mainboard/google/parrot/hda_verb.c M src/mainboard/intel/baskingridge/hda_verb.c M src/mainboard/intel/emeraldlake2/hda_verb.c M src/mainboard/intel/wtm2/hda_verb.c M src/mainboard/kontron/ktqm77/hda_verb.c M src/mainboard/samsung/stumpy/hda_verb.c 6 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/50/37850/1 diff --git a/src/mainboard/google/parrot/hda_verb.c b/src/mainboard/google/parrot/hda_verb.c index 1cb469c..fff530d 100644 --- a/src/mainboard/google/parrot/hda_verb.c +++ b/src/mainboard/google/parrot/hda_verb.c @@ -122,7 +122,7 @@ 4, /* Number of jacks (NID entries) */ /* HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0, 0x80860101), + AZALIA_SUBVENDOR(3, 0x80860101), AZALIA_PIN_CFG(3, 0x05, 0x18560010), AZALIA_PIN_CFG(3, 0x06, 0x18560020), AZALIA_PIN_CFG(3, 0x07, 0x18560030), diff --git a/src/mainboard/intel/baskingridge/hda_verb.c b/src/mainboard/intel/baskingridge/hda_verb.c index 7eca321..d8cdb05 100644 --- a/src/mainboard/intel/baskingridge/hda_verb.c +++ b/src/mainboard/intel/baskingridge/hda_verb.c @@ -48,7 +48,7 @@ 4, /* Number of jacks */ /* HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0, 0x80860101), + AZALIA_SUBVENDOR(3, 0x80860101), /* Pin Complex (NID 0x05) Digital Out at Int HDMI */ AZALIA_PIN_CFG(3, 0x05, 0x18560010), diff --git a/src/mainboard/intel/emeraldlake2/hda_verb.c b/src/mainboard/intel/emeraldlake2/hda_verb.c index 2750a5b..d898bf4 100644 --- a/src/mainboard/intel/emeraldlake2/hda_verb.c +++ b/src/mainboard/intel/emeraldlake2/hda_verb.c @@ -48,7 +48,7 @@ 4, /* Number of jacks */ /* HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0, 0x80860101), + AZALIA_SUBVENDOR(3, 0x80860101), /* Pin Complex (NID 0x05) Digital Out at Int HDMI */ AZALIA_PIN_CFG(3, 0x05, 0x18560010), diff --git a/src/mainboard/intel/wtm2/hda_verb.c b/src/mainboard/intel/wtm2/hda_verb.c index ec7db84..48affa6 100644 --- a/src/mainboard/intel/wtm2/hda_verb.c +++ b/src/mainboard/intel/wtm2/hda_verb.c @@ -48,7 +48,7 @@ 4, /* Number of jacks */ /* HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0, 0x80860101), + AZALIA_SUBVENDOR(3, 0x80860101), /* Pin Complex (NID 0x05) Digital Out at Int HDMI */ AZALIA_PIN_CFG(3, 0x05, 0x18560010), diff --git a/src/mainboard/kontron/ktqm77/hda_verb.c b/src/mainboard/kontron/ktqm77/hda_verb.c index ebd496c..bb05a86 100644 --- a/src/mainboard/kontron/ktqm77/hda_verb.c +++ b/src/mainboard/kontron/ktqm77/hda_verb.c @@ -98,7 +98,7 @@ 4, /* Number of jacks */ /* HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0, 0x80860101), + AZALIA_SUBVENDOR(3, 0x80860101), /* Pin Complex (NID 0x05) Digital Out at Int HDMI */ AZALIA_PIN_CFG(3, 0x05, 0x58560010), diff --git a/src/mainboard/samsung/stumpy/hda_verb.c b/src/mainboard/samsung/stumpy/hda_verb.c index 3e011ca..d6a3e51 100644 --- a/src/mainboard/samsung/stumpy/hda_verb.c +++ b/src/mainboard/samsung/stumpy/hda_verb.c @@ -48,7 +48,7 @@ 4, /* Number of jacks */ /* HDA Codec Subsystem ID Verb Table */ - AZALIA_SUBVENDOR(0, 0x80860101), + AZALIA_SUBVENDOR(3, 0x80860101), /* Pin Complex (NID 0x05) Digital Out at Int HDMI */ AZALIA_PIN_CFG(3, 0x05, 0x18560010), -- To view, visit https://review.coreboot.org/c/coreboot/+/37850 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I760533c229287627dd0548a06300c376e045302c Gerrit-Change-Number: 37850 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: newchange

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