coreboot-gerrit January 2020

coreboot-gerrit@coreboot.org

1 participants
1869 discussions

Change in coreboot[master]: soc/intel/tigerlake: Update Kconfig
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

Wonkyu Kim has uploaded a new patch set (#13) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37426 ) Change subject: soc/intel/tigerlake: Update Kconfig ...................................................................... soc/intel/tigerlake: Update Kconfig Update Kconfig: - use CAR NEM mode for tigerlake only as NEM Enhanced is under debug - update GSPI, RP max device #s according to PCH EDS#576591 vol1 rev1.2 - update UART M/N setting according to new PCH baseclock BUG=none BRANCH=none TEST=Build and boot tigerlake rvp board Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> Change-Id: I04020d55f1063d521b15f8d0dabbd6f1dabf577c Signed-off-by: Wonkyu Kim <wonkyu.kim(a)intel.com> --- M src/soc/intel/tigerlake/Kconfig 1 file changed, 14 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/37426/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/37426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04020d55f1063d521b15f8d0dabbd6f1dabf577c Gerrit-Change-Number: 37426 Gerrit-PatchSet: 13 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Venkata Krishna Nimmagadda Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: soc/intel/tigerlake: Update Kconfig
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37426 ) Change subject: soc/intel/tigerlake: Update Kconfig ...................................................................... Patch Set 12: (6 comments) https://review.coreboot.org/c/coreboot/+/37426/2/src/soc/intel/tigerlake/Kc… File src/soc/intel/tigerlake/Kconfig: https://review.coreboot.org/c/coreboot/+/37426/2/src/soc/intel/tigerlake/Kc… PS2, Line 64: select INTEL_CAR_NEM > Yes for now, NEM Enahanced mode boot is WIP. […] Done https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kc… File src/soc/intel/tigerlake/Kconfig: https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kc… PS8, Line 159: 0xfe03e000 > Why was this changed? Done https://review.coreboot.org/c/coreboot/+/37426/8/src/soc/intel/tigerlake/Kc… PS8, Line 169: 0x7FFF > The change is in accordance with tigerlake FSP, I will find supporting doc if any. It due to UART source clock change from 120MHz to 100MHz https://review.coreboot.org/c/coreboot/+/37426/12/src/soc/intel/tigerlake/K… File src/soc/intel/tigerlake/Kconfig: https://review.coreboot.org/c/coreboot/+/37426/12/src/soc/intel/tigerlake/K… PS12, Line 169: 0x25a > It based on below calculation […] Done https://review.coreboot.org/c/coreboot/+/37426/1/src/soc/intel/tigerlake/ac… File src/soc/intel/tigerlake/acpi/northbridge.asl: https://review.coreboot.org/c/coreboot/+/37426/1/src/soc/intel/tigerlake/ac… PS1, Line 25: Name (_ADR, Zero) // _ADR: Address > Below are compile error. we should sue only one method (_HID or _ADR). […] Done https://review.coreboot.org/c/coreboot/+/37426/5/src/soc/intel/tigerlake/in… File src/soc/intel/tigerlake/include/soc/romstage.h: https://review.coreboot.org/c/coreboot/+/37426/5/src/soc/intel/tigerlake/in… PS5, Line 21: void mainboard_fspm_params(FSPM_UPD *mupd); > need consistent spacing around '*' (ctx:WxV) Done -- To view, visit https://review.coreboot.org/c/coreboot/+/37426 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I04020d55f1063d521b15f8d0dabbd6f1dabf577c Gerrit-Change-Number: 37426 Gerrit-PatchSet: 12 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Venkata Krishna Nimmagadda Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Jan 2020 09:21:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.corp-partner.google.com> Comment-In-Reply-To: Subrata Banik <subrata.banik(a)intel.com> Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Comment-In-Reply-To: build bot (Jenkins) <no-reply(a)coreboot.org> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: Update Kconfig
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

1 0

Change in coreboot[master]: lib/crc_byte: Add CRC32 implementation
by Patrick Rudolph (Code Review) 07 Jan '20

07 Jan '20

Hello Patrick Rudolph, I'd like you to do a code review. Please visit https://review.coreboot.org/c/coreboot/+/37753 to review the following change. Change subject: lib/crc_byte: Add CRC32 implementation ...................................................................... lib/crc_byte: Add CRC32 implementation * Add CRC32 using polynomial 0x04C11DB7 + Add macro to caculate CRC of a buffer Change-Id: If98e4e12bb53a6e5123e94e8cdffde1eb3bc4b4b Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/include/crc_byte.h M src/lib/crc_byte.c 2 files changed, 33 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/37753/1 diff --git a/src/include/crc_byte.h b/src/include/crc_byte.h index 9315277..3740b4a 100644 --- a/src/include/crc_byte.h +++ b/src/include/crc_byte.h @@ -36,5 +36,24 @@ */ uint16_t crc16_byte(uint16_t prev_crc, uint8_t data); +/* This function is used to calculate crc32 byte by byte, with polynomial + * x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + + * x^5 + x^4 + x^2 + x + 1 + * + * prev_crc: old crc result (0 for first) + * data: new byte + * return value: new crc result + */ +uint32_t crc32_byte(uint32_t prev_crc, uint8_t data); + +#define CRC(buf, size, crc_func) ({ \ + const uint8_t *_crc_local_buf = (const uint8_t *)buf; \ + size_t _crc_local_size = size; \ + __typeof__(crc_func(0, 0)) _crc_local_result = ~0; \ + while (_crc_local_size--) { \ + _crc_local_result = crc_func(_crc_local_result, *_crc_local_buf++); \ + } \ + ~_crc_local_result; \ +}) #endif /* CRC_BYTE_H */ diff --git a/src/lib/crc_byte.c b/src/lib/crc_byte.c index 0ac0063..c04449d 100644 --- a/src/lib/crc_byte.c +++ b/src/lib/crc_byte.c @@ -36,3 +36,17 @@ prev_crc ^= ((prev_crc & 0xff) << 4) << 1; return prev_crc; } + +uint32_t crc32_byte(uint32_t prev_crc, uint8_t data) +{ + prev_crc ^= (uint32_t)data << 24; + + for (int i = 0; i < 8; i++) { + if ((prev_crc & 0x80000000UL) != 0) + prev_crc = ((prev_crc << 1) ^ 0x04C11DB7UL); + else + prev_crc <<= 1; + } + + return prev_crc; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/37753 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If98e4e12bb53a6e5123e94e8cdffde1eb3bc4b4b Gerrit-Change-Number: 37753 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

3 6

Change in coreboot[master]: acpigen: Add function to generate unicode names
by Patrick Rudolph (Code Review) 07 Jan '20

07 Jan '20

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37789 ) Change subject: acpigen: Add function to generate unicode names ...................................................................... acpigen: Add function to generate unicode names Add function to generate Unicode names and use if for _STR. The ACPI spec requires _STR to return a buffer containing UTF-16 characters. Use the introduced function in IPMI driver. Change-Id: I16992bd449e3a51f6a8875731cd45a9f43de5c8c Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/arch/x86/acpigen.c M src/arch/x86/include/arch/acpigen.h M src/drivers/ipmi/ipmi_kcs_ops.c 3 files changed, 17 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/89/37789/1 diff --git a/src/arch/x86/acpigen.c b/src/arch/x86/acpigen.c index cc724a0..15c58bd 100644 --- a/src/arch/x86/acpigen.c +++ b/src/arch/x86/acpigen.c @@ -199,6 +199,21 @@ acpigen_write_string(string); } +void acpigen_write_name_unicode(const char *name, const char *string) +{ + const size_t len = strlen(string) + 1; + acpigen_write_name(name); + acpigen_emit_byte(BUFFER_OP); + acpigen_write_len_f(); + acpigen_write_integer(len); + for (size_t i = 0; i < len; i++) { + const char c = string[i]; + /* Simple ASCII to UTF-16 conversion */ + acpigen_emit_word(c >= 0 ? c : '?'); + } + acpigen_pop_len(); +} + void acpigen_emit_stream(const char *data, int size) { int i; diff --git a/src/arch/x86/include/arch/acpigen.h b/src/arch/x86/include/arch/acpigen.h index 8b8c873..f74c30f 100644 --- a/src/arch/x86/include/arch/acpigen.h +++ b/src/arch/x86/include/arch/acpigen.h @@ -310,6 +310,7 @@ void acpigen_write_qword(uint64_t data); void acpigen_write_integer(uint64_t data); void acpigen_write_string(const char *string); +void acpigen_write_name_unicode(const char *name, const char *string); void acpigen_write_name(const char *name); void acpigen_write_name_zero(const char *name); void acpigen_write_name_one(const char *name); diff --git a/src/drivers/ipmi/ipmi_kcs_ops.c b/src/drivers/ipmi/ipmi_kcs_ops.c index 5cb8995..e0fa1b0 100644 --- a/src/drivers/ipmi/ipmi_kcs_ops.c +++ b/src/drivers/ipmi/ipmi_kcs_ops.c @@ -253,7 +253,7 @@ acpigen_write_scope(scope); acpigen_write_device("SPMI"); acpigen_write_name_string("_HID", "IPI0001"); - acpigen_write_name_string("_STR", "IPMI_KCS"); + acpigen_write_name_unicode("_STR", "IPMI_KCS"); acpigen_write_name_byte("_UID", dev->command); acpigen_write_STA(0xf); acpigen_write_name("_CRS"); -- To view, visit https://review.coreboot.org/c/coreboot/+/37789 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16992bd449e3a51f6a8875731cd45a9f43de5c8c Gerrit-Change-Number: 37789 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: newchange

4 8

Change in coreboot[master]: mb/intel/tglrvp : Add ACPI support for CNVi
by Wonkyu Kim (Code Review) 07 Jan '20

07 Jan '20

Wonkyu Kim has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37887 ) Change subject: mb/intel/tglrvp : Add ACPI support for CNVi ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/c/coreboot/+/37887/3/src/mainboard/intel/tglrvp… File src/mainboard/intel/tglrvp/acpi/cnvi.asl: PS3: > Nothing in this patch is really using those methods. […] These are method for kernel driver so that OS can enable/disable BT. -- To view, visit https://review.coreboot.org/c/coreboot/+/37887 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I66091374f8ebcb06457296252c9a8924734a7fa5 Gerrit-Change-Number: 37887 Gerrit-PatchSet: 3 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Jan 2020 08:11:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Wonkyu Kim <wonkyu.kim(a)intel.com> Comment-In-Reply-To: Furquan Shaikh <furquan(a)google.com> Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: Update GPIO config
by Shaunak Saha (Code Review) 07 Jan '20

07 Jan '20

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37427 ) Change subject: soc/intel/tigerlake: Update GPIO config ...................................................................... Patch Set 14: Code-Review-1 Keeping it as -1 until i finish proper testing with the kernel pinctrl driver. Please review the code change. -- To view, visit https://review.coreboot.org/c/coreboot/+/37427 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I585100375feee39b5a9105bdf6d9f5ca3a5bb2fa Gerrit-Change-Number: 37427 Gerrit-PatchSet: 14 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Venkata Krishna Nimmagadda Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 07 Jan 2020 07:49:15 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: Update GPIO config
by Shaunak Saha (Code Review) 07 Jan '20

07 Jan '20

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37427 ) Change subject: soc/intel/tigerlake: Update GPIO config ...................................................................... Patch Set 14: > Patch Set 13: > > > Patch Set 13: > > > > I got the confirmation from the GPIO team regarding the EDS information. They said "index mapping should be identical (or set the same) for DW0, DW1 and DW2 – so the EDS is incorrect if DW2 still shows the old mapping". So we do not need any code modification for dealing with DW0,1 or 2 separately. > > Is there any addendum or new EDS version # that has this information? Can you please share that with me? Not yet. We are co-ordinating with the EDS team to check when they are coming out with a new version of corrected EDS . -- To view, visit https://review.coreboot.org/c/coreboot/+/37427 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I585100375feee39b5a9105bdf6d9f5ca3a5bb2fa Gerrit-Change-Number: 37427 Gerrit-PatchSet: 14 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Venkata Krishna Nimmagadda Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 07 Jan 2020 07:40:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in coreboot[master]: soc/intel/tigerlake: Update GPIO config
by Shaunak Saha (Code Review) 07 Jan '20

07 Jan '20

Shaunak Saha has uploaded a new patch set (#14) to the change originally created by Ravishankar Sarawadi. ( https://review.coreboot.org/c/coreboot/+/37427 ) Change subject: soc/intel/tigerlake: Update GPIO config ...................................................................... soc/intel/tigerlake: Update GPIO config Add tigerlake SOC specific GPIO definitions and ASL setting. GPIOs are divided into different communities. Each community consists of one or more GPIO groups. We need to configure the groups from coreboot so that they are mapped properly. BUG=b:144680462 BRANCH=none TEST=Build and boot tigerlake rvp board Signed-off-by: Ravi Sarawadi <ravishankar.sarawadi(a)intel.com> Change-Id: I585100375feee39b5a9105bdf6d9f5ca3a5bb2fa --- M src/soc/intel/tigerlake/acpi/gpio.asl M src/soc/intel/tigerlake/gpio.c M src/soc/intel/tigerlake/include/soc/gpio.h M src/soc/intel/tigerlake/include/soc/gpio_defs.h M src/soc/intel/tigerlake/include/soc/gpio_soc_defs.h M src/soc/intel/tigerlake/include/soc/pmc.h 6 files changed, 793 insertions(+), 607 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/37427/14 -- To view, visit https://review.coreboot.org/c/coreboot/+/37427 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I585100375feee39b5a9105bdf6d9f5ca3a5bb2fa Gerrit-Change-Number: 37427 Gerrit-PatchSet: 14 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)chromium.org> Gerrit-Reviewer: Francois Toguo Fotso <francois.toguo.fotso(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Venkata Krishna Nimmagadda Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in coreboot[master]: src/drivers/i2c: add i2c driver for Realtek 1308
by Furquan Shaikh (Code Review) 07 Jan '20

07 Jan '20

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/37882 ) Change subject: src/drivers/i2c: add i2c driver for Realtek 1308 ...................................................................... Patch Set 2: Any reason why this device cannot use drivers/i2c/generic? I don't see anything special being done for this device in the driver and in the current form fits well with the usage of drivers/i2c/generic. -- To view, visit https://review.coreboot.org/c/coreboot/+/37882 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie44fc8199f2153e18537023dfd92e0ce6a3ecb9c Gerrit-Change-Number: 37882 Gerrit-PatchSet: 2 Gerrit-Owner: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Jairaj Arava <jairaj.arava(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Raj Astekar <raj.astekar(a)intel.com> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Sathyanarayana Nujella <sathyanarayana.nujella(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Srinidhi N Kaushik <srinidhi.n.kaushik(a)intel.corp-partner.google.com> Gerrit-Comment-Date: Tue, 07 Jan 2020 05:29:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Jump to page:

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2020