coreboot-gerrit July 2019

coreboot-gerrit@coreboot.org

1 participants
1550 discussions

Change in coreboot[master]: src: Remove variable length arrays
by Jacob Garber (Code Review) 03 Jul '19

03 Jul '19

Hello Aaron Durbin, Julius Werner, Angel Pons, David Hendricks, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/33821 to look at the new patch set (#9). Change subject: src: Remove variable length arrays ...................................................................... src: Remove variable length arrays Variable length arrays were a feature added in C99 that allows the length of an array to be determined at runtime. Eg. int sum(size_t n) { int arr[n]; ... } This adds a small amount of runtime overhead, but is also very dangerous, since it allows use of an unlimited amount of stack memory, potentially leading to stack overflow. This is only worsened in coreboot, which often has very little stack space to begin with. Citing concerns like this, all instances of VLA's were recently removed from the Linux kernel. In the immortal words of Linus Torvalds [0], AND USING VLA'S IS ACTIVELY STUPID! It generates much more code, and much _slower_ code (and more fragile code), than just using a fixed key size would have done. [...] Anyway, some of these are definitely easy to just fix, and using VLA's is actively bad not just for security worries, but simply because VLA's are a really horribly bad idea in general in the kernel. This patch follows suit and zaps all VLA's in coreboot. Some of the existing VLA's are accidental ones, and all but one can be replaced with small fixed-size buffers. The single tricky exception is in the SPI controller interface, which will require a rewrite of old drivers to remove [1]. [0] https://lkml.org/lkml/2018/3/7/621 [1] https://ticket.coreboot.org/issues/217 Change-Id: I7d9d1ddadbf1cee5f695165bbe3f0effb7bd32b9 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M src/arch/x86/smbios.c M src/drivers/spi/spi_flash.c M src/northbridge/amd/amdmct/mct_ddr3/mctdqs_d.c M src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c M src/soc/intel/baytrail/spi.c M src/soc/intel/braswell/spi.c M src/soc/intel/broadwell/spi.c M src/soc/intel/fsp_baytrail/spi.c M src/soc/intel/skylake/acpi.c M src/southbridge/intel/common/spi.c M src/southbridge/intel/fsp_rangeley/spi.c M src/vendorcode/google/chromeos/sar.c 12 files changed, 80 insertions(+), 65 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/33821/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/33821 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d9d1ddadbf1cee5f695165bbe3f0effb7bd32b9 Gerrit-Change-Number: 33821 Gerrit-PatchSet: 9 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: src: Remove variable length arrays
by Jacob Garber (Code Review) 03 Jul '19

03 Jul '19

Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33821 ) Change subject: src: Remove variable length arrays ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/33821/8/src/drivers/spi/spi_flash.c File src/drivers/spi/spi_flash.c: https://review.coreboot.org/c/coreboot/+/33821/8/src/drivers/spi/spi_flash.… PS8, Line 103: #pragma GCC diagnostic ignored "-Wvla" > I'm happy to help out and test on cn81xx, but I'm out of office for the next weeks, so I can't test […] For the purposes of this patch then I think I'll just leave the warning as-is - I'll update the commit message and include a link to the ticket. -- To view, visit https://review.coreboot.org/c/coreboot/+/33821 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7d9d1ddadbf1cee5f695165bbe3f0effb7bd32b9 Gerrit-Change-Number: 33821 Gerrit-PatchSet: 8 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 03 Jul 2019 16:19:01 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Aaron Durbin <adurbin(a)chromium.org> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Jacob Garber <jgarber1(a)ualberta.ca> Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-MessageType: comment

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Change in coreboot[master]: sdm845: Add QUPv3 FW load & config
by mturney mturney (Code Review) 03 Jul '19

03 Jul '19

Hello mturney mturney, mturney mturney, Mukesh Savaliya, Paul Menzel, build bot (Jenkins), Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/25372 to look at the new patch set (#78). Change subject: sdm845: Add QUPv3 FW load & config ...................................................................... sdm845: Add QUPv3 FW load & config UART driver requires FW loading TEST=build Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org> --- M 3rdparty/blobs M src/mainboard/google/cheza/Makefile.inc M src/mainboard/google/cheza/mainboard.c A src/mainboard/google/cheza/qupv3_config.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/bootblock.c M src/soc/qualcomm/sdm845/include/soc/addressmap.h A src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h A src/soc/qualcomm/sdm845/include/soc/qupv3_config.h A src/soc/qualcomm/sdm845/include/soc/qupv3_fw_config.h A src/soc/qualcomm/sdm845/qcom_qup_se.c A src/soc/qualcomm/sdm845/qupv3_fw_config.c 12 files changed, 1,083 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/25372/78 -- To view, visit https://review.coreboot.org/c/coreboot/+/25372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Gerrit-Change-Number: 25372 Gerrit-PatchSet: 78 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/hatch/variants: Fix nonworking touch pad
by Furquan Shaikh (Code Review) 03 Jul '19

03 Jul '19

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33954 ) Change subject: mb/google/hatch/variants: Fix nonworking touch pad ...................................................................... Patch Set 5: (1 comment) https://review.coreboot.org/c/coreboot/+/33954/5/src/mainboard/google/hatch… File src/mainboard/google/hatch/variants/helios/overridetree.cb: https://review.coreboot.org/c/coreboot/+/33954/5/src/mainboard/google/hatch… PS5, Line 81: CPI_IRQ_EDGE_LOW(GPP_A21_IRQ)" You will still need this change for helios. -- To view, visit https://review.coreboot.org/c/coreboot/+/33954 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I60816a4652fa39ab2a91034b268efe8f84a13e17 Gerrit-Change-Number: 33954 Gerrit-PatchSet: 5 Gerrit-Owner: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-Reviewer: Philip Chen <philipchen(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <twawrzynczak(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-CC: EricR Lai <ericr_lai(a)compal.corp-partner.google.com> Gerrit-CC: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Wed, 03 Jul 2019 14:39:54 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sdm845: Add QUPv3 FW load & config
by build bot (Jenkins) (Code Review) 03 Jul '19

03 Jul '19

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25372 ) Change subject: sdm845: Add QUPv3 FW load & config ...................................................................... Patch Set 77: (3 comments) https://review.coreboot.org/#/c/25372/77/src/soc/qualcomm/sdm845/include/so… File src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h: https://review.coreboot.org/#/c/25372/77/src/soc/qualcomm/sdm845/include/so… PS77, Line 237: enum qup_se se; please, no spaces at the start of a line https://review.coreboot.org/#/c/25372/77/src/soc/qualcomm/sdm845/include/so… PS77, Line 238: enum se_protocol protocol; please, no spaces at the start of a line https://review.coreboot.org/#/c/25372/77/src/soc/qualcomm/sdm845/include/so… PS77, Line 239: enum se_mode mode; please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/c/coreboot/+/25372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Gerrit-Change-Number: 25372 Gerrit-PatchSet: 77 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Wed, 03 Jul 2019 14:15:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sdm845: Add UART support
by Name of user not set (Code Review) 03 Jul '19

03 Jul '19

Name of user not set #1002472 has uploaded a new patch set (#77) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/25373 ) Change subject: sdm845: Add UART support ...................................................................... sdm845: Add UART support TEST=build & run Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1 Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org> Signed-off-by: Akash Asthana <akashast(a)codeaurora.org> --- M src/soc/qualcomm/sdm845/Kconfig M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h M src/soc/qualcomm/sdm845/qcom_qup_se.c A src/soc/qualcomm/sdm845/uart.c 5 files changed, 189 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/25373/77 -- To view, visit https://review.coreboot.org/c/coreboot/+/25373 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1 Gerrit-Change-Number: 25373 Gerrit-PatchSet: 77 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: mturney mturney <mturney(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add SPI QUP driver
by Name of user not set (Code Review) 03 Jul '19

03 Jul '19

Name of user not set #1002472 has uploaded a new patch set (#57) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/27483 ) Change subject: sdm845: Add SPI QUP driver ...................................................................... sdm845: Add SPI QUP driver This implements the SPI driver for the Qualcomm Universal Peripheral (QUP) core. Change-Id: I35061727d5ccc550eaeb06caef4524bc4cf25b54 Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org> Signed-off-by: Akash Asthana <akashast(a)codeaurora.org> --- M src/mainboard/google/cheza/bootblock.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/bootblock.c A src/soc/qualcomm/sdm845/include/soc/spi_qup_qcom.h M src/soc/qualcomm/sdm845/spi.c A src/soc/qualcomm/sdm845/spi_qup.c 6 files changed, 277 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/83/27483/57 -- To view, visit https://review.coreboot.org/c/coreboot/+/27483 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I35061727d5ccc550eaeb06caef4524bc4cf25b54 Gerrit-Change-Number: 27483 Gerrit-PatchSet: 57 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Vin Kamath <vink(a)codeaurora.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add QUPv3 FW load & config
by Name of user not set (Code Review) 03 Jul '19

03 Jul '19

Name of user not set #1002472 has uploaded a new patch set (#77) to the change originally created by mturney mturney. ( https://review.coreboot.org/c/coreboot/+/25372 ) Change subject: sdm845: Add QUPv3 FW load & config ...................................................................... sdm845: Add QUPv3 FW load & config UART driver requires FW loading TEST=build Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Signed-off-by: Mukesh Savaliya <msavaliy(a)codeaurora.org> --- M 3rdparty/blobs M src/mainboard/google/cheza/Makefile.inc M src/mainboard/google/cheza/mainboard.c A src/mainboard/google/cheza/qupv3_config.c M src/soc/qualcomm/sdm845/Makefile.inc M src/soc/qualcomm/sdm845/bootblock.c M src/soc/qualcomm/sdm845/include/soc/addressmap.h A src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h A src/soc/qualcomm/sdm845/include/soc/qupv3_config.h A src/soc/qualcomm/sdm845/include/soc/qupv3_fw_config.h A src/soc/qualcomm/sdm845/qcom_qup_se.c A src/soc/qualcomm/sdm845/qupv3_fw_config.c 12 files changed, 1,083 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/25372/77 -- To view, visit https://review.coreboot.org/c/coreboot/+/25372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Gerrit-Change-Number: 25372 Gerrit-PatchSet: 77 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sdm845: Add UART support
by mturney mturney (Code Review) 03 Jul '19

03 Jul '19

mturney mturney has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25373 ) Change subject: sdm845: Add UART support ...................................................................... Patch Set 76: (6 comments) https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/Kconfig File src/soc/qualcomm/sdm845/Kconfig: https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/Kconfig@38 PS76, Line 38: > Convention is to indent 2 spaces here, not a tab (don't ask me why... […] Done https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/include/so… File src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h: https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/include/so… PS76, Line 469: I'm not understanding this comment. This struct is required. https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c File src/soc/qualcomm/sdm845/uart.c: https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@76 PS76, Line 76: GENI_STATUS_S_GENI_CMD_ACTIVE_MASK) > Fits on one line now? (If not, please align with opening parenthesis. […] Done https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@130 PS76, Line 130: (unsigned char) > nit: unnecessary cast (I think?) Done https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@143 PS76, Line 143: (unsigned int) > nit: unnecessary cast Done https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@148 PS76, Line 148: > No space after a cast Done -- To view, visit https://review.coreboot.org/c/coreboot/+/25373 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1 Gerrit-Change-Number: 25373 Gerrit-PatchSet: 76 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: mturney mturney <mturney(a)qualcomm.corp-partner.google.com> Gerrit-Comment-Date: Wed, 03 Jul 2019 13:53:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/cannonlake: Add support for calling microcode update API
by Rizwan Qureshi (Code Review) 03 Jul '19

03 Jul '19

Rizwan Qureshi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33938 Change subject: soc/intel/cannonlake: Add support for calling microcode update API ...................................................................... soc/intel/cannonlake: Add support for calling microcode update API Add support for updating MCU. Use the fw_update API provided by the soc/intel/common/basecode/fw_update. Also implement the reboot function required by the API. BUG=NA BRANCH=NA TEST=Build and boot hatch. Also test the ucode update flow with supporting changes in hatch mainboard. Change-Id: I881cc09ca00829437aa297f5a49acd3e48df4abf Signed-off-by: Rizwan Qureshi <rizwan.qureshi(a)intel.com> --- M src/soc/intel/cannonlake/Kconfig M src/soc/intel/cannonlake/Makefile.inc A src/soc/intel/cannonlake/ucode_update.c 3 files changed, 56 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/33938/1 diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 37e42f3..05a2e41 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -109,6 +109,8 @@ select DISPLAY_FSP_VERSION_INFO select FSP_T_XIP if FSP_CAR select HECI_DISABLE_USING_SMM if !SOC_INTEL_COFFEELAKE && !SOC_INTEL_WHISKEYLAKE && !SOC_INTEL_COMETLAKE + select SOC_INTEL_COMMON_BASECODE + select TOP_SWAP_BASED_VBOOT_UCODE_UPDATE config DCACHE_RAM_BASE default 0xfef00000 diff --git a/src/soc/intel/cannonlake/Makefile.inc b/src/soc/intel/cannonlake/Makefile.inc index 8a4a8b7..e3351ae 100644 --- a/src/soc/intel/cannonlake/Makefile.inc +++ b/src/soc/intel/cannonlake/Makefile.inc @@ -56,6 +56,7 @@ ramstage-y += uart.c ramstage-y += vr_config.c ramstage-y += sd.c +ramstage-$(CONFIG_TOP_SWAP_BASED_VBOOT_UCODE_UPDATE) += ucode_update.c smm-y += elog.c smm-y += p2sb.c diff --git a/src/soc/intel/cannonlake/ucode_update.c b/src/soc/intel/cannonlake/ucode_update.c new file mode 100644 index 0000000..b657e48 --- /dev/null +++ b/src/soc/intel/cannonlake/ucode_update.c @@ -0,0 +1,53 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2016-2018 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <halt.h> +#include <intelbasecode/ucode_update.h> +#include <reset.h> +#include <bootstate.h> +#include <security/vboot/vboot_common.h> +#include <security/vboot/vbnv.h> + +static void update_ucode(void *unused) +{ + if (CONFIG(TOP_SWAP_BASED_VBOOT_UCODE_UPDATE)) { + if (check_and_update_ucode()) { + /* Update failed */ + if (CONFIG(VBOOT)) { + set_recovery_mode_into_vbnv(0x7f); + vboot_reboot(); + } else { + die ("Failed to update microcode\n"); + } + } + } +} + +void ucode_update_reboot(void) +{ + if (CONFIG(VBOOT)) + vboot_reboot(); + else + do_board_reset(); + halt(); +} + +int ucode_update_rec_mode_enabled(void) +{ + return vboot_recovery_mode_enabled(); +} + +BOOT_STATE_INIT_ENTRY(BS_PRE_DEVICE, BS_ON_ENTRY, update_ucode, NULL); -- To view, visit https://review.coreboot.org/c/coreboot/+/33938 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I881cc09ca00829437aa297f5a49acd3e48df4abf Gerrit-Change-Number: 33938 Gerrit-PatchSet: 1 Gerrit-Owner: Rizwan Qureshi <rizwan.qureshi(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit July 2019