coreboot-gerrit July 2019

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Change in ...coreboot[master]: device: Move pci_irqs outside DEVTREE_EARLY
by Paul Menzel (Code Review) 01 Jul '19

01 Jul '19

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33922 ) Change subject: device: Move pci_irqs outside DEVTREE_EARLY ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/33922 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7c1e153b948aeefa4c3bea4920b02a91a417096 Gerrit-Change-Number: 33922 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jul 2019 10:59:17 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: security/tpm/tss/tcg-2.0/tss.c: Add debug message to tlcl_lib_init()
by Frans Hendriks (Code Review) 01 Jul '19

01 Jul '19

Frans Hendriks has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33415 Change subject: security/tpm/tss/tcg-2.0/tss.c: Add debug message to tlcl_lib_init() ...................................................................... security/tpm/tss/tcg-2.0/tss.c: Add debug message to tlcl_lib_init() No message is reported in tlcl_lib_init() when tis_init() or tis_open() returned an error value. Add debug string. BUG=N/A TEST=Build binary and verified logging on Facebook FBG-1701 Change-Id: I522e488ddd3a1bd94a1a8c8470c757bd79c6d5c5 Signed-off-by: Frans Hendriks <fhendriks(a)eltan.com> --- M src/security/tpm/tss/tcg-2.0/tss.c 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/33415/1 diff --git a/src/security/tpm/tss/tcg-2.0/tss.c b/src/security/tpm/tss/tcg-2.0/tss.c index e579bff..c4b5538 100644 --- a/src/security/tpm/tss/tcg-2.0/tss.c +++ b/src/security/tpm/tss/tcg-2.0/tss.c @@ -181,10 +181,15 @@ if (done) return VB2_SUCCESS; - if (tis_init()) + if (tis_init()) { + printk(BIOS_ERR, "%s: tis_init returned error\n", __func__); return VB2_ERROR_UNKNOWN; - if (tis_open()) + } + + if (tis_open()) { + printk(BIOS_ERR, "%s: tis_open returned error\n", __func__); return VB2_ERROR_UNKNOWN; + } car_set_var(tlcl_init_done, 1); -- To view, visit https://review.coreboot.org/c/coreboot/+/33415 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I522e488ddd3a1bd94a1a8c8470c757bd79c6d5c5 Gerrit-Change-Number: 33415 Gerrit-PatchSet: 1 Gerrit-Owner: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: intel/fsp_rangeley: Use fixed FSB/BCLK value 100 MHz
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/33822 ) Change subject: intel/fsp_rangeley: Use fixed FSB/BCLK value 100 MHz ...................................................................... intel/fsp_rangeley: Use fixed FSB/BCLK value 100 MHz Prior to commit d731a24 src/cpu/intel: Set get_ia32_fsb function common value of 200 was silently used as a default for fsp_rangeley (model_406dx) in cpu/x86/lapic/apic_timer:set_timer_fsb(). After the commit, get_ia32_fsb() returns -2, eventually resulting with divide-by-zero in timer_monotonic_get(), as get_timer_fsb() returns 0. Add Rangeley CPUID model 0x4d to get_ia32_fsb() as a fix, using BCLK = 100 MHz based on the comments in northbridge/intel/fsp_rangeley/udelay.c Change-Id: I306f85dba9b1e91539fc0ecc9b2ae9d54f82be6c Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33822 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> --- M src/cpu/intel/common/fsb.c 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved diff --git a/src/cpu/intel/common/fsb.c b/src/cpu/intel/common/fsb.c index 83220de..d66e87a 100644 --- a/src/cpu/intel/common/fsb.c +++ b/src/cpu/intel/common/fsb.c @@ -46,6 +46,7 @@ case 0x3a: /* IvyBridge BCLK fixed at 100MHz */ case 0x3c: /* Haswell BCLK fixed at 100MHz */ case 0x45: /* Haswell-ULT BCLK fixed at 100MHz */ + case 0x4d: /* Rangeley BCLK fixed at 100MHz */ ret = 100; break; } -- To view, visit https://review.coreboot.org/c/coreboot/+/33822 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I306f85dba9b1e91539fc0ecc9b2ae9d54f82be6c Gerrit-Change-Number: 33822 Gerrit-PatchSet: 3 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: merged

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Change in ...coreboot[master]: device: Move pci_irqs outside DEVTREE_EARLY
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33922 ) Change subject: device: Move pci_irqs outside DEVTREE_EARLY ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/33922 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia7c1e153b948aeefa4c3bea4920b02a91a417096 Gerrit-Change-Number: 33922 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jul 2019 03:35:28 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: device: Remove device->ops from early stages
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33921 ) Change subject: device: Remove device->ops from early stages ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/33921 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a361187570716df94a3fd441ae78c0f805b1dda Gerrit-Change-Number: 33921 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 01 Jul 2019 03:35:01 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/sconfig: Emit array of PNP UART devices
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31934 ) Change subject: util/sconfig: Emit array of PNP UART devices ...................................................................... Patch Set 5: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31934 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9330bcd5545ec3f94c1c14ed4a639f1ef0548e43 Gerrit-Change-Number: 31934 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 01 Jul 2019 03:34:06 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/sconfig: Expose usable PCI and PNP device names
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31933 ) Change subject: util/sconfig: Expose usable PCI and PNP device names ...................................................................... Patch Set 5: To make use of this. extern declarations in .h file will be needed. Should I continue with this idea? -- To view, visit https://review.coreboot.org/c/coreboot/+/31933 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I711058f5c809fa9bc7ea4333aaebad6847ebdfd4 Gerrit-Change-Number: 31933 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 01 Jul 2019 03:33:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/sconfig: Add commonlib/helpers.h
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31932 ) Change subject: util/sconfig: Add commonlib/helpers.h ...................................................................... Patch Set 5: This change is ready for review. -- To view, visit https://review.coreboot.org/c/coreboot/+/31932 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ifbcaa1b613aef312d3876e8b536499a9f01a8d19 Gerrit-Change-Number: 31932 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 01 Jul 2019 03:32:08 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: util/sconfig: Declare the repeated devicetree storage
by Kyösti Mälkki (Code Review) 01 Jul '19

01 Jul '19

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31931 ) Change subject: util/sconfig: Declare the repeated devicetree storage ...................................................................... Patch Set 5: (1 comment) This change is ready for review. https://review.coreboot.org/#/c/31931/4/util/sconfig/main.c File util/sconfig/main.c: https://review.coreboot.org/#/c/31931/4/util/sconfig/main.c@932 PS4, Line 932: static > so everything is now static all the time? The names are nonsense and not referenced outside the generated static.c, so 'static' currently makes sense? My longterm plan would be to encode PCI BDF in the names such that early stages resolve node addresses at build-time. This allows dropping the topology links and lets garbage collection to optimise the size for stages other than ramstage. Experiments show that passing struct *device is as efficient, and sometimes better, than pci_devfn_t in romstage. I'd like to deprecate __SIMPLE_DEVICE__. -- To view, visit https://review.coreboot.org/c/coreboot/+/31931 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4cb9e75f179f44edf4f8256ad8320bc2d4ae71a Gerrit-Change-Number: 31931 Gerrit-PatchSet: 5 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Mon, 01 Jul 2019 03:31:59 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: payloads/libpayload: Update a Makefile and a wrappter of a compiler i...
by Asami Doi (Code Review) 01 Jul '19

01 Jul '19

Asami Doi has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33287 Change subject: payloads/libpayload: Update a Makefile and a wrappter of a compiler in libpayload in order to build sample payload for QEMU/ARM. ...................................................................... payloads/libpayload: Update a Makefile and a wrappter of a compiler in libpayload in order to build sample payload for QEMU/ARM. Change-Id: Ia32872c43a99357aa966de3582f6fdb2e2652517 Signed-off-by: Asami Doi <doiasami1219(a)gmail.com> --- M payloads/libpayload/bin/lpgcc A payloads/libpayload/configs/config.emulation-qemu-arm M payloads/libpayload/drivers/Makefile.inc M payloads/libpayload/include/arm/arch/io.h M payloads/libpayload/sample/Makefile 5 files changed, 25 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/33287/1 diff --git a/payloads/libpayload/bin/lpgcc b/payloads/libpayload/bin/lpgcc index b3ef342..b636080 100755 --- a/payloads/libpayload/bin/lpgcc +++ b/payloads/libpayload/bin/lpgcc @@ -200,5 +200,5 @@ # header to be placed below 0x2000 in the resulting image. See: # http://www.gnu.org/software/grub/manual/multiboot/html_node/OS-image-format… - $DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload $_LIBGCC + $DEFAULT_CC $_LDFLAGS $HEAD_O $CMDLINE $_CFLAGS -lpayload $_LIBGCC -lc fi diff --git a/payloads/libpayload/configs/config.emulation-qemu-arm b/payloads/libpayload/configs/config.emulation-qemu-arm new file mode 100644 index 0000000..e498126 --- /dev/null +++ b/payloads/libpayload/configs/config.emulation-qemu-arm @@ -0,0 +1,10 @@ +CONFIG_LP_ARCH_ARM=y +CONFIG_LP_STACK_SIZE=64000 +CONFIG_LP_BASE_ADDRESS=0x62030000 +CONFIG_LP_TINYCURSES=y +CONFIG_LP_8250_SERIAL_CONSOLE=y +CONFIG_LP_USB=y +CONFIG_LP_USB_OHCI=y +CONFIG_LP_USB_EHCI=y +CONFIG_LP_USB_XHCI=y + diff --git a/payloads/libpayload/drivers/Makefile.inc b/payloads/libpayload/drivers/Makefile.inc index b4e7594..7c555fd 100644 --- a/payloads/libpayload/drivers/Makefile.inc +++ b/payloads/libpayload/drivers/Makefile.inc @@ -50,9 +50,7 @@ libc-$(CONFIG_LP_NVRAM) += options.c # Timer drivers -ifneq ($(CONFIG_LP_TIMER_GENERIC_HZ),0) libc-y += timer/generic.c -endif libc-$(CONFIG_LP_TIMER_RDTSC) += timer/rdtsc.c libc-$(CONFIG_LP_TIMER_IMG_PISTACHIO) += timer/img_pistachio.c libc-$(CONFIG_LP_TIMER_ARM64_ARCH) += timer/arm64_arch_timer.c diff --git a/payloads/libpayload/include/arm/arch/io.h b/payloads/libpayload/include/arm/arch/io.h index 2743852..58b8a22 100644 --- a/payloads/libpayload/include/arm/arch/io.h +++ b/payloads/libpayload/include/arm/arch/io.h @@ -34,6 +34,14 @@ #include <stdint.h> #include <arch/cache.h> +#define inb(a) read8((const void *) (a)) +#define inw(a) read16((const void *) (a)) +#define inl(a) read32((const void *) (a)) + +#define outb(v, a) write8((void *) (&v), a) +#define outw(v, a) write16((void *) (&v), a) +#define outl(v, a) write32((void *) (&v), a) + /* * readb/w/l writeb/w/l are deprecated. use read8/16/32 and write8/16/32 * instead for future development. diff --git a/payloads/libpayload/sample/Makefile b/payloads/libpayload/sample/Makefile index 5931d5e..18121df 100644 --- a/payloads/libpayload/sample/Makefile +++ b/payloads/libpayload/sample/Makefile @@ -28,19 +28,20 @@ ## # Sample libpayload Makefile. -include ../.xcompile include ../.config +include ../.xcompile -ARCH-$(CONFIG_LP_ARCH_ARMV) := arm -ARCH-$(CONFIG_LP_ARCH_POWERPC) := powerpc -ARCH-$(CONFIG_LP_ARCH_X86) := i386 +ARCH-$(CONFIG_LP_ARCH_ARM) := arm +ARCH-$(CONFIG_LP_ARCH_X86) := x86_32 +ARCH-$(CONFIG_LP_ARCH_ARM64) := arm64 +ARCH-$(CONFIG_LP_ARCH_MIPS) := mips CC := $(CC_$(ARCH-y)) AS := $(AS_$(ARCH-y)) LIBPAYLOAD_DIR := ../install/libpayload XCC := CC="$(CC)" $(LIBPAYLOAD_DIR)/bin/lpgcc XAS := AS="$(AS)" $(LIBPAYLOAD_DIR)/bin/lpas -CFLAGS := -Wall -Werror -Os +CFLAGS := -fno-builtin -Wall -Werror -Os TARGET := hello OBJS := $(TARGET).o -- To view, visit https://review.coreboot.org/c/coreboot/+/33287 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia32872c43a99357aa966de3582f6fdb2e2652517 Gerrit-Change-Number: 33287 Gerrit-PatchSet: 1 Gerrit-Owner: Asami Doi <d0iasm.pub(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit July 2019