July 2019 - coreboot-gerrit - mail.coreboot.org

Change in ...coreboot[master]: soc/amd/picasso: Update stoney paths to picasso
by Edward O'Callaghan (Code Review) July 2, 2019

July 2, 2019

Edward O'Callaghan has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32412 ) Change subject: soc/amd/picasso: Update stoney paths to picasso ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32412 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18f3d80dbeabd754ebcee6593864fd613fc2ef7b Gerrit-Change-Number: 32412 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Edward O'Callaghan <quasisec(a)chromium.org> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 02 Jul 2019 02:28:53 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: sdm845: Update macro definition in CB clock driver
by Julius Werner (Code Review) July 2, 2019

July 2, 2019

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33811 ) Change subject: sdm845: Update macro definition in CB clock driver ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/33811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If1ca6e5e7b0603f93f3c980cc85af470fdcd54ba Gerrit-Change-Number: 33811 Gerrit-PatchSet: 1 Gerrit-Owner: mturney mturney <mturney(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 02 Jul 2019 01:32:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: QC common: fix compiler complaint, missing <string.h>
by mturney mturney (Code Review) July 2, 2019

July 2, 2019

mturney mturney has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33445 Change subject: QC common: fix compiler complaint, missing <string.h> ...................................................................... QC common: fix compiler complaint, missing <string.h> Change-Id: I5b5b7bc61dd82fb1b866857d60926b057fae3715 Signed-off-by: T Michael Turney <mturney(a)codeaurora.org> --- M src/soc/qualcomm/common/qclib.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/33445/1 diff --git a/src/soc/qualcomm/common/qclib.c b/src/soc/qualcomm/common/qclib.c index 73c5250..5df5b52 100644 --- a/src/soc/qualcomm/common/qclib.c +++ b/src/soc/qualcomm/common/qclib.c @@ -16,6 +16,7 @@ #include <console/cbmem_console.h> #include <cbmem.h> #include <boardid.h> +#include <string.h> #include <fmap.h> #include <assert.h> #include <arch/mmu.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33445 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5b5b7bc61dd82fb1b866857d60926b057fae3715 Gerrit-Change-Number: 33445 Gerrit-PatchSet: 1 Gerrit-Owner: mturney mturney <mturney(a)qualcomm.corp-partner.google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: sdm845: Add UART support
by Julius Werner (Code Review) July 2, 2019

July 2, 2019

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25373 ) Change subject: sdm845: Add UART support ...................................................................... Patch Set 76: (6 comments) https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/Kconfig File src/soc/qualcomm/sdm845/Kconfig: https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/Kconfig@38 PS76, Line 38: Convention is to indent 2 spaces here, not a tab (don't ask me why...) https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/include/so… File src/soc/qualcomm/sdm845/include/soc/qcom_qup_se.h: https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/include/so… PS76, Line 469: This should already not be in here in the first patch that adds this file, not added and then removed again. https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c File src/soc/qualcomm/sdm845/uart.c: https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@76 PS76, Line 76: GENI_STATUS_S_GENI_CMD_ACTIVE_MASK) Fits on one line now? (If not, please align with opening parenthesis.) https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@130 PS76, Line 130: (unsigned char) nit: unnecessary cast (I think?) https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@143 PS76, Line 143: (unsigned int) nit: unnecessary cast https://review.coreboot.org/#/c/25373/76/src/soc/qualcomm/sdm845/uart.c@148 PS76, Line 148: No space after a cast -- To view, visit https://review.coreboot.org/c/coreboot/+/25373 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I827906e820bc15b7f60fdd7876a54c9ed36a48a1 Gerrit-Change-Number: 25373 Gerrit-PatchSet: 76 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 02 Jul 2019 00:38:18 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sdm845: Add QUPv3 FW load & config
by Julius Werner (Code Review) July 2, 2019

July 2, 2019

Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25372 ) Change subject: sdm845: Add QUPv3 FW load & config ...................................................................... Patch Set 76: (1 comment) https://review.coreboot.org/#/c/25372/6/src/mainboard/google/cheza/qupv3_co… File src/mainboard/google/cheza/qupv3_config.c: https://review.coreboot.org/#/c/25372/6/src/mainboard/google/cheza/qupv3_co… PS6, Line 18: struct se_cfg se_mappings[QUPV3_SE_MAX] = > This will violate HPG sequence requirement provided to us by the HW team which says that we have to […] But this is only a problem if we try to load different firmware onto the same QUP instance, right? That should normally not happen. The only way that would happen is if we have an RW update after shipping where we need to fix a problem with some QUP blob already loaded by RO firmware. If that ever happens, we can add code to re-run the common QUP initialization, and run all the driver init functions again afterwards. (coreboot is single-threaded anyway so there's never really an ongoing QUP transfer at the time we're doing anything else.) -- To view, visit https://review.coreboot.org/c/coreboot/+/25372 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6e87f868ecbe2a8e51d94c045ad76b99bb1b345d Gerrit-Change-Number: 25372 Gerrit-PatchSet: 76 Gerrit-Owner: mturney mturney <mturney(a)codeaurora.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Mukesh Savaliya <msavaliy(a)qualcomm.corp-partner.google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: mturney mturney <mturney(a)codeaurora.org> Gerrit-CC: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Tue, 02 Jul 2019 00:30:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Akash Asthana <akashast(a)qualcomm.corp-partner.google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/amd/picasso: Update stoney paths to picasso
by Richard Spiegel (Code Review) July 2, 2019

July 2, 2019

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32412 ) Change subject: soc/amd/picasso: Update stoney paths to picasso ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/32412 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I18f3d80dbeabd754ebcee6593864fd613fc2ef7b Gerrit-Change-Number: 32412 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 02 Jul 2019 00:04:37 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: string.h: Move common string functions into .c file
by Julius Werner (Code Review) July 2, 2019

July 2, 2019

Julius Werner has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32901 Change subject: string.h: Move common string functions into .c file ...................................................................... string.h: Move common string functions into .c file There's no clear reason why most of coreboot's basic string functions are static inline. These functions don't particularly benefit from inlining (at least not notably more than other functions). This patch moves them to string.c to be more consistent with our usual coding practices. Leaving the ctype functions as static inline because they actually seem small and collapsable enough that inlining seems reasonable. Also clarified the situation of strdup() and strconcat() a bit more and optimized strrchr() to be single-pass. Change-Id: I88166ba9876e94dfa3cfc06969c78a9e1bc6fc36 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/include/string.h M src/lib/Makefile.inc M src/lib/string.c 3 files changed, 127 insertions(+), 104 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/01/32901/1 diff --git a/src/include/string.h b/src/include/string.h index 65ce561..278d7c6 100644 --- a/src/include/string.h +++ b/src/include/string.h @@ -25,33 +25,13 @@ #endif char *strdup(const char *s); char *strconcat(const char *s1, const char *s2); - -// simple string functions - -static inline size_t strnlen(const char *src, size_t max) -{ - size_t i = 0; - while ((*src++) && (i < max)) - i++; - return i; -} - -static inline size_t strlen(const char *src) -{ - size_t i = 0; - while (*src++) - i++; - return i; -} - -static inline char *strchr(const char *s, int c) -{ - for (; *s; s++) { - if (*s == c) - return (char *) s; - } - return 0; -} +size_t strnlen(const char *src, size_t max); +size_t strlen(const char *src); +char *strchr(const char *s, int c); +char *strncpy(char *to, const char *from, int count); +char *strcpy(char *dst, const char *src); +int strcmp(const char *s1, const char *s2); +int strncmp(const char *s1, const char *s2, int maxlen); /** * Find a character in a string. @@ -61,71 +41,12 @@ * @return A pointer to the last occurrence of the character in the * string, or NULL if the character was not encountered within the string. */ -static inline char *strrchr(const char *s, int c) -{ - char *p = (char *)s + strlen(s); +char *strrchr(const char *s, int c); - for (; p >= s; p--) { - if (*p == c) - return p; - } - - return NULL; -} - -static inline char *strncpy(char *to, const char *from, int count) -{ - register char *ret = to; - register char data; - - while (count > 0) { - count--; - data = *from++; - *to++ = data; - if (data == '\0') - break; - } - - while (count > 0) { - count--; - *to++ = '\0'; - } - return ret; -} - -static inline char *strcpy(char *dst, const char *src) -{ - char *ptr = dst; - - while (*src) - *dst++ = *src++; - *dst = '\0'; - - return ptr; -} - -static inline int strcmp(const char *s1, const char *s2) -{ - int r; - - while ((r = (*s1 - *s2)) == 0 && *s1) { - s1++; - s2++; - } - return r; -} - -static inline int strncmp(const char *s1, const char *s2, int maxlen) -{ - int i; - - for (i = 0; i < maxlen; i++) { - if ((s1[i] != s2[i]) || (s1[i] == '\0')) - return s1[i] - s2[i]; - } - - return 0; -} +/* Parses an unsigned integer and moves the input pointer forward to the first + character that's not a valid digit. s and *s must not be NULL. Result + undefined if it overruns the return type size. */ +unsigned int skip_atoi(char **s); static inline int isspace(int c) { @@ -179,16 +100,4 @@ return c; } -/* Parses an unsigned integer and moves the input pointer forward to the first - character that's not a valid digit. s and *s must not be NULL. Result - undefined if it overruns the return type size. */ -static inline unsigned int skip_atoi(char **s) -{ - unsigned int i = 0; - - while (isdigit(**s)) - i = i*10 + *((*s)++) - '0'; - return i; -} - #endif /* STRING_H */ diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 1350152..913675b 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -118,7 +118,6 @@ ramstage-y += fmap.c ramstage-y += memchr.c ramstage-y += memcmp.c -ramstage-y += string.c ramstage-y += malloc.c smm-$(CONFIG_SMM_TSEG) += malloc.c ramstage-y += dimm_info_util.c @@ -244,6 +243,14 @@ ramstage-y += reset.c smm-y += reset.c +decompressor-y += string.c +bootblock-y += string.c +verstage-y += string.c +romstage-y += string.c +postcar-y += string.c +ramstage-y += string.c +smm-y += string.c + postcar-y += bootmode.c postcar-y += boot_device.c postcar-y += cbfs.c diff --git a/src/lib/string.c b/src/lib/string.c index 2e71489f..f8ec9de 100644 --- a/src/lib/string.c +++ b/src/lib/string.c @@ -1,9 +1,14 @@ +#include <assert.h> +#include <rules.h> #include <string.h> #include <stddef.h> #include <stdlib.h> char *strdup(const char *s) { + if (!ENV_RAMSTAGE) + dead_code(); /* This can't be used without malloc(). */ + size_t sz = strlen(s) + 1; char *d = malloc(sz); if (d) @@ -13,6 +18,9 @@ char *strconcat(const char *s1, const char *s2) { + if (!ENV_RAMSTAGE) + dead_code(); /* This can't be used without malloc(). */ + size_t sz_1 = strlen(s1); size_t sz_2 = strlen(s2); char *d = malloc(sz_1 + sz_2 + 1); @@ -22,3 +30,102 @@ } return d; } + +size_t strnlen(const char *src, size_t max) +{ + size_t i = 0; + while ((*src++) && (i < max)) + i++; + return i; +} + +size_t strlen(const char *src) +{ + size_t i = 0; + while (*src++) + i++; + return i; +} + +char *strchr(const char *s, int c) +{ + for (; *s; s++) { + if (*s == c) + return (char *)s; + } + return NULL; +} + +char *strrchr(const char *s, int c) +{ + char *p = NULL; + + for (; *s; s++) + if (*s == c) + p = (char *)s; + + return p; +} + +char *strncpy(char *to, const char *from, int count) +{ + register char *ret = to; + register char data; + + while (count > 0) { + count--; + data = *from++; + *to++ = data; + if (data == '\0') + break; + } + + while (count > 0) { + count--; + *to++ = '\0'; + } + return ret; +} + +char *strcpy(char *dst, const char *src) +{ + char *ptr = dst; + + while (*src) + *dst++ = *src++; + *dst = '\0'; + + return ptr; +} + +int strcmp(const char *s1, const char *s2) +{ + int r; + + while ((r = (*s1 - *s2)) == 0 && *s1) { + s1++; + s2++; + } + return r; +} + +int strncmp(const char *s1, const char *s2, int maxlen) +{ + int i; + + for (i = 0; i < maxlen; i++) { + if ((s1[i] != s2[i]) || (s1[i] == '\0')) + return s1[i] - s2[i]; + } + + return 0; +} + +unsigned int skip_atoi(char **s) +{ + unsigned int i = 0; + + while (isdigit(**s)) + i = i*10 + *((*s)++) - '0'; + return i; +} -- To view, visit https://review.coreboot.org/c/coreboot/+/32901 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I88166ba9876e94dfa3cfc06969c78a9e1bc6fc36 Gerrit-Change-Number: 32901 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/mb/google/hatch: disable HECI
by Angel Pons (Code Review) July 2, 2019

July 2, 2019

Angel Pons has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/31097 ) Change subject: src/mb/google/hatch: disable HECI ...................................................................... Abandoned Cleanup of unneeded changes -- To view, visit https://review.coreboot.org/c/coreboot/+/31097 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I53b8e10e910bcff108c203234d613fffc8314c4f Gerrit-Change-Number: 31097 Gerrit-PatchSet: 1 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: src/lib: Add option to support native display init with vboot 2.0
by Amol N Sukerkar (Code Review) July 1, 2019

July 1, 2019

Amol N Sukerkar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33845 Change subject: src/lib: Add option to support native display init with vboot 2.0 ...................................................................... src/lib: Add option to support native display init with vboot 2.0 This change allows display initialization natively in coreboot with vboot 2.0 authentication mechanism is enabled on a non-chromeos platform. TEST=Set option CONFIG_VBOOT and clear CONFIG_VBOOT_MAY_SKIP_DISPLAY_INIT and the display should initialize in ramstage when platform boots. Set CONFIG_VBOOT and set CONFIG_VBOOT_MAY_SKIP_DISPLAY_INIT and the display initialization should be skipped in coreboot. Signed-off-by: Sukerkar, Amol N <amol.n.sukerkar(a)intel.com> Change-Id: I51361c267e0317d44a58cc5d740c3beb8924a57b --- M src/lib/bootmode.c 1 file changed, 7 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/33845/1 diff --git a/src/lib/bootmode.c b/src/lib/bootmode.c index 737dcf9..bb14cd1 100644 --- a/src/lib/bootmode.c +++ b/src/lib/bootmode.c @@ -2,6 +2,7 @@ * This file is part of the coreboot project. * * Copyright (C) 2011 The ChromiumOS Authors. All rights reserved. + * Copyright (C) 2019 Intel Corporation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -33,8 +34,12 @@ int display_init_required(void) { - /* For vboot, always honor VBOOT_WD_FLAG_DISPLAY_INIT. */ - if (CONFIG(VBOOT)) { + /* For vboot, always honor VBOOT_WD_FLAG_DISPLAY_INIT. + * VBOOT_MAY_SKIP_DISPLAY_INIT, when selected, assumes + * CHROMEOS configuration and allows the platform to skip + * display init in normal boot. + */ + if (CONFIG(VBOOT_MAY_SKIP_DISPLAY_INIT)) { /* Must always select MUST_REQUEST_DISPLAY when using this function. */ if (!CONFIG(VBOOT_MUST_REQUEST_DISPLAY)) -- To view, visit https://review.coreboot.org/c/coreboot/+/33845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I51361c267e0317d44a58cc5d740c3beb8924a57b Gerrit-Change-Number: 33845 Gerrit-PatchSet: 1 Gerrit-Owner: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: util/cbmem: Update banner string regular expression
by You-Cheng Syu (Code Review) July 1, 2019

July 1, 2019

You-Cheng Syu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33779 Change subject: util/cbmem: Update banner string regular expression ...................................................................... util/cbmem: Update banner string regular expression Banner string format has been changed (https://review.coreboot.org/30935) We should update our regular expression correspondingly. Also add "verstage" into the stage search list since some boards (e.g., Kukui) might start console initialization at verstage. Change-Id: I16eba3ac5e203e80b0bfd42a4294401dbccd4463 Signed-off-by: You-Cheng Syu <youcheng(a)google.com> --- M util/cbmem/cbmem.c 1 file changed, 4 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/33779/1 diff --git a/util/cbmem/cbmem.c b/util/cbmem/cbmem.c index 52fdc9b..6f8216a 100644 --- a/util/cbmem/cbmem.c +++ b/util/cbmem/cbmem.c @@ -797,9 +797,12 @@ a banner, store the last match for that stage in cursor and stop. */ cursor = 0; if (one_boot_only) { -#define BANNER_REGEX(stage) "\n\ncoreboot-[^\n]* " stage " starting\\.\\.\\.\n" +#define BANNER_REGEX(stage) \ + "\n\ncoreboot-[^\n]* " stage " starting.*\\.\\.\\.\n" #define OVERFLOW_REGEX(stage) "\n\\*\\*\\* Pre-CBMEM " stage " console overflow" const char *regex[] = { BANNER_REGEX("bootblock"), + OVERFLOW_REGEX("verstage"), + BANNER_REGEX("verstage"), OVERFLOW_REGEX("romstage"), BANNER_REGEX("romstage"), OVERFLOW_REGEX("ramstage"), -- To view, visit https://review.coreboot.org/c/coreboot/+/33779 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I16eba3ac5e203e80b0bfd42a4294401dbccd4463 Gerrit-Change-Number: 33779 Gerrit-PatchSet: 1 Gerrit-Owner: You-Cheng Syu <youcheng(a)google.com> Gerrit-MessageType: newchange

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