coreboot-gerrit July 2019

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Change in ...coreboot[master]: util/inteltool: Enable -Wmissing-prototypes
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33946 Change subject: util/inteltool: Enable -Wmissing-prototypes ...................................................................... util/inteltool: Enable -Wmissing-prototypes Change-Id: I6bf041d089498780ea2b7c52402d7452d44d3f87 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M util/inteltool/Makefile 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/33946/1 diff --git a/util/inteltool/Makefile b/util/inteltool/Makefile index d88063b..0f74a7c 100644 --- a/util/inteltool/Makefile +++ b/util/inteltool/Makefile @@ -22,7 +22,7 @@ CC ?= gcc INSTALL ?= /usr/bin/env install PREFIX ?= /usr/local -CFLAGS ?= -O2 -g -Wall -W +CFLAGS ?= -O2 -g -Wall -W -Wmissing-prototypes LDFLAGS += -lpci -lz CPPFLAGS += -I$(top)/src/commonlib/include -- To view, visit https://review.coreboot.org/c/coreboot/+/33946 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6bf041d089498780ea2b7c52402d7452d44d3f87 Gerrit-Change-Number: 33946 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: util/inteltool: Make internal functions static
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33945 Change subject: util/inteltool: Make internal functions static ...................................................................... util/inteltool: Make internal functions static None of these functions are used outside of the files they are defined in, so they can all be static. Change-Id: Ie00fef5a5ba2779e0ff45640cff5cc9f1d096dc1 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M util/inteltool/cpu.c M util/inteltool/inteltool.c M util/inteltool/spi.c 3 files changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/33945/1 diff --git a/util/inteltool/cpu.c b/util/inteltool/cpu.c index 04870fc..d2c8ede 100644 --- a/util/inteltool/cpu.c +++ b/util/inteltool/cpu.c @@ -78,7 +78,7 @@ #ifndef __DARWIN__ int msr_readerror = 0; -msr_t rdmsr(int addr) +static msr_t rdmsr(int addr) { uint32_t buf[2]; msr_t msr = { 0xffffffff, 0xffffffff }; @@ -132,7 +132,7 @@ return 0; } -msr_t rdmsr_from_cpu(int cpu, unsigned long addr) +static msr_t rdmsr_from_cpu(int cpu, unsigned long addr) { int fd; msr_t msr = { 0xffffffff, 0xffffffff }; @@ -155,12 +155,12 @@ return msr; } -int get_number_of_cpus(void) +static int get_number_of_cpus(void) { return sysconf(_SC_NPROCESSORS_ONLN); } -int is_sgx_supported(int cpunum) +static int is_sgx_supported(int cpunum) { cpuid_result_t cpuid_regs; msr_t msr; @@ -172,14 +172,14 @@ return ((cpuid_regs.ebx & SGX_SUPPORTED) && (msr.lo & PRMRR_SUPPORTED)); } -int is_sgx_enabled(int cpunum) +static int is_sgx_enabled(int cpunum) { msr_t data; data = rdmsr_from_cpu(cpunum, IA32_FEATURE_CONTROL); return (data.lo & SGX_GLOBAL_ENABLED); } -int is_sgx_locked(int cpunum) +static int is_sgx_locked(int cpunum) { msr_t data; data = rdmsr_from_cpu(cpunum, IA32_FEATURE_CONTROL); diff --git a/util/inteltool/inteltool.c b/util/inteltool/inteltool.c index 7e02510..76b1abe 100644 --- a/util/inteltool/inteltool.c +++ b/util/inteltool/inteltool.c @@ -443,7 +443,7 @@ } #endif -void print_version(void) +static void print_version(void) { printf("inteltool v%s -- ", INTELTOOL_VERSION); printf("Copyright (C) 2008 coresystems GmbH\n\n"); @@ -457,7 +457,7 @@ "GNU General Public License for more details.\n\n"); } -void print_usage(const char *name) +static void print_usage(const char *name) { printf("usage: %s [-vh?gGrpmedPMaAsfSRx]\n", name); printf("\n" diff --git a/util/inteltool/spi.c b/util/inteltool/spi.c index da5533d..22ba3d4 100644 --- a/util/inteltool/spi.c +++ b/util/inteltool/spi.c @@ -79,7 +79,7 @@ { 0x68, 4, "PBR2 Protected BIOS Range 2" }, }; -int print_bioscntl(struct pci_dev *sb) +static int print_bioscntl(struct pci_dev *sb) { int i, size = 0; unsigned char bios_cntl = 0xff; @@ -207,7 +207,7 @@ return 0; } -int print_spibar(struct pci_dev *sb) { +static int print_spibar(struct pci_dev *sb) { int i, size = 0, rcba_size = 0x4000; volatile uint8_t *rcba; uint32_t rcba_phys; -- To view, visit https://review.coreboot.org/c/coreboot/+/33945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie00fef5a5ba2779e0ff45640cff5cc9f1d096dc1 Gerrit-Change-Number: 33945 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: payloads/coreinfo: Enable -Wmissing-prototypes
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33866 Change subject: payloads/coreinfo: Enable -Wmissing-prototypes ...................................................................... payloads/coreinfo: Enable -Wmissing-prototypes Change-Id: I7ee9436ba71ceea35a35272291ea245c0b7c37c5 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/Makefile 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/33866/1 diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 1a34dbe..38e5bac 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -83,7 +83,8 @@ LPCC := CC="$(CC)" $(LIBPAYLOAD_OBJ)/bin/lpgcc LPAS := AS="$(AS)" $(LIBPAYLOAD_OBJ)/bin/lpas -CFLAGS += -Wall -Wextra -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) +CFLAGS += -Wall -Wextra -Wmissing-prototypes +CFLAGS += -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config -- To view, visit https://review.coreboot.org/c/coreboot/+/33866 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7ee9436ba71ceea35a35272291ea245c0b7c37c5 Gerrit-Change-Number: 33866 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: payloads/coreinfo: Make internal functions static
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33865 Change subject: payloads/coreinfo: Make internal functions static ...................................................................... payloads/coreinfo: Make internal functions static These functions are only used in the files they are defined in, so they can be made static. Change-Id: Ic7f78912803cbdd1cb3a75f7f69f526739dab6e7 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/coreboot_module.c M payloads/coreinfo/multiboot_module.c 2 files changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/33865/1 diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index 66c2582..e56ce68 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -37,7 +37,7 @@ static int tables_good = 0; -int coreboot_module_redraw(WINDOW *win) +static int coreboot_module_redraw(WINDOW *win) { int row = 2; int i; diff --git a/payloads/coreinfo/multiboot_module.c b/payloads/coreinfo/multiboot_module.c index e394dbd..865561d 100644 --- a/payloads/coreinfo/multiboot_module.c +++ b/payloads/coreinfo/multiboot_module.c @@ -32,7 +32,7 @@ static int tables_good = 0; -int multiboot_module_redraw(WINDOW *win) +static int multiboot_module_redraw(WINDOW *win) { int row = 2; int i; -- To view, visit https://review.coreboot.org/c/coreboot/+/33865 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic7f78912803cbdd1cb3a75f7f69f526739dab6e7 Gerrit-Change-Number: 33865 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: payloads/coreinfo: Enable -Wextra
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33864 Change subject: payloads/coreinfo: Enable -Wextra ...................................................................... payloads/coreinfo: Enable -Wextra This enables extra useful warnings. Change-Id: I3d54988935c7df9ac0dc2f7aceb56fb720c9c4d1 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/Makefile 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/33864/1 diff --git a/payloads/coreinfo/Makefile b/payloads/coreinfo/Makefile index 50659d3..1a34dbe 100644 --- a/payloads/coreinfo/Makefile +++ b/payloads/coreinfo/Makefile @@ -83,7 +83,7 @@ LPCC := CC="$(CC)" $(LIBPAYLOAD_OBJ)/bin/lpgcc LPAS := AS="$(AS)" $(LIBPAYLOAD_OBJ)/bin/lpas -CFLAGS += -Wall -Werror -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) +CFLAGS += -Wall -Wextra -Os -fno-builtin $(CFLAGS_$(ARCH-y)) $(INCLUDES) ifneq ($(strip $(HAVE_DOTCONFIG)),) include $(src)/.config -- To view, visit https://review.coreboot.org/c/coreboot/+/33864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3d54988935c7df9ac0dc2f7aceb56fb720c9c4d1 Gerrit-Change-Number: 33864 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: payloads/coreinfo: Use correct integer types for loop indices
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33863 Change subject: payloads/coreinfo: Use correct integer types for loop indices ...................................................................... payloads/coreinfo: Use correct integer types for loop indices Make sure that the type of the loop index matches the type of the upper bound. This fixes several -Wsign-compare warnings. Change-Id: I73a88355d86288609e03f7a6fcaec14dfedac203 Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/coreboot_module.c M payloads/coreinfo/coreinfo.c M payloads/coreinfo/pci_module.c M payloads/coreinfo/timestamps_module.c 4 files changed, 13 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/33863/1 diff --git a/payloads/coreinfo/coreboot_module.c b/payloads/coreinfo/coreboot_module.c index d294288..66c2582 100644 --- a/payloads/coreinfo/coreboot_module.c +++ b/payloads/coreinfo/coreboot_module.c @@ -195,7 +195,7 @@ /* Now, walk the tables. */ ptr += header->header_bytes; - for (i = 0; i < header->table_entries; i++) { + for (u32 j = 0; j < header->table_entries; j++) { struct cb_record *rec = (struct cb_record *)ptr; switch (rec->tag) { diff --git a/payloads/coreinfo/coreinfo.c b/payloads/coreinfo/coreinfo.c index 649bfde..b731abf 100644 --- a/payloads/coreinfo/coreinfo.c +++ b/payloads/coreinfo/coreinfo.c @@ -132,7 +132,7 @@ static void print_menu(void) { - int i, j; + int j; char menu[80]; char *ptr = menu; @@ -140,11 +140,11 @@ for (j = 0; j < SCREEN_X; j++) waddch(menuwin, ' '); - for (i = 0; i < ARRAY_SIZE(categories); i++) { + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) { if (categories[i].count == 0) continue; - ptr += sprintf(ptr, "F%d: %s ", i + 1, categories[i].name); + ptr += sprintf(ptr, "F%zu: %s ", i + 1, categories[i].name); } mvwprintw(menuwin, 1, 0, menu); @@ -215,9 +215,9 @@ static void print_no_modules_selected(void) { - int height = getmaxy(stdscr), i; + int height = getmaxy(stdscr); - for (i = 0; i < ARRAY_SIZE(categories); i++) + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) if (categories[i].count > 0) return; @@ -227,9 +227,7 @@ static int first_nonempty_category(void) { - int i; - - for (i = 0; i < ARRAY_SIZE(categories); i++) + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) if (categories[i].count > 0) return i; return 0; @@ -268,7 +266,7 @@ if (key >= '1' && key <= '9') ch = key - '1'; - if (ch >= 0 && ch <= ARRAY_SIZE(categories)) { + if (ch >= 0 && (unsigned int)ch <= ARRAY_SIZE(categories)) { if (ch == ARRAY_SIZE(categories)) continue; if (categories[ch].count == 0) @@ -289,7 +287,7 @@ int main(void) { - int i, j; + int j; if (CONFIG(LP_USB)) usb_initialize(); @@ -310,7 +308,7 @@ werase(modwin); - for (i = 0; i < ARRAY_SIZE(categories); i++) { + for (size_t i = 0; i < ARRAY_SIZE(categories); i++) { for (j = 0; j < categories[i].count; j++) categories[i].modules[j]->init(); } diff --git a/payloads/coreinfo/pci_module.c b/payloads/coreinfo/pci_module.c index 3060161..cb53ed6 100644 --- a/payloads/coreinfo/pci_module.c +++ b/payloads/coreinfo/pci_module.c @@ -51,7 +51,7 @@ static int partition(struct pci_devices *list, int len) { - int val = list[len / 2].device; + pcidev_t val = list[len / 2].device; int index = 0; int i; diff --git a/payloads/coreinfo/timestamps_module.c b/payloads/coreinfo/timestamps_module.c index fe2d2b5..5468844 100644 --- a/payloads/coreinfo/timestamps_module.c +++ b/payloads/coreinfo/timestamps_module.c @@ -29,9 +29,7 @@ static const char *timestamp_name(uint32_t id) { - int i; - - for (i = 0; i < ARRAY_SIZE(timestamp_ids); i++) { + for (size_t i = 0; i < ARRAY_SIZE(timestamp_ids); i++) { if (timestamp_ids[i].id == id) return timestamp_ids[i].name; } @@ -184,7 +182,7 @@ prev_stamp = base_time; total_time = 0; - for (int i = 0; i < n_entries; i++) { + for (u32 i = 0; i < n_entries; i++) { uint64_t stamp; const struct timestamp_entry *tse = &timestamps->entries[i]; -- To view, visit https://review.coreboot.org/c/coreboot/+/33863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73a88355d86288609e03f7a6fcaec14dfedac203 Gerrit-Change-Number: 33863 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: payloads/coreinfo: Use fixed-width integers for cpuid
by Jacob Garber (Code Review) 07 Jul '19

07 Jul '19

Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33862 Change subject: payloads/coreinfo: Use fixed-width integers for cpuid ...................................................................... payloads/coreinfo: Use fixed-width integers for cpuid This function executes the cpuid instruction, which takes a 32 bit input value (idx), and then stores output in eax, ebx, ecx, and edx, which are all 32 bit registers. Update the prototype to use fixed-width integers, and update all usage calls appropriately. Change-Id: I15876fa35628d3a505864fb49be4fdab1fd19f4a Signed-off-by: Jacob Garber <jgarber1(a)ualberta.ca> --- M payloads/coreinfo/coreinfo.h M payloads/coreinfo/cpuinfo_module.c 2 files changed, 7 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/33862/1 diff --git a/payloads/coreinfo/coreinfo.h b/payloads/coreinfo/coreinfo.h index 073c5f9..03e59c9 100644 --- a/payloads/coreinfo/coreinfo.h +++ b/payloads/coreinfo/coreinfo.h @@ -27,8 +27,7 @@ int (*handle) (int); }; -extern void docpuid(int, unsigned long *, unsigned long *, unsigned long *, - unsigned long *); +extern void docpuid(uint32_t idx, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx); void print_module_title(WINDOW *win, const char *title); diff --git a/payloads/coreinfo/cpuinfo_module.c b/payloads/coreinfo/cpuinfo_module.c index 0ea2dfc..94379f3 100644 --- a/payloads/coreinfo/cpuinfo_module.c +++ b/payloads/coreinfo/cpuinfo_module.c @@ -85,7 +85,7 @@ NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL }; -static unsigned long vendor; +static uint32_t vendor; static unsigned int cpu_khz; static void decode_flags(WINDOW *win, unsigned long reg, const char **flags, @@ -114,7 +114,7 @@ static void get_features(WINDOW *win, int *row) { - unsigned long eax, ebx, ecx, edx; + uint32_t eax, ebx, ecx, edx; int lrow = *row; wmove(win, lrow++, 1); @@ -150,12 +150,12 @@ static void do_name(WINDOW *win, int row) { char name[49], *p; - unsigned long eax, ebx, ecx, edx; - int i, t; + uint32_t eax, ebx, ecx, edx; + int t; p = name; - for (i = 0x80000002; i <= 0x80000004; i++) { + for (uint32_t i = 0x80000002; i <= 0x80000004; i++) { docpuid(i, &eax, &ebx, &ecx, &edx); if (eax == 0) @@ -176,7 +176,7 @@ static int cpuinfo_module_redraw(WINDOW *win) { - unsigned long eax, ebx, ecx, edx; + uint32_t eax, ebx, ecx, edx; unsigned int brand; char *vstr; int row = 2; -- To view, visit https://review.coreboot.org/c/coreboot/+/33862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I15876fa35628d3a505864fb49be4fdab1fd19f4a Gerrit-Change-Number: 33862 Gerrit-PatchSet: 1 Gerrit-Owner: Jacob Garber <jgarber1(a)ualberta.ca> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: device/pci: Declare pci_root_bus()
by Kyösti Mälkki (Code Review) 07 Jul '19

07 Jul '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34004 Change subject: device/pci: Declare pci_root_bus() ...................................................................... device/pci: Declare pci_root_bus() Change-Id: If675abb632fe68acd59ba0bdfef854da3e0839a9 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/device/device_const.c M src/include/device/device.h M src/include/device/pci.h 3 files changed, 15 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/34004/1 diff --git a/src/device/device_const.c b/src/device/device_const.c index 6ce1d18..7fdb3dc 100644 --- a/src/device/device_const.c +++ b/src/device/device_const.c @@ -166,6 +166,8 @@ const struct bus *parent, const struct device_path *path) { DEVTREE_CONST struct device *child; + if (!parent) + return NULL; for (child = parent->children; child; child = child->sibling) { if (path_eq(path, &child->path)) break; @@ -183,10 +185,19 @@ return find_dev_path(parent, &path); } -DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn) +DEVTREE_CONST struct bus *pci_root_bus(void) { DEVTREE_CONST struct device *pci_domain; + pci_domain = dev_find_path(NULL, DEVICE_PATH_DOMAIN); + if (!pci_domain) + return NULL; + + return pci_domain->link_list; +} + +DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn) +{ /* Work around pcidev_path_behind() below failing * due tue complicated devicetree with topology * being manipulated on-the-fly. @@ -194,11 +205,7 @@ if (CONFIG(NORTHBRIDGE_AMD_AMDFAM10)) return dev_find_slot(0, devfn); - pci_domain = dev_find_path(NULL, DEVICE_PATH_DOMAIN); - if (!pci_domain) - return NULL; - - return pcidev_path_behind(pci_domain->link_list, devfn); + return pcidev_path_behind(pci_root_bus(), devfn); } DEVTREE_CONST struct device *pcidev_on_root(uint8_t dev, uint8_t fn) diff --git a/src/include/device/device.h b/src/include/device/device.h index 8e9454c..a200de0 100644 --- a/src/include/device/device.h +++ b/src/include/device/device.h @@ -289,6 +289,7 @@ pci_devfn_t devfn); DEVTREE_CONST struct device *pcidev_path_on_root(pci_devfn_t devfn); DEVTREE_CONST struct device *pcidev_on_root(uint8_t dev, uint8_t fn); +DEVTREE_CONST struct bus *pci_root_bus(void); void scan_smbus(struct device *bus); void scan_generic_bus(struct device *bus); diff --git a/src/include/device/pci.h b/src/include/device/pci.h index f1de7bf..6f9093e 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -98,7 +98,7 @@ const char *pin_to_str(int pin); int get_pci_irq_pins(struct device *dev, struct device **parent_bdg); -void pci_assign_irqs(unsigned int bus, unsigned int slot, +void pci_assign_irqs(struct bus *parent, unsigned int slot, const unsigned char pIntAtoD[4]); const char *get_pci_class_name(struct device *dev); const char *get_pci_subclass_name(struct device *dev); -- To view, visit https://review.coreboot.org/c/coreboot/+/34004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If675abb632fe68acd59ba0bdfef854da3e0839a9 Gerrit-Change-Number: 34004 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: arch/x86: Clean up PIRQ_ROUTE
by Kyösti Mälkki (Code Review) 07 Jul '19

07 Jul '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34078 ) Change subject: arch/x86: Clean up PIRQ_ROUTE ...................................................................... arch/x86: Clean up PIRQ_ROUTE This code is currently only used by via/epia-m850, it is also somewhat buggy. Change-Id: I140e15d584d3f60f7824bcb71ce63724c11e3f46 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/Kconfig M src/arch/x86/Kconfig M src/arch/x86/pirq_routing.c 3 files changed, 21 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/34078/1 diff --git a/src/Kconfig b/src/Kconfig index 919d257..778f169 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -543,10 +543,6 @@ file containing NVRAM/CMOS bit definitions. It defaults to 'n' but can be selected in mainboard/*/Kconfig. -config PIRQ_ROUTE - bool - default n - config HAVE_SMI_HANDLER bool default n @@ -591,17 +587,6 @@ Whether or not the PIRQ table is actually generated by coreboot is configurable by the user via GENERATE_PIRQ_TABLE. -config MAX_PIRQ_LINKS - int - default 4 - help - This variable specifies the number of PIRQ interrupt links which are - routable. On most chipsets, this is 4, INTA through INTD. Some - chipsets offer more than four links, commonly up to INTH. They may - also have a separate link for ATA or IOAPIC interrupts. When the PIRQ - table specifies links greater than 4, pirq_route_irqs will not - function properly, unless this variable is correctly set. - config COMMON_FADT bool default n diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 06aaded..631d981 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -329,3 +329,19 @@ config HAVE_CF9_RESET_PREPARE bool depends on HAVE_CF9_RESET + +config PIRQ_ROUTE + bool + default n + +config MAX_PIRQ_LINKS + int + default 4 + depends on PIRQ_ROUTE + help + This variable specifies the number of PIRQ interrupt links which are + routable. On most chipsets, this is 4, INTA through INTD. Some + chipsets offer more than four links, commonly up to INTH. They may + also have a separate link for ATA or IOAPIC interrupts. When the PIRQ + table specifies links greater than 4, pirq_route_irqs will not + function properly, unless this variable is correctly set. diff --git a/src/arch/x86/pirq_routing.c b/src/arch/x86/pirq_routing.c index 15d7411..5f80c9d 100644 --- a/src/arch/x86/pirq_routing.c +++ b/src/arch/x86/pirq_routing.c @@ -20,10 +20,6 @@ #include <string.h> #include <device/pci.h> -void __weak pirq_assign_irqs(const unsigned char pirq[CONFIG_MAX_PIRQ_LINKS]) -{ -} - static void check_pirq_routing_table(struct irq_routing_table *rt) { uint8_t *addr = (uint8_t *)rt; @@ -146,8 +142,11 @@ /* Set PCI IRQs. */ for (i = 0; i < num_entries; i++) { + u8 bus = pirq_tbl->slots[i].bus; + u8 devfn = pirq_tbl->slots[i].devfn; + printk(BIOS_DEBUG, "PIRQ Entry %d Dev/Fn: %X Slot: %d\n", i, - pirq_tbl->slots[i].devfn >> 3, pirq_tbl->slots[i].slot); + devfn >> 3, pirq_tbl->slots[i].slot); for (intx = 0; intx < MAX_INTX_ENTRIES; intx++) { @@ -178,8 +177,7 @@ } /* Bus, device, slots IRQs for {A,B,C,D}. */ - pci_assign_irqs(pirq_tbl->slots[i].bus, - pirq_tbl->slots[i].devfn >> 3, irq_slot); + pci_assign_irqs(bus, devfn >> 3, irq_slot); } for (i = 0; i < CONFIG_MAX_PIRQ_LINKS; i++) -- To view, visit https://review.coreboot.org/c/coreboot/+/34078 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I140e15d584d3f60f7824bcb71ce63724c11e3f46 Gerrit-Change-Number: 34078 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/hatch/var/kindred: Add Raydium touchscreen support
by David Wu (Code Review) 07 Jul '19

07 Jul '19

David Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33857 Change subject: mb/google/hatch/var/kindred: Add Raydium touchscreen support ...................................................................... mb/google/hatch/var/kindred: Add Raydium touchscreen support - Add Raydium controller - GPIO_COMM_0/1/2/3: Disable gpio community all PM configuration BUG=b:135728282 BRANCH=master TEST= 1. FW_NAME="kindred" emerge-hatch coreboot chromeos-bootimage 2. boot up on kindred DUT to check touchscreen device by evtest /dev/input/event3: Raydium Touchscreen 3. Raydium TS is working Change-Id: Id963300ab0dadcb78786c5a1328c2a4098a48a05 Signed-off-by: David Wu <david_wu(a)quanta.corp-partner.google.com> --- M src/mainboard/google/hatch/variants/kindred/overridetree.cb 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/33857/1 diff --git a/src/mainboard/google/hatch/variants/kindred/overridetree.cb b/src/mainboard/google/hatch/variants/kindred/overridetree.cb index cc068bb..0ddcf43 100644 --- a/src/mainboard/google/hatch/variants/kindred/overridetree.cb +++ b/src/mainboard/google/hatch/variants/kindred/overridetree.cb @@ -50,6 +50,12 @@ # Enable eMMC HS400 register "ScsEmmcHs400Enabled" = "1" + # GPIO community PM configuration + register "gpio_pm[COMM_0]" = "0" + register "gpio_pm[COMM_1]" = "0" + register "gpio_pm[COMM_2]" = "0" + register "gpio_pm[COMM_3]" = "0" + device domain 0 on device pci 15.0 on chip drivers/i2c/generic @@ -74,6 +80,17 @@ register "stop_off_delay_ms" = "5" device i2c 49 on end end + chip drivers/i2c/generic + register "hid" = ""RAYD0001"" + register "desc" = ""Raydium Touchscreen"" + register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_D16_IRQ)" + register "probed" = "1" + register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_D15)" + register "reset_delay_ms" = "1" + register "reset_off_delay_ms" = "2" + register "has_power_resource" = "1" + device i2c 39 on end + end chip drivers/i2c/hid register "generic.hid" = ""GDIX0000"" register "generic.desc" = ""Goodix Touchscreen"" -- To view, visit https://review.coreboot.org/c/coreboot/+/33857 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id963300ab0dadcb78786c5a1328c2a4098a48a05 Gerrit-Change-Number: 33857 Gerrit-PatchSet: 1 Gerrit-Owner: David Wu <david_wu(a)quanta.corp-partner.google.com> Gerrit-MessageType: newchange

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