coreboot-gerrit August 2018

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Change in coreboot[master]: mb/google/poppy/variants/rammus: change build directory to rammus
by Patrick Georgi (Code Review) 06 Aug '18

06 Aug '18

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/27804 ) Change subject: mb/google/poppy/variants/rammus: change build directory to rammus ...................................................................... mb/google/poppy/variants/rammus: change build directory to rammus Move the build board directory from poppy to rammus. BUG=b:111579386 BRANCH=Master TEST=Build pass Change-Id: I3a9fc2bbfe7261661f0c5c073baff0ff1434d09f Signed-off-by: Zhuohao Lee <zhuohao(a)chromium.org> Reviewed-on: https://review.coreboot.org/27804 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/poppy/Kconfig M src/mainboard/google/poppy/Kconfig.name A src/mainboard/google/poppy/variants/rammus/Makefile.inc A src/mainboard/google/poppy/variants/rammus/include/variant/acpi/dptf.asl A src/mainboard/google/poppy/variants/rammus/include/variant/ec.h A src/mainboard/google/poppy/variants/rammus/include/variant/gpio.h 6 files changed, 131 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 06501f7..9a75d9c 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -129,7 +129,7 @@ default "nami" if BOARD_GOOGLE_NAMI default "nautilus" if BOARD_GOOGLE_NAUTILUS default "nocturne" if BOARD_GOOGLE_NOCTURNE - default "poppy" if BOARD_GOOGLE_RAMMUS + default "rammus" if BOARD_GOOGLE_RAMMUS default "soraka" if BOARD_GOOGLE_SORAKA # Select this option to enable camera ACPI support on the variant. @@ -183,6 +183,11 @@ select VARIANT_HAS_CAMERA_ACPI select GEO_SAR_ENABLE if CHROMEOS_WIFI_SAR +config VARIANT_SPECIFIC_OPTIONS_RAMMUS + def_bool n + select CHROMEOS_WIFI_SAR if CHROMEOS + select MAINBOARD_HAS_SPI_TPM_CR50 + config VARIANT_SPECIFIC_OPTIONS_SORAKA def_bool n select DRIVERS_I2C_MAX98927 diff --git a/src/mainboard/google/poppy/Kconfig.name b/src/mainboard/google/poppy/Kconfig.name index 67f1870..c33d7fb 100644 --- a/src/mainboard/google/poppy/Kconfig.name +++ b/src/mainboard/google/poppy/Kconfig.name @@ -28,7 +28,7 @@ config BOARD_GOOGLE_RAMMUS bool "-> Rammus" select BOARD_GOOGLE_BASEBOARD_POPPY - select VARIANT_SPECIFIC_OPTIONS_POPPY + select VARIANT_SPECIFIC_OPTIONS_RAMMUS config BOARD_GOOGLE_SORAKA bool "-> Soraka" diff --git a/src/mainboard/google/poppy/variants/rammus/Makefile.inc b/src/mainboard/google/poppy/variants/rammus/Makefile.inc new file mode 100644 index 0000000..f24f8a7 --- /dev/null +++ b/src/mainboard/google/poppy/variants/rammus/Makefile.inc @@ -0,0 +1 @@ +SPD_SOURCES = empty # 0b0000 diff --git a/src/mainboard/google/poppy/variants/rammus/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/rammus/include/variant/acpi/dptf.asl new file mode 100644 index 0000000..a9afa73 --- /dev/null +++ b/src/mainboard/google/poppy/variants/rammus/include/variant/acpi/dptf.asl @@ -0,0 +1,16 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/acpi/dptf.asl> diff --git a/src/mainboard/google/poppy/variants/rammus/include/variant/ec.h b/src/mainboard/google/poppy/variants/rammus/include/variant/ec.h new file mode 100644 index 0000000..b22fccb --- /dev/null +++ b/src/mainboard/google/poppy/variants/rammus/include/variant/ec.h @@ -0,0 +1,86 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MAINBOARD_EC_H__ +#define __MAINBOARD_EC_H__ + +#include <ec/ec.h> +#include <ec/google/chromeec/ec_commands.h> + +#include <variant/gpio.h> + +#define MAINBOARD_EC_SCI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_CONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_AC_DISCONNECTED) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_LOW) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_CRITICAL) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_STATUS) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_THRESHOLD) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_START) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_THROTTLE_STOP) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_PD_MCU) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MODE_CHANGE) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_MKBP)) + +#define MAINBOARD_EC_SMI_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_CLOSED)) + +/* EC can wake from S5 with lid or power button */ +#define MAINBOARD_EC_S5_WAKE_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_LID_OPEN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_POWER_BUTTON)) + +/* + * EC can wake from S3 with lid or power button or key press or + * mode change event. + */ +#define MAINBOARD_EC_S3_WAKE_EVENTS \ + (MAINBOARD_EC_S5_WAKE_EVENTS |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEY_PRESSED)) + +#define MAINBOARD_EC_S0IX_WAKE_EVENTS (MAINBOARD_EC_S3_WAKE_EVENTS) + +/* Log EC wake events plus EC shutdown events */ +#define MAINBOARD_EC_LOG_EVENTS \ + (EC_HOST_EVENT_MASK(EC_HOST_EVENT_THERMAL_SHUTDOWN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_BATTERY_SHUTDOWN) |\ + EC_HOST_EVENT_MASK(EC_HOST_EVENT_PANIC)) + +/* + * ACPI related definitions for ASL code. + */ + +/* Enable EC backed PD MCU device in ACPI */ +#define EC_ENABLE_PD_MCU_DEVICE + +/* Enable LID switch and provide wake pin for EC */ +#define EC_ENABLE_LID_SWITCH +#define EC_ENABLE_WAKE_PIN GPE_EC_WAKE + +/* Enable Tablet switch */ +#define EC_ENABLE_TABLET_EVENT +#define EC_ENABLE_TBMC_DEVICE + +#define SIO_EC_MEMMAP_ENABLE /* EC Memory Map Resources */ +#define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ +#define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ + +/* Enable EC backed Keyboard Backlight in ACPI */ +#define EC_ENABLE_KEYBOARD_BACKLIGHT + +#endif /* __MAINBOARD_EC_H__ */ diff --git a/src/mainboard/google/poppy/variants/rammus/include/variant/gpio.h b/src/mainboard/google/poppy/variants/rammus/include/variant/gpio.h new file mode 100644 index 0000000..cd34cf0 --- /dev/null +++ b/src/mainboard/google/poppy/variants/rammus/include/variant/gpio.h @@ -0,0 +1,21 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the + * GNU General Public License for more details. + */ + +#ifndef __MAINBOARD_GPIO_H__ +#define __MAINBOARD_GPIO_H__ + +#include <baseboard/gpio.h> + +#endif /* __MAINBOARD_GPIO_H__ */ -- To view, visit https://review.coreboot.org/27804 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I3a9fc2bbfe7261661f0c5c073baff0ff1434d09f Gerrit-Change-Number: 27804 Gerrit-PatchSet: 2 Gerrit-Owner: Zhuohao Lee <zhuohao(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: [WIP] 3rdparty/blobs: Bump for new microcode update for Intel model 3...
by Martin Kepplinger (Code Review) 06 Aug '18

06 Aug '18

Martin Kepplinger has uploaded this change for review. ( https://review.coreboot.org/27864 Change subject: [WIP] 3rdparty/blobs: Bump for new microcode update for Intel model 306ax ...................................................................... [WIP] 3rdparty/blobs: Bump for new microcode update for Intel model 306ax Change-Id: Ib892b5eabb34204dcd3a6ff627374c8214286a2a --- M 3rdparty/blobs 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/27864/1 diff --git a/3rdparty/blobs b/3rdparty/blobs index 372012e..0414580 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 372012e8e1d0d01f3e77ff73b118665b41ff68b6 +Subproject commit 0414580b638d5d4497b6885589de56c331072879 -- To view, visit https://review.coreboot.org/27864 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib892b5eabb34204dcd3a6ff627374c8214286a2a Gerrit-Change-Number: 27864 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Kepplinger <martink(a)posteo.de>

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Change in coreboot[master]: mainboard/pcengines: select ADD_SEABIOS_SERCON_PORT_FILE
by Michał Żygowski (Code Review) 06 Aug '18

06 Aug '18

Michał Żygowski has abandoned this change. ( https://review.coreboot.org/27825 ) Change subject: mainboard/pcengines: select ADD_SEABIOS_SERCON_PORT_FILE ...................................................................... Abandoned Due to gerrit errors, the change has been duplicated (27824) -- To view, visit https://review.coreboot.org/27825 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I9e65dd1e28859028c8c46f28a5442de8c59d4893 Gerrit-Change-Number: 27825 Gerrit-PatchSet: 1 Gerrit-Owner: Michał Żygowski <michal.zygowski(a)3mdeb.com>

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Change in coreboot[master]: mb/google/poppy: Add variant callback for romstage GPIO configuration
by Furquan Shaikh (Code Review) 06 Aug '18

06 Aug '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27863 Change subject: mb/google/poppy: Add variant callback for romstage GPIO configuration ...................................................................... mb/google/poppy: Add variant callback for romstage GPIO configuration This change adds variant callback to get GPIO configuration table in romstage and configures these GPIOs before memory training is performed. BUG=b:111860510 BRANCH=poppy Change-Id: I1eb51356fb3f4c0f4ff29b22dbcde6dbece303ad Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/poppy/romstage.c M src/mainboard/google/poppy/variants/baseboard/Makefile.inc M src/mainboard/google/poppy/variants/baseboard/gpio.c M src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h 4 files changed, 21 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/63/27863/1 diff --git a/src/mainboard/google/poppy/romstage.c b/src/mainboard/google/poppy/romstage.c index f49fbf4..af4f70b 100644 --- a/src/mainboard/google/poppy/romstage.c +++ b/src/mainboard/google/poppy/romstage.c @@ -17,8 +17,10 @@ #include <baseboard/variants.h> #include <cbfs.h> #include <console/console.h> +#include <soc/gpio.h> #include <soc/romstage.h> #include <string.h> +#include <variant/gpio.h> #include <fsp/soc_binding.h> @@ -147,6 +149,12 @@ FSP_M_CONFIG *mem_cfg = &mupd->FspmConfig; struct memory_params p; + const struct pad_config *pads; + size_t num; + + pads = variant_romstage_gpio_table(&num); + gpio_configure_pads(pads, num); + memset(&p, 0, sizeof(p)); variant_memory_params(&p); diff --git a/src/mainboard/google/poppy/variants/baseboard/Makefile.inc b/src/mainboard/google/poppy/variants/baseboard/Makefile.inc index 1d25510..41669f2 100644 --- a/src/mainboard/google/poppy/variants/baseboard/Makefile.inc +++ b/src/mainboard/google/poppy/variants/baseboard/Makefile.inc @@ -1,6 +1,7 @@ bootblock-y += gpio.c romstage-y += memory.c +romstage-y += gpio.c ramstage-y += gpio.c ramstage-y += nhlt.c diff --git a/src/mainboard/google/poppy/variants/baseboard/gpio.c b/src/mainboard/google/poppy/variants/baseboard/gpio.c index 25202e6..c1b8e4c 100644 --- a/src/mainboard/google/poppy/variants/baseboard/gpio.c +++ b/src/mainboard/google/poppy/variants/baseboard/gpio.c @@ -403,3 +403,9 @@ *num = ARRAY_SIZE(cros_gpios); return cros_gpios; } + +const struct pad_config * __weak variant_romstage_gpio_table(size_t *num) +{ + *num = 0; + return NULL; +} diff --git a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h index 7e850b6..391f809 100644 --- a/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h +++ b/src/mainboard/google/poppy/variants/baseboard/include/baseboard/variants.h @@ -27,6 +27,12 @@ const struct pad_config *variant_gpio_table(size_t *num); const struct pad_config *variant_early_gpio_table(size_t *num); +/* + * Callback to get GPIOs to configure in romstage before memory training is + * performed. + */ +const struct pad_config *variant_romstage_gpio_table(size_t *num); + const struct cros_gpio *variant_cros_gpios(size_t *num); /* Config gpio by different sku id */ const struct pad_config *variant_sku_gpio_table(size_t *num); -- To view, visit https://review.coreboot.org/27863 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1eb51356fb3f4c0f4ff29b22dbcde6dbece303ad Gerrit-Change-Number: 27863 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: mb/google/poppy/variants/nautilus: Add SKU info to SMBIOS
by Furquan Shaikh (Code Review) 06 Aug '18

06 Aug '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/27862 Change subject: mb/google/poppy/variants/nautilus: Add SKU info to SMBIOS ...................................................................... mb/google/poppy/variants/nautilus: Add SKU info to SMBIOS This change provides implementation of smbios_mainboard_sku() to add proper "skuX" string to SMBIOS table 1. BUG=b:112163362 TEST=Verified "dmidecode -t 1" reports skuX correctly. Change-Id: I7e42d2c80d791ea7170d066d2eeaa0c6811eb9c9 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/poppy/variants/nautilus/mainboard.c 1 file changed, 11 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/62/27862/1 diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c index 502195e..e51370c 100644 --- a/src/mainboard/google/poppy/variants/nautilus/mainboard.c +++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c @@ -17,6 +17,8 @@ #include <chip.h> #include <gpio.h> #include <device/device.h> +#include <smbios.h> +#include <string.h> #include <variant/sku.h> uint32_t variant_board_sku(void) @@ -40,6 +42,15 @@ return sku_id; } +const char *smbios_mainboard_sku(void) +{ + static char sku_str[5]; /* sku{0-1} */ + + snprintf(sku_str, sizeof(sku_str), "sku%u", variant_board_sku()); + + return sku_str; +} + /* Override dev tree settings per board */ void variant_devtree_update(void) { -- To view, visit https://review.coreboot.org/27862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7e42d2c80d791ea7170d066d2eeaa0c6811eb9c9 Gerrit-Change-Number: 27862 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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Change in coreboot[master]: mp_init: fix typo
by Martin Roth (Code Review) 06 Aug '18

06 Aug '18

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/27811 ) Change subject: mp_init: fix typo ...................................................................... mp_init: fix typo BUG=none TEST=none Change-Id: Ic2d7bf5f5335894ede98dc7e6cc6a65e4897e487 Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> Reviewed-on: https://review.coreboot.org/27811 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martinroth(a)google.com> --- M src/cpu/x86/mp_init.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/src/cpu/x86/mp_init.c b/src/cpu/x86/mp_init.c index 515bc67..d124721 100644 --- a/src/cpu/x86/mp_init.c +++ b/src/cpu/x86/mp_init.c @@ -944,7 +944,7 @@ continue; } - /* Copy to local variable before signalling consumption. */ + /* Copy to local variable before signaling consumption. */ memcpy(&lcb, cb, sizeof(lcb)); mfence(); store_callback(per_cpu_slot, NULL); -- To view, visit https://review.coreboot.org/27811 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ic2d7bf5f5335894ede98dc7e6cc6a65e4897e487 Gerrit-Change-Number: 27811 Gerrit-PatchSet: 2 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: [WIP]Documentation: Add basic flashing tutorial for Lenovo
by Felix Held (Code Review) 06 Aug '18

06 Aug '18

Felix Held has posted comments on this change. ( https://review.coreboot.org/27852 ) Change subject: [WIP]Documentation: Add basic flashing tutorial for Lenovo ...................................................................... Patch Set 1: > > > (1 comment) > > > > > > IIRC the reverse current protection diode isn't populated in at > > > least some models; IIRC it's replaced with a 0 ohm resistor > > > > Do you know which models that are ? > > On T500 / T410 there's no such diode assembled, maybe it only > > applies to older models ? > > I can have a look later, but I think the x230 doesn't have a > reverse current protection diode, but a 0 ohm resistor instead. I had a look at the X230 mainboard I have here and there the reverse current protection diode wasn't populated, but the 0 ohm resistor that is in parallel to the diode -- To view, visit https://review.coreboot.org/27852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec Gerrit-Change-Number: 27852 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 06 Aug 2018 00:30:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: southbridge/intel/bd82x6x/Kconfig: Do not include any IFD by default
by Felix Held (Code Review) 05 Aug '18

05 Aug '18

Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/27218 ) Change subject: southbridge/intel/bd82x6x/Kconfig: Do not include any IFD by default ...................................................................... southbridge/intel/bd82x6x/Kconfig: Do not include any IFD by default Since only a handful of boards have descriptor blobs in the tree, it makes no sense to have `HAVE_IFD_BIN` enabled by default then disabled on each mainboard. This patch flips the default value of said variable, rendering all current overrides unnecessary. The few boards which have an IFD in the blobs repo use `select HAVE_IFD_BIN` to enable adding the IFD by default. Since `HAVE_ME_BIN` depends on `HAVE_IFD_BIN`, the former has been removed alongside the latter, and has been added to the boards with a ME blob as `select HAVE_ME_BIN`. Both `HAVE_IFD_BIN` and `HAVE_ME_BIN` have been removed from autoport as well. Change-Id: I330c4886f8bea4b1a8ecad6505a0e5cc381654d1 Signed-off-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-on: https://review.coreboot.org/27218 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/mainboard/apple/macbookair4_2/Kconfig M src/mainboard/asrock/b75pro3-m/Kconfig M src/mainboard/asus/maximus_iv_gene-z/Kconfig M src/mainboard/asus/p8h61-m_lx/Kconfig M src/mainboard/asus/p8h61-m_pro/Kconfig M src/mainboard/compulab/intense_pc/Kconfig M src/mainboard/gigabyte/ga-b75m-d3h/Kconfig M src/mainboard/gigabyte/ga-b75m-d3v/Kconfig M src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig M src/mainboard/google/butterfly/Kconfig M src/mainboard/google/link/Kconfig M src/mainboard/google/parrot/Kconfig M src/mainboard/google/stout/Kconfig M src/mainboard/hp/2570p/Kconfig M src/mainboard/hp/2760p/Kconfig M src/mainboard/hp/8460p/Kconfig M src/mainboard/hp/8470p/Kconfig M src/mainboard/hp/8770w/Kconfig M src/mainboard/hp/compaq_8200_elite_sff/Kconfig M src/mainboard/hp/folio_9470m/Kconfig M src/mainboard/hp/revolve_810_g1/Kconfig M src/mainboard/intel/dcp847ske/Kconfig M src/mainboard/intel/emeraldlake2/Kconfig M src/mainboard/kontron/ktqm77/Kconfig M src/mainboard/lenovo/l520/Kconfig M src/mainboard/lenovo/s230u/Kconfig M src/mainboard/lenovo/t420/Kconfig M src/mainboard/lenovo/t420s/Kconfig M src/mainboard/lenovo/t430/Kconfig M src/mainboard/lenovo/t430s/Kconfig M src/mainboard/lenovo/t520/Kconfig M src/mainboard/lenovo/t530/Kconfig M src/mainboard/lenovo/x131e/Kconfig M src/mainboard/lenovo/x1_carbon_gen1/Kconfig M src/mainboard/lenovo/x220/Kconfig M src/mainboard/lenovo/x230/Kconfig M src/mainboard/roda/rv11/Kconfig M src/mainboard/samsung/lumpy/Kconfig M src/mainboard/samsung/stumpy/Kconfig M src/mainboard/sapphire/pureplatinumh61/Kconfig M src/southbridge/intel/bd82x6x/Kconfig M util/autoport/sandybridge.go 42 files changed, 14 insertions(+), 262 deletions(-) Approvals: build bot (Jenkins): Verified Felix Held: Looks good to me, approved diff --git a/src/mainboard/apple/macbookair4_2/Kconfig b/src/mainboard/apple/macbookair4_2/Kconfig index 347cba2..7253e87 100644 --- a/src/mainboard/apple/macbookair4_2/Kconfig +++ b/src/mainboard/apple/macbookair4_2/Kconfig @@ -14,14 +14,6 @@ select SOUTHBRIDGE_INTEL_BD82X6X select SYSTEM_TYPE_LAPTOP -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default apple/macbookair4_2 diff --git a/src/mainboard/asrock/b75pro3-m/Kconfig b/src/mainboard/asrock/b75pro3-m/Kconfig index 20ee9a7..af2bd10 100644 --- a/src/mainboard/asrock/b75pro3-m/Kconfig +++ b/src/mainboard/asrock/b75pro3-m/Kconfig @@ -30,14 +30,6 @@ select MAINBOARD_HAS_LIBGFXINIT select DRIVERS_ASMEDIA_ASPM_BLACKLIST -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default asrock/b75pro3-m diff --git a/src/mainboard/asus/maximus_iv_gene-z/Kconfig b/src/mainboard/asus/maximus_iv_gene-z/Kconfig index eacf92e..13fad2d 100644 --- a/src/mainboard/asus/maximus_iv_gene-z/Kconfig +++ b/src/mainboard/asus/maximus_iv_gene-z/Kconfig @@ -32,10 +32,6 @@ select SUPERIO_NUVOTON_NCT6776 select USE_NATIVE_RAMINIT -config HAVE_IFD_BIN - bool - default n - config MAINBOARD_DIR string default asus/maximus_iv_gene-z diff --git a/src/mainboard/asus/p8h61-m_lx/Kconfig b/src/mainboard/asus/p8h61-m_lx/Kconfig index e3712f1..0960803 100644 --- a/src/mainboard/asus/p8h61-m_lx/Kconfig +++ b/src/mainboard/asus/p8h61-m_lx/Kconfig @@ -36,10 +36,6 @@ select SUPERIO_NUVOTON_NCT6776_COM_A select USE_NATIVE_RAMINIT -config HAVE_IFD_BIN - bool - default n - config MAINBOARD_DIR string default asus/p8h61-m_lx diff --git a/src/mainboard/asus/p8h61-m_pro/Kconfig b/src/mainboard/asus/p8h61-m_pro/Kconfig index cd01b0f..8fcc650 100644 --- a/src/mainboard/asus/p8h61-m_pro/Kconfig +++ b/src/mainboard/asus/p8h61-m_pro/Kconfig @@ -32,10 +32,6 @@ select HAVE_CMOS_DEFAULT select DRIVERS_ASMEDIA_ASPM_BLACKLIST -config HAVE_IFD_BIN - bool - default n - config MAINBOARD_DIR string default asus/p8h61-m_pro diff --git a/src/mainboard/compulab/intense_pc/Kconfig b/src/mainboard/compulab/intense_pc/Kconfig index 557b8ff..fccfb86 100644 --- a/src/mainboard/compulab/intense_pc/Kconfig +++ b/src/mainboard/compulab/intense_pc/Kconfig @@ -16,18 +16,6 @@ select USE_NATIVE_RAMINIT select SUPERIO_SMSC_SIO1007 -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - -config HAVE_GBE_BIN - bool - default n - config MAINBOARD_DIR string default compulab/intense_pc diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig index 580a9ad..7ec9fe9 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3h/Kconfig @@ -47,14 +47,6 @@ string default "pci8086,0162.rom" -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config IFD_BIOS_SECTION string default "0x00600000:0x007fffff" diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig index b8694f5..12b1844 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig +++ b/src/mainboard/gigabyte/ga-b75m-d3v/Kconfig @@ -46,14 +46,6 @@ string default "pci8086,0102.rom" -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config IFD_BIOS_SECTION string default "0x00600000:0x007fffff" diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig index 406d1ab..a4595f5 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/Kconfig @@ -33,14 +33,6 @@ select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default "gigabyte/ga-h61m-s2pv" diff --git a/src/mainboard/google/butterfly/Kconfig b/src/mainboard/google/butterfly/Kconfig index 8323d7f..7eca2e1 100644 --- a/src/mainboard/google/butterfly/Kconfig +++ b/src/mainboard/google/butterfly/Kconfig @@ -17,6 +17,8 @@ select MAINBOARD_HAS_TPM1 select INTEL_INT15 select SERIRQ_CONTINUOUS_MODE # Workaround for EC/KBC IRQ1. + select HAVE_IFD_BIN + select HAVE_ME_BIN config VBOOT select VBOOT_VBNV_CMOS diff --git a/src/mainboard/google/link/Kconfig b/src/mainboard/google/link/Kconfig index b7f0c77..18071cf 100644 --- a/src/mainboard/google/link/Kconfig +++ b/src/mainboard/google/link/Kconfig @@ -18,6 +18,8 @@ select MAINBOARD_HAS_NATIVE_VGA_INIT select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT select MAINBOARD_HAS_LIBGFXINIT + select HAVE_IFD_BIN + select HAVE_ME_BIN config VBOOT select EC_GOOGLE_CHROMEEC_SWITCHES diff --git a/src/mainboard/google/parrot/Kconfig b/src/mainboard/google/parrot/Kconfig index 50f28e7..ebab7f4 100644 --- a/src/mainboard/google/parrot/Kconfig +++ b/src/mainboard/google/parrot/Kconfig @@ -15,6 +15,8 @@ select MAINBOARD_HAS_LPC_TPM select MAINBOARD_HAS_TPM1 select INTEL_INT15 + select HAVE_IFD_BIN + select HAVE_ME_BIN # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE diff --git a/src/mainboard/google/stout/Kconfig b/src/mainboard/google/stout/Kconfig index ebec5a5..bc96000 100644 --- a/src/mainboard/google/stout/Kconfig +++ b/src/mainboard/google/stout/Kconfig @@ -17,6 +17,8 @@ select MAINBOARD_HAS_TPM1 select INTEL_INT15 select SANDYBRIDGE_IVYBRIDGE_LVDS + select HAVE_IFD_BIN + select HAVE_ME_BIN config VBOOT select VBOOT_VBNV_CMOS diff --git a/src/mainboard/hp/2570p/Kconfig b/src/mainboard/hp/2570p/Kconfig index dc9588b..8cda10c 100644 --- a/src/mainboard/hp/2570p/Kconfig +++ b/src/mainboard/hp/2570p/Kconfig @@ -34,14 +34,6 @@ select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/2570p diff --git a/src/mainboard/hp/2760p/Kconfig b/src/mainboard/hp/2760p/Kconfig index 7adf209..3c7c55c 100644 --- a/src/mainboard/hp/2760p/Kconfig +++ b/src/mainboard/hp/2760p/Kconfig @@ -34,14 +34,6 @@ select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/2760p diff --git a/src/mainboard/hp/8460p/Kconfig b/src/mainboard/hp/8460p/Kconfig index 1486659..56f90b2 100644 --- a/src/mainboard/hp/8460p/Kconfig +++ b/src/mainboard/hp/8460p/Kconfig @@ -37,14 +37,6 @@ select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/8460p diff --git a/src/mainboard/hp/8470p/Kconfig b/src/mainboard/hp/8470p/Kconfig index 2157867..54ebf14 100644 --- a/src/mainboard/hp/8470p/Kconfig +++ b/src/mainboard/hp/8470p/Kconfig @@ -35,14 +35,6 @@ select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/8470p diff --git a/src/mainboard/hp/8770w/Kconfig b/src/mainboard/hp/8770w/Kconfig index c650309..4ba13ff 100644 --- a/src/mainboard/hp/8770w/Kconfig +++ b/src/mainboard/hp/8770w/Kconfig @@ -33,14 +33,6 @@ select HAVE_OPTION_TABLE select HAVE_CMOS_DEFAULT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/8770w diff --git a/src/mainboard/hp/compaq_8200_elite_sff/Kconfig b/src/mainboard/hp/compaq_8200_elite_sff/Kconfig index d347306..5960f55 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/Kconfig +++ b/src/mainboard/hp/compaq_8200_elite_sff/Kconfig @@ -19,14 +19,6 @@ select MAINBOARD_HAS_LIBGFXINIT select INTEL_GMA_HAVE_VBT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/compaq_8200_elite_sff diff --git a/src/mainboard/hp/folio_9470m/Kconfig b/src/mainboard/hp/folio_9470m/Kconfig index 188f8d8..c68f1dc 100644 --- a/src/mainboard/hp/folio_9470m/Kconfig +++ b/src/mainboard/hp/folio_9470m/Kconfig @@ -21,14 +21,6 @@ select MAINBOARD_HAS_LIBGFXINIT select GFX_GMA_INTERNAL_IS_LVDS -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/folio_9470m diff --git a/src/mainboard/hp/revolve_810_g1/Kconfig b/src/mainboard/hp/revolve_810_g1/Kconfig index 7816da5..c44fcd9 100644 --- a/src/mainboard/hp/revolve_810_g1/Kconfig +++ b/src/mainboard/hp/revolve_810_g1/Kconfig @@ -23,14 +23,6 @@ select MAINBOARD_HAS_LIBGFXINIT select GFX_GMA_INTERNAL_IS_LVDS -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default hp/revolve_810_g1 diff --git a/src/mainboard/intel/dcp847ske/Kconfig b/src/mainboard/intel/dcp847ske/Kconfig index 1fd3d8c..ae93e9d 100644 --- a/src/mainboard/intel/dcp847ske/Kconfig +++ b/src/mainboard/intel/dcp847ske/Kconfig @@ -25,14 +25,6 @@ endmenu -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default intel/dcp847ske diff --git a/src/mainboard/intel/emeraldlake2/Kconfig b/src/mainboard/intel/emeraldlake2/Kconfig index 66c8329..13e4f5b 100644 --- a/src/mainboard/intel/emeraldlake2/Kconfig +++ b/src/mainboard/intel/emeraldlake2/Kconfig @@ -11,6 +11,8 @@ select HAVE_OPTION_TABLE select HAVE_ACPI_RESUME select INTEL_INT15 + select HAVE_IFD_BIN + select HAVE_ME_BIN #select MAINBOARD_HAS_CHROMEOS config VBOOT diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index 17c2803..10da8d1 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -44,18 +44,6 @@ string default "Kontron" -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - -config HAVE_GBE_BIN - bool - default n - config IFD_BIOS_SECTION string default "0x00580000:0x007fffff" diff --git a/src/mainboard/lenovo/l520/Kconfig b/src/mainboard/lenovo/l520/Kconfig index 20ed67c..05174c2 100644 --- a/src/mainboard/lenovo/l520/Kconfig +++ b/src/mainboard/lenovo/l520/Kconfig @@ -18,14 +18,6 @@ select SYSTEM_TYPE_LAPTOP select USE_NATIVE_RAMINIT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/l520 diff --git a/src/mainboard/lenovo/s230u/Kconfig b/src/mainboard/lenovo/s230u/Kconfig index 2c579b0..01bc4b5 100644 --- a/src/mainboard/lenovo/s230u/Kconfig +++ b/src/mainboard/lenovo/s230u/Kconfig @@ -20,14 +20,6 @@ select MAINBOARD_HAS_TPM1 select GENERIC_SPD_BIN -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/s230u diff --git a/src/mainboard/lenovo/t420/Kconfig b/src/mainboard/lenovo/t420/Kconfig index 40fd213..41c0d37 100644 --- a/src/mainboard/lenovo/t420/Kconfig +++ b/src/mainboard/lenovo/t420/Kconfig @@ -29,14 +29,6 @@ # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/t420 diff --git a/src/mainboard/lenovo/t420s/Kconfig b/src/mainboard/lenovo/t420s/Kconfig index ae50975..8eb241a 100644 --- a/src/mainboard/lenovo/t420s/Kconfig +++ b/src/mainboard/lenovo/t420s/Kconfig @@ -25,14 +25,6 @@ # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/t420s diff --git a/src/mainboard/lenovo/t430/Kconfig b/src/mainboard/lenovo/t430/Kconfig index f119def..242412f 100644 --- a/src/mainboard/lenovo/t430/Kconfig +++ b/src/mainboard/lenovo/t430/Kconfig @@ -27,14 +27,6 @@ select GFX_GMA_INTERNAL_IS_LVDS select INTEL_GMA_HAVE_VBT -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/t430 diff --git a/src/mainboard/lenovo/t430s/Kconfig b/src/mainboard/lenovo/t430s/Kconfig index a938dcc..728dd5c 100644 --- a/src/mainboard/lenovo/t430s/Kconfig +++ b/src/mainboard/lenovo/t430s/Kconfig @@ -27,14 +27,6 @@ # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/t430s diff --git a/src/mainboard/lenovo/t520/Kconfig b/src/mainboard/lenovo/t520/Kconfig index 824f299..85dedb3 100644 --- a/src/mainboard/lenovo/t520/Kconfig +++ b/src/mainboard/lenovo/t520/Kconfig @@ -25,14 +25,6 @@ if BOARD_LENOVO_BASEBOARD_T520 -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config VARIANT_DIR string default "t520" if BOARD_LENOVO_T520 diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index 0bbf941..d107504 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -28,14 +28,6 @@ if BOARD_LENOVO_BASEBOARD_T530 -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config VARIANT_DIR string default "t530" if BOARD_LENOVO_T530 diff --git a/src/mainboard/lenovo/x131e/Kconfig b/src/mainboard/lenovo/x131e/Kconfig index 3cf3078..d88f313 100644 --- a/src/mainboard/lenovo/x131e/Kconfig +++ b/src/mainboard/lenovo/x131e/Kconfig @@ -23,10 +23,6 @@ select GFX_GMA_INTERNAL_IS_LVDS select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/x131e diff --git a/src/mainboard/lenovo/x1_carbon_gen1/Kconfig b/src/mainboard/lenovo/x1_carbon_gen1/Kconfig index d33018e..9ffd410 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/Kconfig +++ b/src/mainboard/lenovo/x1_carbon_gen1/Kconfig @@ -27,14 +27,6 @@ # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/x1_carbon_gen1 diff --git a/src/mainboard/lenovo/x220/Kconfig b/src/mainboard/lenovo/x220/Kconfig index 54d3648..a710c84 100644 --- a/src/mainboard/lenovo/x220/Kconfig +++ b/src/mainboard/lenovo/x220/Kconfig @@ -26,14 +26,6 @@ # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/x220 diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig index 29c0e7b..2725dcd 100644 --- a/src/mainboard/lenovo/x230/Kconfig +++ b/src/mainboard/lenovo/x230/Kconfig @@ -27,14 +27,6 @@ # Workaround for EC/KBC IRQ1. select SERIRQ_CONTINUOUS_MODE -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - config MAINBOARD_DIR string default lenovo/x230 diff --git a/src/mainboard/roda/rv11/Kconfig b/src/mainboard/roda/rv11/Kconfig index 4f8a438..4485aee 100644 --- a/src/mainboard/roda/rv11/Kconfig +++ b/src/mainboard/roda/rv11/Kconfig @@ -43,18 +43,6 @@ string default "Roda" -config HAVE_IFD_BIN - bool - default n - -config HAVE_ME_BIN - bool - default n - -config HAVE_GBE_BIN - bool - default n - config IFD_BIOS_SECTION string default "0x00d80000:0x00ffffff" diff --git a/src/mainboard/samsung/lumpy/Kconfig b/src/mainboard/samsung/lumpy/Kconfig index 80f5dab..9cb0e5f 100644 --- a/src/mainboard/samsung/lumpy/Kconfig +++ b/src/mainboard/samsung/lumpy/Kconfig @@ -15,6 +15,8 @@ select NORTHBRIDGE_INTEL_SANDYBRIDGE select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_SMSC_MEC1308 + select HAVE_IFD_BIN + select HAVE_ME_BIN # LPC47N207 selected for external LPC card # not on board, should be made selectable. select SUPERIO_SMSC_LPC47N207 diff --git a/src/mainboard/samsung/stumpy/Kconfig b/src/mainboard/samsung/stumpy/Kconfig index b15b4b6..f0ac4f7 100644 --- a/src/mainboard/samsung/stumpy/Kconfig +++ b/src/mainboard/samsung/stumpy/Kconfig @@ -14,6 +14,8 @@ select NORTHBRIDGE_INTEL_SANDYBRIDGE select SOUTHBRIDGE_INTEL_BD82X6X select SUPERIO_ITE_IT8772F + select HAVE_IFD_BIN + select HAVE_ME_BIN # LPC47N207 selected for external LPC card # not on board, should be made selectable. select SUPERIO_SMSC_LPC47N207 diff --git a/src/mainboard/sapphire/pureplatinumh61/Kconfig b/src/mainboard/sapphire/pureplatinumh61/Kconfig index 42cda6e..a07617e 100644 --- a/src/mainboard/sapphire/pureplatinumh61/Kconfig +++ b/src/mainboard/sapphire/pureplatinumh61/Kconfig @@ -17,10 +17,6 @@ select INTEL_INT15 select NO_UART_ON_SUPERIO -config HAVE_IFD_BIN - bool - default n - config MAINBOARD_DIR string default sapphire/pureplatinumh61 diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 9a70bf2..3033e20 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -66,9 +66,6 @@ hex default 0x80 -config HAVE_IFD_BIN - def_bool y - config BUILD_WITH_FAKE_IFD def_bool !HAVE_IFD_BIN diff --git a/util/autoport/sandybridge.go b/util/autoport/sandybridge.go index e54e6a6..cf2b859 100644 --- a/util/autoport/sandybridge.go +++ b/util/autoport/sandybridge.go @@ -119,9 +119,6 @@ KconfigBool["HAVE_ACPI_TABLES"] = true KconfigBool["HAVE_ACPI_RESUME"] = true - KconfigBool["HAVE_IFD_BIN"] = false - KconfigBool["HAVE_ME_BIN"] = false - KconfigInt["MAX_CPUS"] = 8 DSDTIncludes = append(DSDTIncludes, DSDTInclude{ -- To view, visit https://review.coreboot.org/27218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I330c4886f8bea4b1a8ecad6505a0e5cc381654d1 Gerrit-Change-Number: 27218 Gerrit-PatchSet: 3 Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: [WIP]Documentation: Add basic flashing tutorial for Lenovo
by Felix Held (Code Review) 05 Aug '18

05 Aug '18

Felix Held has posted comments on this change. ( https://review.coreboot.org/27852 ) Change subject: [WIP]Documentation: Add basic flashing tutorial for Lenovo ...................................................................... Patch Set 1: > > (1 comment) > > > > IIRC the reverse current protection diode isn't populated in at > > least some models; IIRC it's replaced with a 0 ohm resistor > > Do you know which models that are ? > On T500 / T410 there's no such diode assembled, maybe it only > applies to older models ? I can have a look later, but I think the x230 doesn't have a reverse current protection diode, but a 0 ohm resistor instead. -- To view, visit https://review.coreboot.org/27852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec Gerrit-Change-Number: 27852 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 05 Aug 2018 13:46:41 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: [WIP]Documentation: Add basic flashing tutorial for Lenovo
by Patrick Rudolph (Code Review) 05 Aug '18

05 Aug '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/27852 ) Change subject: [WIP]Documentation: Add basic flashing tutorial for Lenovo ...................................................................... Patch Set 1: > (1 comment) > > IIRC the reverse current protection diode isn't populated in at > least some models; IIRC it's replaced with a 0 ohm resistor Do you know which models that are ? On T500 / T410 there's no such diode assembled, maybe it only applies to older models ? -- To view, visit https://review.coreboot.org/27852 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia833e27f4e7d89ee32be9bed21a0c021839facec Gerrit-Change-Number: 27852 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 05 Aug 2018 07:38:42 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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coreboot-gerrit August 2018