coreboot-gerrit August 2018

coreboot-gerrit@coreboot.org

1 participants
1120 discussions

Change in coreboot[master]: gpio: Change gpio_baseX_value() function return types to unsigned
by Julius Werner (Code Review) 03 Aug '18

03 Aug '18

Julius Werner has submitted this change and it was merged. ( https://review.coreboot.org/27809 ) Change subject: gpio: Change gpio_baseX_value() function return types to unsigned ...................................................................... gpio: Change gpio_baseX_value() function return types to unsigned This patch changes the return type of gpio_base2_value() and related functions from int to uint32_t. This makes more sense now that board_id() and related functions (which are the primary use case) also return that type. It's unlikely that we'll ever read a strapping of 32 GPIOs in a row, but if we did, we'd probably want to treat it as unsigned. Change-Id: I8fb7e3a7c76cb886aed40d0ada1f545180e43117 Signed-off-by: Julius Werner <jwerner(a)chromium.org> Reviewed-on: https://review.coreboot.org/27809 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/include/gpio.h M src/lib/gpio.c 2 files changed, 17 insertions(+), 16 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved Arthur Heymans: Looks good to me, approved diff --git a/src/include/gpio.h b/src/include/gpio.h index 3160242..0a37ee7 100644 --- a/src/include/gpio.h +++ b/src/include/gpio.h @@ -29,7 +29,7 @@ void gpio_input_pullup(gpio_t gpio); void gpio_input(gpio_t gpio); void gpio_output(gpio_t gpio, int value); -int _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first); +uint32_t _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first); /* * This function may be implemented by SoC/board code to provide @@ -60,9 +60,9 @@ * There are also pulldown and pullup variants which default each gpio to * be configured with an internal pulldown and pullup, respectively. */ -int gpio_base2_value(const gpio_t gpio[], int num_gpio); -int gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio); -int gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio); +uint32_t gpio_base2_value(const gpio_t gpio[], int num_gpio); +uint32_t gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio); +uint32_t gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio); /* * Read the value presented by the set of GPIOs, when each pin is interpreted @@ -73,7 +73,7 @@ * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1]. * num_gpio: number of pins to read. */ -static inline int gpio_base3_value(const gpio_t gpio[], int num_gpio) +static inline uint32_t gpio_base3_value(const gpio_t gpio[], int num_gpio) { return _gpio_base3_value(gpio, num_gpio, 0); } @@ -103,8 +103,8 @@ * gpio[]: pin positions to read. gpio[0] is less significant than gpio[1]. * num_gpio: number of pins to read. */ -static inline int gpio_binary_first_base3_value(const gpio_t gpio[], - int num_gpio) +static inline uint32_t gpio_binary_first_base3_value(const gpio_t gpio[], + int num_gpio) { return _gpio_base3_value(gpio, num_gpio, 1); } diff --git a/src/lib/gpio.c b/src/lib/gpio.c index b52d7b0..0656dfb 100644 --- a/src/lib/gpio.c +++ b/src/lib/gpio.c @@ -20,9 +20,10 @@ #include <delay.h> #include <gpio.h> -static int _gpio_base2_value(const gpio_t gpio[], int num_gpio) +static uint32_t _gpio_base2_value(const gpio_t gpio[], int num_gpio) { - int i, result = 0; + uint32_t result = 0; + int i; /* Wait until signals become stable */ udelay(10); @@ -33,7 +34,7 @@ return result; } -int gpio_base2_value(const gpio_t gpio[], int num_gpio) +uint32_t gpio_base2_value(const gpio_t gpio[], int num_gpio) { int i; @@ -43,7 +44,7 @@ return _gpio_base2_value(gpio, num_gpio); } -int gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio) +uint32_t gpio_pulldown_base2_value(const gpio_t gpio[], int num_gpio) { int i; @@ -53,7 +54,7 @@ return _gpio_base2_value(gpio, num_gpio); } -int gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio) +uint32_t gpio_pullup_base2_value(const gpio_t gpio[], int num_gpio) { int i; @@ -63,7 +64,7 @@ return _gpio_base2_value(gpio, num_gpio); } -int _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first) +uint32_t _gpio_base3_value(const gpio_t gpio[], int num_gpio, int binary_first) { /* * GPIOs which are tied to stronger external pull up or pull down @@ -75,11 +76,11 @@ */ static const char tristate_char[] = {[0] = '0', [1] = '1', [Z] = 'Z'}; - int temp; - int index; - int result = 0; + uint32_t result = 0; int has_z = 0; int binary_below = 0; + int index; + int temp; char value[32]; assert(num_gpio <= 32); -- To view, visit https://review.coreboot.org/27809 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I8fb7e3a7c76cb886aed40d0ada1f545180e43117 Gerrit-Change-Number: 27809 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: google/grunt: Override BayHub EMMC driving strength
by Kevin Chiu (Code Review) 03 Aug '18

03 Aug '18

Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/27816 ) Change subject: google/grunt: Override BayHub EMMC driving strength ...................................................................... Patch Set 3: > (1 comment) > > Did this help for you? When I was testing, it didn't seem to make > any difference. Hi Martin, we've collected some worst system and verified today without 0x5B observed. But some boards may still have 0x5B as you've seen. I'll mark this in WIP then arrange more EVT to test. -- To view, visit https://review.coreboot.org/27816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb Gerrit-Change-Number: 27816 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 03 Aug 2018 18:07:06 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

1 0

Change in coreboot[master]: google/grunt: Override BayHub EMMC driving strength
by Kevin Chiu (Code Review) 03 Aug '18

03 Aug '18

Kevin Chiu has posted comments on this change. ( https://review.coreboot.org/27816 ) Change subject: google/grunt: Override BayHub EMMC driving strength ...................................................................... Patch Set 3: (1 comment) https://review.coreboot.org/#/c/27816/2/src/mainboard/google/kahlee/variant… File src/mainboard/google/kahlee/variants/baseboard/mainboard.c: https://review.coreboot.org/#/c/27816/2/src/mainboard/google/kahlee/variant… PS2, Line 43: u32 sdbar; : u32 bh720_pcr_data; > lowercase? Done -- To view, visit https://review.coreboot.org/27816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb Gerrit-Change-Number: 27816 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 03 Aug 2018 18:03:07 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: google/grunt: Override BayHub EMMC driving strength
by build bot (Jenkins) (Code Review) 03 Aug '18

03 Aug '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27816 ) Change subject: google/grunt: Override BayHub EMMC driving strength ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/#/c/27816/3/src/mainboard/google/kahlee/variant… File src/mainboard/google/kahlee/variants/baseboard/mainboard.c: https://review.coreboot.org/#/c/27816/3/src/mainboard/google/kahlee/variant… PS3, Line 59: bh720_pcr_data | (BH720_PCR_CLK_DRV_MAX << 4) | (bh720_pcr_data_CMD_DRV_MAX << 1)); line over 80 characters https://review.coreboot.org/#/c/27816/3/src/mainboard/google/kahlee/variant… PS3, Line 59: bh720_pcr_data | (BH720_PCR_CLK_DRV_MAX << 4) | (bh720_pcr_data_CMD_DRV_MAX << 1)); code indent should use tabs where possible -- To view, visit https://review.coreboot.org/27816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb Gerrit-Change-Number: 27816 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 03 Aug 2018 18:02:53 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: google/grunt: Override BayHub EMMC driving strength
by Kevin Chiu (Code Review) 03 Aug '18

03 Aug '18

Hello build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/27816 to look at the new patch set (#3). Change subject: google/grunt: Override BayHub EMMC driving strength ...................................................................... google/grunt: Override BayHub EMMC driving strength Careena EVT SanDisk EMMC sku has high fail rate of 0x5B reboot failure. It'll need to increases 1.8V EMMC CLK/CMD,Data driving strength for this issue. CLK[6:4] CMD,DATA[3:1] original: 0x6B enhanced: 0x7F BUG=b:111964336 BRANCH=master TEST=emerge-grunt coreboot Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb Signed-off-by: Kevin Chiu <Kevin.Chiu(a)quantatw.com> --- M src/drivers/generic/bayhub/bh720.c A src/drivers/generic/bayhub/bh720.h M src/mainboard/google/kahlee/variants/baseboard/mainboard.c 3 files changed, 77 insertions(+), 22 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/27816/3 -- To view, visit https://review.coreboot.org/27816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I3db38ff12c566c258895c6643008a0472ca528bb Gerrit-Change-Number: 27816 Gerrit-PatchSet: 3 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Disable SATA if not in devicetree
by Richard Spiegel (Code Review) 03 Aug '18

03 Aug '18

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/27830 ) Change subject: soc/amd/stoneyridge: Disable SATA if not in devicetree ...................................................................... Abandoned Duplicated multiple times due to server error. -- To view, visit https://review.coreboot.org/27830 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I0c50e865762b4415d21d20eed6280992ee75ffff Gerrit-Change-Number: 27830 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Disable SATA if not in devicetree
by Richard Spiegel (Code Review) 03 Aug '18

03 Aug '18

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/27829 ) Change subject: soc/amd/stoneyridge: Disable SATA if not in devicetree ...................................................................... Abandoned Duplicated multiple times due to server error. -- To view, visit https://review.coreboot.org/27829 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Ib3744ba15f1b3ebd050b1fdc739cf8f38d48117f Gerrit-Change-Number: 27829 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Disable SATA if not in devicetree
by Richard Spiegel (Code Review) 03 Aug '18

03 Aug '18

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/27828 ) Change subject: soc/amd/stoneyridge: Disable SATA if not in devicetree ...................................................................... Abandoned Duplicated multiple times due to server error. -- To view, visit https://review.coreboot.org/27828 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I583e6f54d46d19a918ce8c544693ea482fde1b5d Gerrit-Change-Number: 27828 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Disable SATA if not in devicetree
by Richard Spiegel (Code Review) 03 Aug '18

03 Aug '18

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/27823 ) Change subject: soc/amd/stoneyridge: Disable SATA if not in devicetree ...................................................................... Abandoned Duplicated multiple times due to server error. -- To view, visit https://review.coreboot.org/27823 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: I54f57bab1df5a6f16d2714c9fc181bd464f5fa93 Gerrit-Change-Number: 27823 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Disable SATA if not in devicetree
by Richard Spiegel (Code Review) 03 Aug '18

03 Aug '18

Richard Spiegel has abandoned this change. ( https://review.coreboot.org/27822 ) Change subject: soc/amd/stoneyridge: Disable SATA if not in devicetree ...................................................................... Abandoned Duplicated multiple times due to server error. -- To view, visit https://review.coreboot.org/27822 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Ieac1971be23f526f64ff4b1639ff563407b3d13e Gerrit-Change-Number: 27822 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit August 2018