coreboot-gerrit July 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: Kconfig: Make the EM100 config option common
by Simon Glass (Code Review) 12 Jul '18

12 Jul '18

Simon Glass has uploaded this change for review. ( https://review.coreboot.org/27467 Change subject: Kconfig: Make the EM100 config option common ...................................................................... Kconfig: Make the EM100 config option common This applied to AMD devices as well as Intel, although the mechanism is different. Move the option to a common place. BUG=b:111363976 TEST=USE=em100-mode emerge-reef coreboot See that a message appears: * Enabling em100 mode (slow SPI flash) Change-Id: Iea437bdf42e7bc49b1d28c812bfc6128e3eb68bd Signed-off-by: Simon Glass <sjg(a)chromium.org> --- M src/Kconfig M src/southbridge/intel/common/firmware/Kconfig 2 files changed, 14 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/27467/1 diff --git a/src/Kconfig b/src/Kconfig index 24b2106..c8ce14f 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -1024,6 +1024,20 @@ Add the compiler switch `-gnata` to compile code guarded by `pragma Debug`. +config EM100 + bool "Configure image for EM100 usage" + depends on (HAVE_INTEL_FIRMWARE && HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD) || \ + SOC_AMD_COMMON + help + The Dediprog EM100 SPI emulator allows fast loading of new SPI images + over USB. However it only supports a maximum SPI clock of 20MHz and + single data output. Enable this option to use a 20MHz SPI clock and + disable "Dual Output Fast Read" Support. + + On AMD platforms this changes the SPI speed at run-time if the + mainboard code supports this. On supported Intel platforms this works + by changing the settings in the descriptor.bin file. + endmenu diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig index 30c9aaf..b65e7af 100644 --- a/src/southbridge/intel/common/firmware/Kconfig +++ b/src/southbridge/intel/common/firmware/Kconfig @@ -34,12 +34,6 @@ default "3rdparty/blobs/mainboard/$(MAINBOARDDIR)/descriptor.bin" depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD -config EM100 - bool "Configure IFD for EM100 usage" - depends on HAVE_IFD_BIN && !BUILD_WITH_FAKE_IFD - help - Set SPI frequency to 20MHz and disable Dual Output Fast Read Support - config HAVE_ME_BIN bool "Add Intel ME/TXE firmware" depends on HAVE_IFD_BIN -- To view, visit https://review.coreboot.org/27467 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Iea437bdf42e7bc49b1d28c812bfc6128e3eb68bd Gerrit-Change-Number: 27467 Gerrit-PatchSet: 1 Gerrit-Owner: Simon Glass <sjg(a)chromium.org>

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Change in coreboot[master]: stoneyridge: Add support for Dediprog em100
by Simon Glass (Code Review) 12 Jul '18

12 Jul '18

Simon Glass has uploaded this change for review. ( https://review.coreboot.org/27466 Change subject: stoneyridge: Add support for Dediprog em100 ...................................................................... stoneyridge: Add support for Dediprog em100 This device claims to run at 75MHz with dual read, but it is not always reliable. Add an option to change the SPI flash speed to 16MHz, to avoid any problems. BUG=b:111363976 TEST=manually try to get my em100 running (it doesn't yet) Change-Id: I78d3d32c467aac82c72d31c773bfb0f69808aed4 Signed-off-by: Simon Glass <sjg(a)chromium.org> --- M src/mainboard/google/kahlee/bootblock/bootblock.c M src/soc/amd/stoneyridge/Kconfig 2 files changed, 37 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/27466/1 diff --git a/src/mainboard/google/kahlee/bootblock/bootblock.c b/src/mainboard/google/kahlee/bootblock/bootblock.c index 7e6524d..9d767d0 100644 --- a/src/mainboard/google/kahlee/bootblock/bootblock.c +++ b/src/mainboard/google/kahlee/bootblock/bootblock.c @@ -34,19 +34,36 @@ void bootblock_mainboard_init(void) { - /* - * W25Q128FW Setup - * Normal Read 40MHz - * Fast Read 104MHz - * Dual Read IO (1-2-2) - */ - sb_read_mode(SPI_READ_MODE_DUAL122); + if (IS_ENABLED(CONFIG_EM100)) { + /* + * We should be able to rely on defaults, but it seems safer + * to explicitly set up these registers. + * + * Usage: + * sudo emerge em100 + * sudo em100 -s -c W25Q128FW -d \ + * /build/grunt/firmware/image-grunt.serial.bin -r + */ + sb_read_mode(SPI_READ_MODE_NOM); + sb_set_spi100(SPI_SPEED_16M, /* Normal */ + SPI_SPEED_16M, /* Fast */ + SPI_SPEED_16M, /* AltIO */ + SPI_SPEED_66M); /* TPM */ + } else { + /* + * W25Q128FW Setup + * Normal Read 40MHz + * Fast Read 104MHz + * Dual Read IO (1-2-2) + */ + sb_read_mode(SPI_READ_MODE_DUAL122); - /* Set SPI speeds before verstage. Needed for TPM */ - sb_set_spi100(SPI_SPEED_33M, /* Normal */ - SPI_SPEED_66M, /* Fast */ - SPI_SPEED_66M, /* AltIO */ - SPI_SPEED_66M); /* TPM */ + /* Set SPI speeds before verstage. Needed for TPM */ + sb_set_spi100(SPI_SPEED_33M, /* Normal */ + SPI_SPEED_66M, /* Fast */ + SPI_SPEED_66M, /* AltIO */ + SPI_SPEED_66M); /* TPM */ + } /* Setup TPM decode before verstage */ sb_tpm_decode_spi(); diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 05c3043..08e51cd 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -394,4 +394,12 @@ vendorcode/amd/pi/00670F00/ will be compiled or only selected procedures of source files (minimum required). +config EM100 + bool "Configure image for EM100 usage" + help + The Dediprog EM100 SPI emulator allows fast loading of new SPI images + over USB. However it only supports a maximum SPI clock of 20MHz and + single data output. Enable this option to use a 20MHz SPI clock and + disable "Dual Output Fast Read" Support + endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 -- To view, visit https://review.coreboot.org/27466 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I78d3d32c467aac82c72d31c773bfb0f69808aed4 Gerrit-Change-Number: 27466 Gerrit-PatchSet: 1 Gerrit-Owner: Simon Glass <sjg(a)chromium.org>

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Change in coreboot[master]: mb/google/kahlee/variants/grunt: Select low-power mode for WiFi
by Simon Glass (Code Review) 12 Jul '18

12 Jul '18

Simon Glass has removed Martin Roth from this change. ( https://review.coreboot.org/27465 ) Change subject: mb/google/kahlee/variants/grunt: Select low-power mode for WiFi ...................................................................... Removed reviewer Martin Roth. -- To view, visit https://review.coreboot.org/27465 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: deleteReviewer Gerrit-Change-Id: I389815bc36b8610a30b0cbb9d73262ad392e0181 Gerrit-Change-Number: 27465 Gerrit-PatchSet: 1 Gerrit-Owner: Simon Glass <sjg(a)chromium.org>

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Change in coreboot[master]: mb/google/kahlee/variants/grunt: Select low-power mode for WiFi
by Simon Glass (Code Review) 12 Jul '18

12 Jul '18

Simon Glass has uploaded this change for review. ( https://review.coreboot.org/27465 Change subject: mb/google/kahlee/variants/grunt: Select low-power mode for WiFi ...................................................................... mb/google/kahlee/variants/grunt: Select low-power mode for WiFi Put the PCIe clock pins in power-saving mode for the WiFi module to save power. Note: This currently does not appear to have any effect on grunt. BUG=b:110041917 BRANCH=none TEST=boot without this patch: $ iotools mem_read32 0xfed80e00 0x0046f3ff With this patch: $ iotools mem_read32 0xfed80e00 0x0046f3f1 Change-Id: I389815bc36b8610a30b0cbb9d73262ad392e0181 Signed-off-by: Simon Glass <sjg(a)chromium.org> --- M src/mainboard/google/kahlee/mainboard.c M src/soc/amd/stoneyridge/include/soc/southbridge.h 2 files changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/65/27465/1 diff --git a/src/mainboard/google/kahlee/mainboard.c b/src/mainboard/google/kahlee/mainboard.c index cf600d2..a5a8dd1 100644 --- a/src/mainboard/google/kahlee/mainboard.c +++ b/src/mainboard/google/kahlee/mainboard.c @@ -150,6 +150,12 @@ GPP_CLK2_CLOCK_REQ_MAP_MASK, GPP_CLK2_CLOCK_REQ_MAP_CLK_REQ2 << GPP_CLK2_CLOCK_REQ_MAP_SHIFT); + + /* Same for the WiFi */ + clrsetbits_le32((uint32_t *)(MISC_MMIO_BASE + GPP_CLK_CNTRL), + GPP_CLK0_CLOCK_REQ_MAP_MASK, + GPP_CLK0_CLOCK_REQ_MAP_CLK_REQ0 << + GPP_CLK0_CLOCK_REQ_MAP_SHIFT); } /************************************************* diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 3127f5c..2e95309 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -366,6 +366,10 @@ #define GPP_CLK2_CLOCK_REQ_MAP_MASK (0xf << GPP_CLK2_CLOCK_REQ_MAP_SHIFT) #define GPP_CLK2_CLOCK_REQ_MAP_CLK_REQ2 3 +#define GPP_CLK0_CLOCK_REQ_MAP_SHIFT 0 +#define GPP_CLK0_CLOCK_REQ_MAP_MASK (0xf << GPP_CLK0_CLOCK_REQ_MAP_SHIFT) +#define GPP_CLK0_CLOCK_REQ_MAP_CLK_REQ0 1 + struct stoneyridge_aoac { int enable; int status; -- To view, visit https://review.coreboot.org/27465 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I389815bc36b8610a30b0cbb9d73262ad392e0181 Gerrit-Change-Number: 27465 Gerrit-PatchSet: 1 Gerrit-Owner: Simon Glass <sjg(a)chromium.org>

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Change in coreboot[master]: stoneyridge: Enable APSM on PCI express
by Simon Glass (Code Review) 12 Jul '18

12 Jul '18

Simon Glass has uploaded this change for review. ( https://review.coreboot.org/27464 Change subject: stoneyridge: Enable APSM on PCI express ...................................................................... stoneyridge: Enable APSM on PCI express We should use active-state power management where possible to reduced power consumption during normal operation. Enable these options. Note that PCIEXP_COMMON_CLOCK is left disabled, since at least on Grunt the WLAN module seems to generate its own clock. Perhaps I misunderstand the meaning of that setting. BUG=b:110041917 TEST=boot on grunt, see that WiFi and eMMC still run OK Change-Id: Ia7c711304ffe460a9fb0d4f654a51485958239ea Signed-off-by: Simon Glass <sjg(a)chromium.org> --- M src/soc/amd/stoneyridge/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/27464/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 05c3043..e883929 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -66,6 +66,9 @@ select SSE select SSE2 select RTC + select PCIEXP_ASPM + select PCIEXP_CLK_PM + select PCIEXP_L1_SUB_STATE config VBOOT select VBOOT_SEPARATE_VERSTAGE -- To view, visit https://review.coreboot.org/27464 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia7c711304ffe460a9fb0d4f654a51485958239ea Gerrit-Change-Number: 27464 Gerrit-PatchSet: 1 Gerrit-Owner: Simon Glass <sjg(a)chromium.org>

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Change in coreboot[master]: mediatek/mt8183: Add GPIO support
by build bot (Jenkins) (Code Review) 12 Jul '18

12 Jul '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27417 ) Change subject: mediatek/mt8183: Add GPIO support ...................................................................... Patch Set 3: (182 comments) https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… File src/soc/mediatek/mt8183/include/soc/pinmux.h: https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 20: #define PINMUX_CONSTANTS(index, name, func1, func2, func3, func4, func5, func6, func7) \ line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 20: #define PINMUX_CONSTANTS(index, name, func1, func2, func3, func4, func5, func6, func7) \ Macros with complex values should be enclosed in parentheses https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 31: PINMUX_CONSTANTS(GPIO_PAD_0, PAD_EINT0, MRG_SYNC, PCM0_SYNC, TP_GPIO0_AO, SRCLKENAI0, SCP_SPI2_CS, I2S3_MCK, SPI2_CSB), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 32: PINMUX_CONSTANTS(GPIO_PAD_1, PAD_EINT1, MRG_CLK, PCM0_CLK, TP_GPIO1_AO, CLKM3, SCP_SPI2_MO, I2S3_BCK, SPI2_MO), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 33: PINMUX_CONSTANTS(GPIO_PAD_2, PAD_EINT2, MRG_DO, PCM0_DO, TP_GPIO2_AO, SCL6, SCP_SPI2_CK, I2S3_LRCK, SPI2_CLK), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 34: PINMUX_CONSTANTS(GPIO_PAD_3, PAD_EINT3, MRG_DI, PCM0_DI, TP_GPIO3_AO, SDA6, TDM_MCK, I2S3_DO, SCP_VREQ_VAO), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 35: PINMUX_CONSTANTS(GPIO_PAD_4, PAD_EINT4, PWM_B, I2S0_MCK, SSPM_UTXD_AO, MD_URXD1, TDM_BCK, TP_GPIO4_AO, DAP_MD32_SWD), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 36: PINMUX_CONSTANTS(GPIO_PAD_5, PAD_EINT5, PWM_C, I2S0_BCK, SSPM_URXD_AO, MD_UTXD1, TDM_LRCK, TP_GPIO5_AO, DAP_MD32_SWCK), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 37: PINMUX_CONSTANTS(GPIO_PAD_6, PAD_EINT6, PWM_A, I2S0_LRCK, IDDIG, MD_URXD0, TDM_DATA0, TP_GPIO6_AO, CMFLASH), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 38: PINMUX_CONSTANTS(GPIO_PAD_7, PAD_EINT7, SPI1_B_MI, I2S0_DI, USB_DRVVBUS, MD_UTXD0, TDM_DATA1, TP_GPIO7_AO, DVFSRC_EXT_REQ), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 39: PINMUX_CONSTANTS(GPIO_PAD_8, PAD_EINT8, SPI1_B_CSB, ANT_SEL3, SCL7, CONN_MCU_TRST_B, TDM_DATA2, MD_INT0, JTRSTN_SEL1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 40: PINMUX_CONSTANTS(GPIO_PAD_9, PAD_EINT9, SPI1_B_MO, ANT_SEL4, CMMCLK2, CONN_MCU_DBGACK_N, SSPM_JTAG_TRSTN, IO_JTAG_TRSTN, DBG_MON_B10), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 41: PINMUX_CONSTANTS(GPIO_PAD_10, PAD_EINT10, SPI1_B_CLK, ANT_SEL5, CMMCLK3, CONN_MCU_DBGI_N, TDM_DATA3, EXT_FRAME_SYNC, DBG_MON_B11), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 42: PINMUX_CONSTANTS(GPIO_PAD_11, PAD_SCL6, TP_URXD1_AO, IDDIG, SCL6, UCTS1, UCTS0, SRCLKENAI1, I2S5_MCK), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 43: PINMUX_CONSTANTS(GPIO_PAD_12, PAD_SDA6, TP_UTXD1_AO, USB_DRVVBUS, SDA6, URTS1, URTS0, I2S2_DI2, I2S5_BCK), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 44: PINMUX_CONSTANTS(GPIO_PAD_13, PAD_DPI_D0, DBPI_D0, SPI5_MI, PCM0_SYNC, MD_URXD0, ANT_SEL3, I2S0_MCK, DBG_MON_B15), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 45: PINMUX_CONSTANTS(GPIO_PAD_14, PAD_DPI_D1, DBPI_D1, SPI5_CSB, PCM0_CLK, MD_UTXD0, ANT_SEL4, I2S0_BCK, DBG_MON_B16), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 46: PINMUX_CONSTANTS(GPIO_PAD_15, PAD_DPI_D2, DBPI_D2, SPI5_MO, PCM0_DO, MD_URXD1, ANT_SEL5, I2S0_LRCK, DBG_MON_B17), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 47: PINMUX_CONSTANTS(GPIO_PAD_16, PAD_DPI_D3, DBPI_D3, SPI5_CLK, PCM0_DI, MD_UTXD1, ANT_SEL6, I2S0_DI, DBG_MON_B23), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 48: PINMUX_CONSTANTS(GPIO_PAD_17, PAD_DPI_D4, DBPI_D4, SPI4_MI, CONN_MCU_TRST_B, MD_INT0, ANT_SEL7, I2S3_MCK, DBG_MON_A1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 49: PINMUX_CONSTANTS(GPIO_PAD_18, PAD_DPI_D5, DBPI_D5, SPI4_CSB, CONN_MCU_DBGI_N, MD_INT0, SCP_VREQ_VAO, I2S3_BCK, DBG_MON_A2), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 50: PINMUX_CONSTANTS(GPIO_PAD_19, PAD_DPI_D6, DBPI_D6, SPI4_MO, CONN_MCU_TDO, MD_INT2_C2K_UIM1_HOT_PLUG, URXD1, I2S3_LRCK, DBG_MON_A3), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 51: PINMUX_CONSTANTS(GPIO_PAD_20, PAD_DPI_D7, DBPI_D7, SPI4_CLK, CONN_MCU_DBGACK_N, MD_INT1_C2K_UIM0_HOT_PLUG, UTXD1, I2S3_DO, DBG_MON_A19), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 52: PINMUX_CONSTANTS(GPIO_PAD_21, PAD_DPI_D8, DBPI_D8, SPI3_MI, CONN_MCU_TMS, DAP_MD32_SWD, CONN_MCU_AICE_TMSC, I2S2_MCK, DBG_MON_B5), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 53: PINMUX_CONSTANTS(GPIO_PAD_22, PAD_DPI_D9, DBPI_D9, SPI3_CSB, CONN_MCU_TCK, DAP_MD32_SWCK, CONN_MCU_AICE_TCKC, I2S2_BCK, DBG_MON_B6), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 54: PINMUX_CONSTANTS(GPIO_PAD_23, PAD_DPI_D10, DBPI_D10, SPI3_MO, CONN_MCU_TDI, UCTS1, EXT_FRAME_SYNC, I2S2_LRCK, DBG_MON_B7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 55: PINMUX_CONSTANTS(GPIO_PAD_24, PAD_DPI_D11, DBPI_D11, SPI3_CLK, SRCLKENAI0, URTS1, IO_JTAG_TCK, I2S2_DI, DBG_MON_B31), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 56: PINMUX_CONSTANTS(GPIO_PAD_25, PAD_DPI_HSYNC, DBPI_HSYNC, ANT_SEL0, SCL6, KPCOL2, IO_JTAG_TMS, I2S1_MCK, DBG_MON_B0), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 57: PINMUX_CONSTANTS(GPIO_PAD_26, PAD_DPI_VSYNC, DBPI_VSYNC, ANT_SEL1, SDA6, KPROW2, IO_JTAG_TDI, I2S1_BCK, DBG_MON_B1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 58: PINMUX_CONSTANTS(GPIO_PAD_27, PAD_DPI_DE, DBPI_DE, ANT_SEL2, SCL7, DMIC_CLK, IO_JTAG_TDO, I2S1_LRCK, DBG_MON_B9), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 59: PINMUX_CONSTANTS(GPIO_PAD_28, PAD_DPI_CK, DBPI_CK, DVFSRC_EXT_REQ, SDA7, DMIC_DAT, IO_JTAG_TRSTN, I2S1_DO, DBG_MON_B32), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 60: PINMUX_CONSTANTS(GPIO_PAD_29, PAD_MSDC1_CLK, MSDC1_CLK, IO_JTAG_TCK, UDI_TCK, CONN_DSP_JCK, SSPM_JTAG_TCK, PCM1_CLK, DBG_MON_A6), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 61: PINMUX_CONSTANTS(GPIO_PAD_30, PAD_MSDC1_DAT3, MSDC1_DAT3, DAP_MD32_SWD, CONN_MCU_AICE_TMSC, CONN_DSP_JINTP, SSPM_JTAG_TRSTN, PCM1_DI, DBG_MON_A7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 62: PINMUX_CONSTANTS(GPIO_PAD_31, PAD_MSDC1_CMD, MSDC1_CMD, IO_JTAG_TMS, UDI_TMS, CONN_DSP_JMS, SSPM_JTAG_TMS, PCM1_SYNC, DBG_MON_A8), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 63: PINMUX_CONSTANTS(GPIO_PAD_32, PAD_MSDC1_DAT0, MSDC1_DAT0, IO_JTAG_TDI, UDI_TDI, CONN_DSP_JDI, SSPM_JTAG_TDI, PCM1_DO0, DBG_MON_A9), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 64: PINMUX_CONSTANTS(GPIO_PAD_33, PAD_MSDC1_DAT2, MSDC1_DAT2, IO_JTAG_TRSTN, UDI_NTRST, DAP_MD32_SWCK, CONN_MCU_AICE_TCKC, PCM1_DO2, DBG_MON_A10), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 65: PINMUX_CONSTANTS(GPIO_PAD_34, PAD_MSDC1_DAT1, MSDC1_DAT1, IO_JTAG_TDO, UDI_TDO, CONN_DSP_JDO, SSPM_JTAG_TDO, PCM1_DO1, DBG_MON_A11), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 66: PINMUX_CONSTANTS(GPIO_PAD_35, PAD_SIM2_SIO, MD1_SIM2_SIO, CCU_JTAG_TDO, MD1_SIM1_SIO, RES4, SCP_JTAG_TDO, CONN_DSP_JMS, DBG_MON_A28), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 67: PINMUX_CONSTANTS(GPIO_PAD_36, PAD_SIM2_SRST, MD1_SIM2_SRST, CCU_JTAG_TMS, MD1_SIM1_SRST, CONN_MCU_AICE_TMSC, SCP_JTAG_TMS, CONN_DSP_JINTP, DBG_MON_A29), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 68: PINMUX_CONSTANTS(GPIO_PAD_37, PAD_SIM2_SCLK, MD1_SIM2_SCLK, CCU_JTAG_TDI, MD1_SIM1_SCLK, RES4, SCP_JTAG_TDI, CONN_DSP_JDO, DBG_MON_A30), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 69: PINMUX_CONSTANTS(GPIO_PAD_38, PAD_SIM1_SCLK, MD1_SIM1_SCLK, RES2, MD1_SIM2_SCLK, CONN_MCU_AICE_TCKC, RES5, RES6, DBG_MON_A20), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 70: PINMUX_CONSTANTS(GPIO_PAD_39, PAD_SIM1_SRST, MD1_SIM1_SRST, CCU_JTAG_TCK, MD1_SIM2_SRST, RES4, SCP_JTAG_TCK, CONN_DSP_JCK, DBG_MON_A31), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 71: PINMUX_CONSTANTS(GPIO_PAD_40, PAD_SIM1_SIO, MD1_SIM1_SIO, CCU_JTAG_TRST, MD1_SIM2_SIO, RES4, SCP_JTAG_TRSTN, CONN_DSP_JDI, DBG_MON_A32), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 72: PINMUX_CONSTANTS(GPIO_PAD_41, PAD_IDDIG, IDDIG, URXD1, UCTS0, SSPM_UTXD_AO, EXT_FRAME_SYNC, DMIC_CLK, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 73: PINMUX_CONSTANTS(GPIO_PAD_42, PAD_DRVBUS, USB_DRVVBUS, UTXD1, URTS0, SSPM_URXD_AO, EXT_FRAME_SYNC, DMIC_DAT, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 74: PINMUX_CONSTANTS(GPIO_PAD_43, PAD_DISP_PWM, DISP_PWM, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 75: PINMUX_CONSTANTS(GPIO_PAD_44, PAD_DSI_TE, DSI_TE, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 76: PINMUX_CONSTANTS(GPIO_PAD_45, PAD_LCM_RST, LCM_RST, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 77: PINMUX_CONSTANTS(GPIO_PAD_46, PAD_INT_SIM2, MD_INT2_C2K_UIM1_HOT_PLUG, URXD1, UCTS1, CCU_UTXD_AO, TP_UCTS1_AO, IDDIG, I2S5_LRCK), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 78: PINMUX_CONSTANTS(GPIO_PAD_47, PAD_INT_SIM1, MD_INT1_C2K_UIM0_HOT_PLUG, UTXD1, URTS1, CCU_URXD_AO, TP_URTS1_AO, USB_DRVVBUS, I2S5_DO), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 79: PINMUX_CONSTANTS(GPIO_PAD_48, PAD_SCL5, SCL5, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 80: PINMUX_CONSTANTS(GPIO_PAD_49, PAD_SDA5, SDA5, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 81: PINMUX_CONSTANTS(GPIO_PAD_50, PAD_SCL3, SCL3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 82: PINMUX_CONSTANTS(GPIO_PAD_51, PAD_SDA3, SDA3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 83: PINMUX_CONSTANTS(GPIO_PAD_52, PAD_BPI_ANT2, BPI_ANT2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 84: PINMUX_CONSTANTS(GPIO_PAD_53, PAD_BPI_ANT0, BPI_ANT0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 85: PINMUX_CONSTANTS(GPIO_PAD_54, PAD_BPI_OLAT1, BPI_OLAT1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 86: PINMUX_CONSTANTS(GPIO_PAD_55, PAD_BPI_BUS8, BPI_BUS8, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 87: PINMUX_CONSTANTS(GPIO_PAD_56, PAD_BPI_BUS9, BPI_BUS9, SCL_6306, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 88: PINMUX_CONSTANTS(GPIO_PAD_57, PAD_BPI_BUS10, BPI_BUS10, SDA_6306, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 89: PINMUX_CONSTANTS(GPIO_PAD_58, PAD_RFIC0_BSI_D2, RFIC0_BSI_D2, SPM_BSI_D2, PWM_B, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 90: PINMUX_CONSTANTS(GPIO_PAD_59, PAD_RFIC0_BSI_D1, RFIC0_BSI_D1, SPM_BSI_D1, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 91: PINMUX_CONSTANTS(GPIO_PAD_60, PAD_RFIC0_BSI_D0, RFIC0_BSI_D0, SPM_BSI_D0, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 92: PINMUX_CONSTANTS(GPIO_PAD_61, PAD_MISC_BSI_DO_1, MIPI1_SDATA, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 93: PINMUX_CONSTANTS(GPIO_PAD_62, PAD_MISC_BSI_CK_1, MIPI1_SCLK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 94: PINMUX_CONSTANTS(GPIO_PAD_63, PAD_MISC_BSI_DO_0, MIPI0_SDATA, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 95: PINMUX_CONSTANTS(GPIO_PAD_64, PAD_MISC_BSI_CK_0, MIPI0_SCLK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 96: PINMUX_CONSTANTS(GPIO_PAD_65, PAD_MISC_BSI_DO_3, MIPI3_SDATA, BPI_OLAT2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 97: PINMUX_CONSTANTS(GPIO_PAD_66, PAD_MISC_BSI_CK_3, MIPI3_SCLK, BPI_OLAT3, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 98: PINMUX_CONSTANTS(GPIO_PAD_67, PAD_MISC_BSI_DO_2, MIPI2_SDATA, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 99: PINMUX_CONSTANTS(GPIO_PAD_68, PAD_MISC_BSI_CK_2, MIPI2_SCLK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 100: PINMUX_CONSTANTS(GPIO_PAD_69, PAD_BPI_BUS7, BPI_BUS7, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 101: PINMUX_CONSTANTS(GPIO_PAD_70, PAD_BPI_BUS6, BPI_BUS6, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 102: PINMUX_CONSTANTS(GPIO_PAD_71, PAD_BPI_BUS5, BPI_BUS5, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 103: PINMUX_CONSTANTS(GPIO_PAD_72, PAD_BPI_BUS4, BPI_BUS4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 104: PINMUX_CONSTANTS(GPIO_PAD_73, PAD_BPI_BUS3, BPI_BUS3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 105: PINMUX_CONSTANTS(GPIO_PAD_74, PAD_BPI_BUS2, BPI_BUS2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 106: PINMUX_CONSTANTS(GPIO_PAD_75, PAD_BPI_BUS1, BPI_BUS1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 107: PINMUX_CONSTANTS(GPIO_PAD_76, PAD_BPI_BUS0, BPI_BUS0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 108: PINMUX_CONSTANTS(GPIO_PAD_77, PAD_BPI_ANT1, BPI_ANT1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 109: PINMUX_CONSTANTS(GPIO_PAD_78, PAD_BPI_OLAT0, BPI_OLAT0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 110: PINMUX_CONSTANTS(GPIO_PAD_79, PAD_BPI_PA_VM1, BPI_PA_VM1, MIPI4_SDATA, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 111: PINMUX_CONSTANTS(GPIO_PAD_80, PAD_BPI_PA_VM0, BPI_PA_VM0, MIPI4_SCLK, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 112: PINMUX_CONSTANTS(GPIO_PAD_81, PAD_SDA1, SDA1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 113: PINMUX_CONSTANTS(GPIO_PAD_82, PAD_SDA0, SDA0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 114: PINMUX_CONSTANTS(GPIO_PAD_83, PAD_SCL0, SCL0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 115: PINMUX_CONSTANTS(GPIO_PAD_84, PAD_SCL1, SCL1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 116: PINMUX_CONSTANTS(GPIO_PAD_85, PAD_SPI_MI, SPI0_MI, SCP_SPI0_MI, CLKM3, I2S1_BCK, MFG_DFD_JTAG_TDO, DFD_TDO, JTDO_SEL1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 117: PINMUX_CONSTANTS(GPIO_PAD_86, PAD_SPI_CSB, SPI0_CSB, SCP_SPI0_CS, CLKM0, I2S1_LRCK, MFG_DFD_JTAG_TMS, DFD_TMS, JTMS_SEL1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 118: PINMUX_CONSTANTS(GPIO_PAD_87, PAD_SPI_MO, SPI0_MO, SCP_SPI0_MO, SDA1, I2S1_DO, MFG_DFD_JTAG_TDI, DFD_TDI, JTDI_SEL1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 119: PINMUX_CONSTANTS(GPIO_PAD_88, PAD_SPI_CLK, SPI0_CLK, SCP_SPI0_CK, SCL1, I2S1_MCK, MFG_DFD_JTAG_TCK, DFD_TCK_XI, JTCK_SEL1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 120: PINMUX_CONSTANTS(GPIO_PAD_89, PAD_SRCLKENAI, SRCLKENAI0, PWM_C, I2S5_BCK, ANT_SEL6, SDA8, CMVREF0, DBG_MON_A21), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 121: PINMUX_CONSTANTS(GPIO_PAD_90, PAD_PWM_A, PWM_A, CMMCLK2, I2S5_LRCK, SCP_VREQ_VAO, SCL8, PTA_RXD, DBG_MON_A22), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 122: PINMUX_CONSTANTS(GPIO_PAD_91, PAD_KPROW1, KPROW1, PWM_B, I2S5_DO, ANT_SEL7, CMMCLK3, PTA_TXD, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 123: PINMUX_CONSTANTS(GPIO_PAD_92, PAD_KPROW0, KPROW0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 124: PINMUX_CONSTANTS(GPIO_PAD_93, PAD_KPCOL0, KPCOL0, RES2, RES3, RES4, RES5, RES6, DBG_MON_B27), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 125: PINMUX_CONSTANTS(GPIO_PAD_94, PAD_KPCOL1, KPCOL1, I2S2_DI2, I2S5_MCK, CMMCLK2, SCP_SPI2_MI, SRCLKENAI1, SPI2_MI), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 126: PINMUX_CONSTANTS(GPIO_PAD_95, PAD_URXD0, URXD0, UTXD0, MD_URXD0, MD_URXD1, SSPM_URXD_AO, CCU_URXD_AO, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 127: PINMUX_CONSTANTS(GPIO_PAD_96, PAD_UTXD0, UTXD0, URXD0, MD_UTXD0, MD_UTXD1, SSPM_UTXD_AO, CCU_UTXD_AO, DBG_MON_B2), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 128: PINMUX_CONSTANTS(GPIO_PAD_97, PAD_CAM_PDN0, UCTS0, I2S2_MCK, IDDIG, CONN_MCU_TDO, SSPM_JTAG_TDO, IO_JTAG_TDO, DBG_MON_B3), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 129: PINMUX_CONSTANTS(GPIO_PAD_98, PAD_CAM_PDN1, URTS0, I2S2_BCK, USB_DRVVBUS, CONN_MCU_TMS, SSPM_JTAG_TMS, IO_JTAG_TMS, DBG_MON_B4), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 130: PINMUX_CONSTANTS(GPIO_PAD_99, PAD_CAM_CLK0, CMMCLK0, RES2, RES3, CONN_MCU_AICE_TMSC, RES5, RES6, DBG_MON_B28), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 131: PINMUX_CONSTANTS(GPIO_PAD_100, PAD_CAM_CLK1, CMMCLK1, PWM_C, MD_INT1_C2K_UIM0_HOT_PLUG, CONN_MCU_AICE_TCKC, RES5, RES6, DBG_MON_B29), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 132: PINMUX_CONSTANTS(GPIO_PAD_101, PAD_CAM_RST0, CLKM2, I2S2_LRCK, CMVREF1, CONN_MCU_TCK, SSPM_JTAG_TCK, IO_JTAG_TCK, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 133: PINMUX_CONSTANTS(GPIO_PAD_102, PAD_CAM_RST1, CLKM1, I2S2_DI, DVFSRC_EXT_REQ, CONN_MCU_TDI, SSPM_JTAG_TDI, IO_JTAG_TDI, DBG_MON_B8), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 134: PINMUX_CONSTANTS(GPIO_PAD_103, PAD_SCL2, SCL2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 135: PINMUX_CONSTANTS(GPIO_PAD_104, PAD_SDA2, SDA2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 136: PINMUX_CONSTANTS(GPIO_PAD_105, PAD_SCL4, SCL4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 137: PINMUX_CONSTANTS(GPIO_PAD_106, PAD_SDA4, SDA4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 138: PINMUX_CONSTANTS(GPIO_PAD_107, PAD_CAM_PDN2, DMIC_CLK, ANT_SEL0, CLKM0, SDA7, EXT_FRAME_SYNC, PWM_A, DBG_MON_B12), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 139: PINMUX_CONSTANTS(GPIO_PAD_108, PAD_CAM_CLK2, CMMCLK2, ANT_SEL1, CLKM1, SCL8, DAP_MD32_SWD, PWM_B, DBG_MON_B13), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 140: PINMUX_CONSTANTS(GPIO_PAD_109, PAD_CAM_RST2, DMIC_DAT, ANT_SEL2, CLKM2, SDA8, DAP_MD32_SWCK, PWM_C, DBG_MON_B14), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 141: PINMUX_CONSTANTS(GPIO_PAD_110, PAD_CAM_PDN3, SCL7, ANT_SEL0, TP_URXD1_AO, USB_DRVVBUS, SRCLKENAI1, KPCOL2, URXD1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 142: PINMUX_CONSTANTS(GPIO_PAD_111, PAD_CAM_CLK3, CMMCLK3, ANT_SEL1, SRCLKENAI0, SCP_VREQ_VAO, MD_INT2_C2K_UIM1_HOT_PLUG, RES6, DVFSRC_EXT_REQ), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 143: PINMUX_CONSTANTS(GPIO_PAD_112, PAD_CAM_RST3, SDA7, ANT_SEL2, TP_UTXD1_AO, IDDIG, AGPS_SYNC, KPROW2, UTXD1), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 144: PINMUX_CONSTANTS(GPIO_PAD_113, PAD_CONN_TOP_CLK, CONN_TOP_CLK, RES2, SCL6, AUXIF_CLK0, RES5, TP_UCTS1_AO, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 145: PINMUX_CONSTANTS(GPIO_PAD_114, PAD_CONN_TOP_DATA, CONN_TOP_DATA, RES2, SDA6, AUXIF_ST0, RES5, TP_URTS1_AO, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 146: PINMUX_CONSTANTS(GPIO_PAD_115, PAD_CONN_BT_CLK, CONN_BT_CLK, UTXD1, PTA_TXD, AUXIF_CLK1, DAP_MD32_SWD, TP_UTXD1_AO, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 147: PINMUX_CONSTANTS(GPIO_PAD_116, PAD_CONN_BT_DATA, CONN_BT_DATA, IPU_JTAG_TRST, RES3, AUXIF_ST1, DAP_MD32_SWCK, TP_URXD2_AO, DBG_MON_A0), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 148: PINMUX_CONSTANTS(GPIO_PAD_117, PAD_CONN_WF_CTRL0, CONN_WF_HB0, IPU_JTAG_TDO, RES3, RES4, RES5, TP_UTXD2_AO, DBG_MON_A4), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 149: PINMUX_CONSTANTS(GPIO_PAD_118, PAD_CONN_WF_CTRL1, CONN_WF_HB1, IPU_JTAG_TDI, RES3, RES4, SSPM_URXD_AO, TP_UCTS2_AO, DBG_MON_A5), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 150: PINMUX_CONSTANTS(GPIO_PAD_119, PAD_CONN_WF_CTRL2, CONN_WF_HB2, IPU_JTAG_TCK, RES3, RES4, SSPM_UTXD_AO, TP_URTS2_AO, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 151: PINMUX_CONSTANTS(GPIO_PAD_120, PAD_CONN_WB_PTA, CONN_WB_PTA, IPU_JTAG_TMS, RES3, RES4, CCU_URXD_AO, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 152: PINMUX_CONSTANTS(GPIO_PAD_121, PAD_CONN_HRST_B, CONN_HRST_B, URXD1, PTA_RXD, RES4, CCU_UTXD_AO, TP_URXD1_AO, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 153: PINMUX_CONSTANTS(GPIO_PAD_122, PAD_MSDC0_CMD, MSDC0_CMD, PWRMCU_URXD2_AO, ANT_SEL1, RES4, RES5, RES6, DBG_MON_A12), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 154: PINMUX_CONSTANTS(GPIO_PAD_123, PAD_MSDC0_DAT0, MSDC0_DAT0, RES2, ANT_SEL0, RES4, RES5, RES6, DBG_MON_A13), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 155: PINMUX_CONSTANTS(GPIO_PAD_124, PAD_MSDC0_CLK, MSDC0_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_A14), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 156: PINMUX_CONSTANTS(GPIO_PAD_125, PAD_MSDC0_DAT2, MSDC0_DAT2, RES2, MRG_CLK, RES4, RES5, RES6, DBG_MON_A15), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 157: PINMUX_CONSTANTS(GPIO_PAD_126, PAD_MSDC0_DAT4, MSDC0_DAT4, RES2, ANT_SEL5, RES4, RES5, UFS_MPHY_SCL, DBG_MON_A16), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 158: PINMUX_CONSTANTS(GPIO_PAD_127, PAD_MSDC0_DAT6, MSDC0_DAT6, RES2, ANT_SEL4, RES4, RES5, UFS_MPHY_SDA, DBG_MON_A17), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 159: PINMUX_CONSTANTS(GPIO_PAD_128, PAD_MSDC0_DAT1, MSDC0_DAT1, RES2, ANT_SEL2, RES4, RES5, UFS_UNIPRO_SDA, DBG_MON_A18), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 160: PINMUX_CONSTANTS(GPIO_PAD_129, PAD_MSDC0_DAT5, MSDC0_DAT5, RES2, ANT_SEL3, RES4, RES5, UFS_UNIPRO_SCL, DBG_MON_A23), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 161: PINMUX_CONSTANTS(GPIO_PAD_130, PAD_MSDC0_DAT7, MSDC0_DAT7, RES2, MRG_DO, RES4, RES5, RES6, DBG_MON_A24), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 162: PINMUX_CONSTANTS(GPIO_PAD_131, PAD_MSDC0_DSL, MSDC0_DSL, RES2, MRG_SYNC, RES4, RES5, RES6, DBG_MON_A25), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 163: PINMUX_CONSTANTS(GPIO_PAD_132, PAD_MSDC0_DAT3, MSDC0_DAT3, RES2, MRG_DI, RES4, RES5, RES6, DBG_MON_A26), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 164: PINMUX_CONSTANTS(GPIO_PAD_133, PAD_MSDC0_RSTB, MSDC0_RSTB, RES2, AGPS_SYNC, RES4, RES5, RES6, DBG_MON_A27), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 165: PINMUX_CONSTANTS(GPIO_PAD_134, PAD_RTC32K_CK, RTC32K_CK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 166: PINMUX_CONSTANTS(GPIO_PAD_135, PAD_WATCHDOG, WATCHDOG, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 167: PINMUX_CONSTANTS(GPIO_PAD_136, PAD_AUD_CLK_MOSI, AUD_CLK_MOSI, AUD_CLK_MISO, I2S1_MCK, RES4, RES5, UFS_UNIPRO_SCL, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 168: PINMUX_CONSTANTS(GPIO_PAD_137, PAD_AUD_SYNC_MOSI, AUD_SYNC_MOSI, AUD_SYNC_MISO, I2S1_BCK, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 169: PINMUX_CONSTANTS(GPIO_PAD_138, PAD_AUD_DAT_MOSI0, AUD_DAT_MOSI0, AUD_DAT_MISO0, I2S1_LRCK, RES4, RES5, RES6, DBG_MON_B24), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 170: PINMUX_CONSTANTS(GPIO_PAD_139, PAD_AUD_DAT_MOSI1, AUD_DAT_MOSI1, AUD_DAT_MISO1, I2S1_DO, RES4, RES5, UFS_MPHY_SDA, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 171: PINMUX_CONSTANTS(GPIO_PAD_140, PAD_AUD_CLK_MISO, AUD_CLK_MISO, AUD_CLK_MOSI, I2S0_MCK, RES4, RES5, UFS_UNIPRO_SDA, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 172: PINMUX_CONSTANTS(GPIO_PAD_141, PAD_AUD_SYNC_MISO, AUD_SYNC_MISO, AUD_SYNC_MOSI, I2S0_BCK, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 173: PINMUX_CONSTANTS(GPIO_PAD_142, PAD_AUD_DAT_MISO0, AUD_DAT_MISO0, AUD_DAT_MOSI0, I2S0_LRCK, VOW_DAT_MISO, RES5, RES6, DBG_MON_B25), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 174: PINMUX_CONSTANTS(GPIO_PAD_143, PAD_AUD_DAT_MISO1, AUD_DAT_MISO1, AUD_DAT_MOSI1, I2S0_DI, VOW_CLK_MISO, RES5, UFS_MPHY_SCL, DBG_MON_B26), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 175: PINMUX_CONSTANTS(GPIO_PAD_144, PAD_PWRAP_SPI0_MI, PWRAP_SPI0_MI, PWRAP_SPI0_MO, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 176: PINMUX_CONSTANTS(GPIO_PAD_145, PAD_PWRAP_SPI0_CSN, PWRAP_SPI0_CSN, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 177: PINMUX_CONSTANTS(GPIO_PAD_146, PAD_PWRAP_SPI0_MO, PWRAP_SPI0_MO, PWRAP_SPI0_MI, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 178: PINMUX_CONSTANTS(GPIO_PAD_147, PAD_PWRAP_SPI0_CK, PWRAP_SPI0_CK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 179: PINMUX_CONSTANTS(GPIO_PAD_148, PAD_SRCLKENA0, SRCLKENA0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 180: PINMUX_CONSTANTS(GPIO_PAD_149, PAD_SRCLKENA1, SRCLKENA1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 181: PINMUX_CONSTANTS(GPIO_PAD_150, PAD_PERIPHERAL_EN0, PWM_A, CMFLASH, CLKM0, RES4, RES5, RES6, DBG_MON_B30), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 182: PINMUX_CONSTANTS(GPIO_PAD_151, PAD_PERIPHERAL_EN1, PWM_B, CMVREF0, CLKM1, RES4, RES5, RES6, DBG_MON_B20), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 183: PINMUX_CONSTANTS(GPIO_PAD_152, PAD_PERIPHERAL_EN2, PWM_C, CMFLASH, CLKM2, RES4, RES5, RES6, DBG_MON_B21), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 184: PINMUX_CONSTANTS(GPIO_PAD_153, PAD_PERIPHERAL_EN3, PWM_A, CMVREF0, CLKM3, RES4, RES5, RES6, DBG_MON_B22), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 185: PINMUX_CONSTANTS(GPIO_PAD_154, PAD_SCP_VREQ_VAO, SCP_VREQ_VAO, DVFSRC_EXT_REQ, RES3, RES4, RES5, RES6, DBG_MON_B18), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 186: PINMUX_CONSTANTS(GPIO_PAD_155, PAD_ANT_SEL0, ANT_SEL0, DVFSRC_EXT_REQ, CMVREF1, RES4, RES5, RES6, SCP_JTAG_TDI), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 187: PINMUX_CONSTANTS(GPIO_PAD_156, PAD_ANT_SEL1, ANT_SEL1, SRCLKENAI0, SCL6, KPCOL2, IDDIG, RES6, SCP_JTAG_TCK), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 188: PINMUX_CONSTANTS(GPIO_PAD_157, PAD_ANT_SEL2, ANT_SEL2, SRCLKENAI1, SDA6, KPROW2, USB_DRVVBUS, RES6, SCP_JTAG_TRSTN), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 189: PINMUX_CONSTANTS(GPIO_PAD_158, PAD_PERIPHERAL_EN6, ANT_SEL3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 190: PINMUX_CONSTANTS(GPIO_PAD_159, PAD_PERIPHERAL_EN7, ANT_SEL4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 191: PINMUX_CONSTANTS(GPIO_PAD_160, PAD_PERIPHERAL_EN8, ANT_SEL5, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 192: PINMUX_CONSTANTS(GPIO_PAD_161, PAD_SPI1_MI, SPI1_A_MI, SCP_SPI1_MI, IDDIG, ANT_SEL6, KPCOL2, PTA_RXD, DBG_MON_B19), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 193: PINMUX_CONSTANTS(GPIO_PAD_162, PAD_SPI1_CSB, SPI1_A_CSB, SCP_SPI1_CS, USB_DRVVBUS, ANT_SEL5, KPROW2, PTA_TXD, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 194: PINMUX_CONSTANTS(GPIO_PAD_163, PAD_SPI1_MO, SPI1_A_MO, SCP_SPI1_MO, SDA1, ANT_SEL4, CMMCLK2, DMIC_CLK, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 195: PINMUX_CONSTANTS(GPIO_PAD_164, PAD_SPI1_CLK, SPI1_A_CLK, SCP_SPI1_CK, SCL1, ANT_SEL3, CMMCLK3, DMIC_DAT, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 196: PINMUX_CONSTANTS(GPIO_PAD_165, PAD_PERIPHERAL_EN4, PWM_B, CMMCLK2, SCP_VREQ_VAO, RES4, RES5, TDM_MCK_2nd, SCP_JTAG_TDO), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 197: PINMUX_CONSTANTS(GPIO_PAD_166, PAD_PERIPHERAL_EN9, ANT_SEL6, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 198: PINMUX_CONSTANTS(GPIO_PAD_167, PAD_RFIC0_BSI_EN, RFIC0_BSI_EN, SPM_BSI_EN, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 199: PINMUX_CONSTANTS(GPIO_PAD_168, PAD_RFIC0_BSI_CK, RFIC0_BSI_CK, SPM_BSI_CK, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 200: PINMUX_CONSTANTS(GPIO_PAD_169, PAD_PERIPHERAL_EN5, PWM_C, CMMCLK3, CMVREF1, ANT_SEL7, AGPS_SYNC, TDM_BCK_2nd, SCP_JTAG_TMS), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 201: PINMUX_CONSTANTS(GPIO_PAD_170, PAD_I2S1_BCK, I2S1_BCK, I2S3_BCK, SCL7, I2S5_BCK, EXT_FRAME_SYNC, TDM_LRCK_2nd, ANT_SEL3), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 202: PINMUX_CONSTANTS(GPIO_PAD_171, PAD_I2S1_LRCK, I2S1_LRCK, I2S3_LRCK, SDA7, I2S5_LRCK, URXD1, TDM_DATA0_2nd, ANT_SEL4), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 203: PINMUX_CONSTANTS(GPIO_PAD_172, PAD_I2S1_DO, I2S1_DO, I2S3_DO, SCL8, I2S5_DO, UTXD1, TDM_DATA1_2nd, ANT_SEL5), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 204: PINMUX_CONSTANTS(GPIO_PAD_173, PAD_I2S1_MCK, I2S1_MCK, I2S3_MCK, SDA8, I2S5_MCK, UCTS0, TDM_DATA2_2nd, ANT_SEL6), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 205: PINMUX_CONSTANTS(GPIO_PAD_174, PAD_I2S2_DI, I2S2_DI, I2S0_DI, DVFSRC_EXT_REQ, I2S2_DI2, URTS0, TDM_DATA3_2nd, ANT_SEL7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 206: PINMUX_CONSTANTS(GPIO_PAD_175, PAD_PERIPHERAL_EN12, ANT_SEL7, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 207: PINMUX_CONSTANTS(GPIO_PAD_176, PAD_PERIPHERAL_EN13, RES1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 208: PINMUX_CONSTANTS(GPIO_PAD_177, PAD_PERIPHERAL_EN14, RES1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 209: PINMUX_CONSTANTS(GPIO_PAD_178, PAD_PERIPHERAL_EN10, RES1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27417/3/src/soc/mediatek/mt8183/include/soc… PS3, Line 210: PINMUX_CONSTANTS(GPIO_PAD_179, PAD_PERIPHERAL_EN11, RES1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters -- To view, visit https://review.coreboot.org/27417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia2b0d88e9b70c9ad148797d77dc9e79ce1bcb64a Gerrit-Change-Number: 27417 Gerrit-PatchSet: 3 Gerrit-Owner: Tristan Hsieh <tristan.shieh(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Joel Kitching <kitching(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ting Shen <phoenixshen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 12 Jul 2018 15:31:17 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mediatek: Share GPIO code among similar SOCs
by build bot (Jenkins) (Code Review) 12 Jul '18

12 Jul '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27416 ) Change subject: mediatek: Share GPIO code among similar SOCs ...................................................................... Patch Set 2: (135 comments) https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… File src/soc/mediatek/mt8173/include/soc/pinmux.h: https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 29: PINMUX_CONSTANTS(GPIO_PAD_0, EINT0, IRDA_PDN, I2S1_WS, AUD_SPDIF, UTXD0, RES5, RES6, DBG_MON_A_20), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 30: PINMUX_CONSTANTS(GPIO_PAD_1, EINT1, IRDA_RXD, I2S1_BCK, SDA5, URXD0, RES5, RES6, DBG_MON_A_21), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 31: PINMUX_CONSTANTS(GPIO_PAD_2, EINT2, IRDA_TXD, I2S1_MCK, SCL5, UTXD3, RES5, RES6, DBG_MON_A_22), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 32: PINMUX_CONSTANTS(GPIO_PAD_3, EINT3, DSI1_TE, I2S1_DO_1, SDA3, URXD3, RES5, RES6, DBG_MON_A_23), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 33: PINMUX_CONSTANTS(GPIO_PAD_4, EINT4, DISP_PWM1, I2S1_DO_2, SCL3, UCTS3, RES5, SFWP_B, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 34: PINMUX_CONSTANTS(GPIO_PAD_5, EINT5, PCM1_CLK, I2S2_WS, SPI_CK_3, URTS3, AP_MD32_JTAG_TMS, SFOUT, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 35: PINMUX_CONSTANTS(GPIO_PAD_6, EINT6, PCM1_SYNC, I2S2_BCK, SPI_MI_3, RES4, AP_MD32_JTAG_TCK, SFCS0, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 36: PINMUX_CONSTANTS(GPIO_PAD_7, EINT7, PCM1_DI, I2S2_DI_1, SPI_MO_3, RES4, AP_MD32_JTAG_TDI, SFHOLD, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 37: PINMUX_CONSTANTS(GPIO_PAD_8, EINT8, PCM1_DO, I2S2_DI_2, SPI_CS_3, AUD_SPDIF, AP_MD32_JTAG_TDO, SFIN, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 38: PINMUX_CONSTANTS(GPIO_PAD_9, EINT9, USB_DRVVBUS_P0, I2S2_MCK, RES3, USB_DRVVBUS_P1, AP_MD32_JTAG_TRST, SFCK, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 39: PINMUX_CONSTANTS(GPIO_PAD_10, EINT10, CLKM0, DSI1_TE, DISP_PWM1, PWM4, IRDA_RXD, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 40: PINMUX_CONSTANTS(GPIO_PAD_11, EINT11, CLKM1, I2S3_WS, USB_DRVVBUS_P0, PWM5, IRDA_TXD, USB_DRVVBUS_P1, DBG_MON_B_30), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 41: PINMUX_CONSTANTS(GPIO_PAD_12, EINT12, CLKM2, I2S3_BCK, SRCLKENA0, RES4, I2S2_WS, RES6, DBG_MON_B_32), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 42: PINMUX_CONSTANTS(GPIO_PAD_13, EINT13, CLKM3, I2S3_MCK, SRCLKENA0, RES4, I2S2_BCK, RES6, DBG_MON_A_32), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 43: PINMUX_CONSTANTS(GPIO_PAD_14, EINT14, CMDAT0, CMCSD0, RES3, CLKM2, RES5, RES6, DBG_MON_B_6), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 44: PINMUX_CONSTANTS(GPIO_PAD_15, EINT15, CMDAT1, CMCSD1, CMFLASH, CLKM3, RES5, RES6, DBG_MON_B_29), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 45: PINMUX_CONSTANTS(GPIO_PAD_16, IDDIG, IDDIG, CMFLASH, RES3, PWM5, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 46: PINMUX_CONSTANTS(GPIO_PAD_17, WATCHDOG, WATCHDOG_AO, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 47: PINMUX_CONSTANTS(GPIO_PAD_18, CEC, CEC, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 48: PINMUX_CONSTANTS(GPIO_PAD_19, HDMISCK, HDMISCK, HDCP_SCL, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 49: PINMUX_CONSTANTS(GPIO_PAD_20, HDMISD, HDMISD, HDCP_SDA, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 50: PINMUX_CONSTANTS(GPIO_PAD_21, HTPLG, HTPLG, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 51: PINMUX_CONSTANTS(GPIO_PAD_22, MSDC3_DAT0, MSDC3_DAT0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 52: PINMUX_CONSTANTS(GPIO_PAD_23, MSDC3_DAT1, MSDC3_DAT1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 53: PINMUX_CONSTANTS(GPIO_PAD_24, MSDC3_DAT2, MSDC3_DAT2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 54: PINMUX_CONSTANTS(GPIO_PAD_25, MSDC3_DAT3, MSDC3_DAT3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 55: PINMUX_CONSTANTS(GPIO_PAD_26, MSDC3_CLK, MSDC3_CLK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 56: PINMUX_CONSTANTS(GPIO_PAD_27, MSDC3_CMD, MSDC3_CMD, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 57: PINMUX_CONSTANTS(GPIO_PAD_28, MSDC3_DSL, MSDC3_DSL, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 58: PINMUX_CONSTANTS(GPIO_PAD_29, UCTS2, UCTS2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 59: PINMUX_CONSTANTS(GPIO_PAD_30, URTS2, URTS2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 60: PINMUX_CONSTANTS(GPIO_PAD_31, URXD2, URXD2, UTXD2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 61: PINMUX_CONSTANTS(GPIO_PAD_32, UTXD2, UTXD2, URXD2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 62: PINMUX_CONSTANTS(GPIO_PAD_33, DAICLK, MRG_CLK, PCM0_CLK, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 63: PINMUX_CONSTANTS(GPIO_PAD_34, DAIPCMIN, MRG_DI, PCM0_DI, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 64: PINMUX_CONSTANTS(GPIO_PAD_35, DAIPCMOUT, MRG_DO, PCM0_DO, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 65: PINMUX_CONSTANTS(GPIO_PAD_36, DAISYNC, MRG_SYNC, PCM0_SYNC, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 66: PINMUX_CONSTANTS(GPIO_PAD_37, EINT16, USB_DRVVBUS_P0, USB_DRVVBUS_P1, PWM0, PWM1, PWM2, CLKM0, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 67: PINMUX_CONSTANTS(GPIO_PAD_38, CONN_RST, USB_DRVVBUS_P0, USB_DRVVBUS_P1, RES3, RES4, RES5, CLKM1, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 68: PINMUX_CONSTANTS(GPIO_PAD_39, CM2MCLK, CM2MCLK, CMCSD0, RES3, RES4, RES5, RES6, DBG_MON_A_17), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 69: PINMUX_CONSTANTS(GPIO_PAD_40, CMPCLK, CMPCLK, CMCSK, CMCSD2, RES4, RES5, RES6, DBG_MON_A_18), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 70: PINMUX_CONSTANTS(GPIO_PAD_41, CMMCLK, CMMCLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_19), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 71: PINMUX_CONSTANTS(GPIO_PAD_42, DSI_TE, DSI_TE, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 72: PINMUX_CONSTANTS(GPIO_PAD_43, SDA2, SDA2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 73: PINMUX_CONSTANTS(GPIO_PAD_44, SCL2, SCL2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 74: PINMUX_CONSTANTS(GPIO_PAD_45, SDA0, SDA0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 75: PINMUX_CONSTANTS(GPIO_PAD_46, SCL0, SCL0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 76: PINMUX_CONSTANTS(GPIO_PAD_47, RDN0_A, CMDAT2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 77: PINMUX_CONSTANTS(GPIO_PAD_48, RDP0_A, CMDAT3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 78: PINMUX_CONSTANTS(GPIO_PAD_49, RDN1_A, CMDAT4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 79: PINMUX_CONSTANTS(GPIO_PAD_50, RDP1_A, CMDAT5, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 80: PINMUX_CONSTANTS(GPIO_PAD_51, RCN_A, CMDAT6, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 81: PINMUX_CONSTANTS(GPIO_PAD_52, RCP_A, CMDAT7, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 82: PINMUX_CONSTANTS(GPIO_PAD_53, RDN2_A, CMDAT8, CMCSD3, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 83: PINMUX_CONSTANTS(GPIO_PAD_54, RDP2_A, CMDAT9, CMCSD2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 84: PINMUX_CONSTANTS(GPIO_PAD_55, RDN3_A, CMHSYNC, CMCSD1, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 85: PINMUX_CONSTANTS(GPIO_PAD_56, RDP3_A, CMVSYNC, CMCSD0, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 86: PINMUX_CONSTANTS(GPIO_PAD_57, MSDC0_DAT0, MSDC0_DAT0, I2S1_WS, RES3, RES4, RES5, RES6, DBG_MON_B_7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 87: PINMUX_CONSTANTS(GPIO_PAD_58, MSDC0_DAT1, MSDC0_DAT1, I2S1_BCK, RES3, RES4, RES5, RES6, DBG_MON_B_8), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 88: PINMUX_CONSTANTS(GPIO_PAD_59, MSDC0_DAT2, MSDC0_DAT2, I2S1_MCK, RES3, RES4, RES5, RES6, DBG_MON_B_9), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 89: PINMUX_CONSTANTS(GPIO_PAD_60, MSDC0_DAT3, MSDC0_DAT3, I2S1_DO_1, RES3, RES4, RES5, RES6, DBG_MON_B_10), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 90: PINMUX_CONSTANTS(GPIO_PAD_61, MSDC0_DAT4, MSDC0_DAT4, I2S1_DO_2, RES3, RES4, RES5, RES6, DBG_MON_B_11), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 91: PINMUX_CONSTANTS(GPIO_PAD_62, MSDC0_DAT5, MSDC0_DAT5, I2S2_WS, RES3, RES4, RES5, RES6, DBG_MON_B_12), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 92: PINMUX_CONSTANTS(GPIO_PAD_63, MSDC0_DAT6, MSDC0_DAT6, I2S2_BCK, RES3, RES4, RES5, RES6, DBG_MON_B_13), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 93: PINMUX_CONSTANTS(GPIO_PAD_64, MSDC0_DAT7, MSDC0_DAT7, I2S2_DI_1, RES3, RES4, RES5, RES6, DBG_MON_B_14), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 94: PINMUX_CONSTANTS(GPIO_PAD_65, MSDC0_CLK, MSDC0_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_16), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 95: PINMUX_CONSTANTS(GPIO_PAD_66, MSDC0_CMD, MSDC0_CMD, I2S2_DI_2, RES3, RES4, RES5, RES6, DBG_MON_B_15), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 96: PINMUX_CONSTANTS(GPIO_PAD_67, MSDC0_DSL, MSDC0_DSL, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_17), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 97: PINMUX_CONSTANTS(GPIO_PAD_68, MSDC0_RST, MSDC0_RSTB, I2S2_MCK, RES3, RES4, RES5, RES6, DBG_MON_B_18), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 98: PINMUX_CONSTANTS(GPIO_PAD_69, SPI_CK, SPI_CK_0, I2S3_DO_1, PWM0, PWM5, I2S2_MCK, RES6, DBG_MON_B_19), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 99: PINMUX_CONSTANTS(GPIO_PAD_70, SPI_MI, SPI_MI_0, I2S3_DO_2, PWM1, SPI_MO_0, I2S2_DI_1, DSI1_TE, DBG_MON_B_20), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 100: PINMUX_CONSTANTS(GPIO_PAD_71, SPI_MO, SPI_MO_0, I2S3_DO_3, PWM2, SPI_MI_0, I2S2_DI_2, RES6, DBG_MON_B_21), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 101: PINMUX_CONSTANTS(GPIO_PAD_72, SPI_CS, SPI_CS_0, I2S3_DO_4, PWM3, PWM6, DISP_PWM1, RES6, DBG_MON_B_22), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 102: PINMUX_CONSTANTS(GPIO_PAD_73, MSDC1_DAT0, MSDC1_DAT0, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_24), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 103: PINMUX_CONSTANTS(GPIO_PAD_74, MSDC1_DAT1, MSDC1_DAT1, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_25), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 104: PINMUX_CONSTANTS(GPIO_PAD_75, MSDC1_DAT2, MSDC1_DAT2, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_26), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 105: PINMUX_CONSTANTS(GPIO_PAD_76, MSDC1_DAT3, MSDC1_DAT3, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_27), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 106: PINMUX_CONSTANTS(GPIO_PAD_77, MSDC1_CLK, MSDC1_CLK, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_28), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 107: PINMUX_CONSTANTS(GPIO_PAD_78, MSDC1_CMD, MSDC1_CMD, RES2, RES3, RES4, RES5, RES6, DBG_MON_B_23), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 108: PINMUX_CONSTANTS(GPIO_PAD_79, PWRAP_SPI0_MI, PWRAP_SPIMI, PWRAP_SPIMO, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 109: PINMUX_CONSTANTS(GPIO_PAD_80, PWRAP_SPI0_MO, PWRAP_SPIMO, PWRAP_SPIMI, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 110: PINMUX_CONSTANTS(GPIO_PAD_81, PWRAP_SPI0_CK, PWRAP_SPICK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 111: PINMUX_CONSTANTS(GPIO_PAD_82, PWRAP_SPI0_CSN, PWRAP_SPICS, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 112: PINMUX_CONSTANTS(GPIO_PAD_83, AUD_CLK_MOSI, AUD_CLK_MOSI, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 113: PINMUX_CONSTANTS(GPIO_PAD_84, AUD_DAT_MISO, AUD_DAT_MISO, AUD_DAT_MOSI, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 114: PINMUX_CONSTANTS(GPIO_PAD_85, AUD_DAT_MOSI, AUD_DAT_MOSI, AUD_DAT_MISO, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 115: PINMUX_CONSTANTS(GPIO_PAD_86, RTC32K_CK, RTC32K_CK, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 116: PINMUX_CONSTANTS(GPIO_PAD_87, DISP_PWM0, DISP_PWM0, DISP_PWM1, RES3, RES4, RES5, RES6, DBG_MON_B_31), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 117: PINMUX_CONSTANTS(GPIO_PAD_88, SRCLKENAI, SRCLKENAI, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 118: PINMUX_CONSTANTS(GPIO_PAD_89, SRCLKENAI2, SRCLKENAI2, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 119: PINMUX_CONSTANTS(GPIO_PAD_90, SRCLKENA0, SRCLKENA0, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 120: PINMUX_CONSTANTS(GPIO_PAD_91, SRCLKENA1, SRCLKENA1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 121: PINMUX_CONSTANTS(GPIO_PAD_92, PCM_CLK, PCM1_CLK, I2S0_BCK, RES3, RES4, RES5, RES6, DBG_MON_A_24), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 122: PINMUX_CONSTANTS(GPIO_PAD_93, PCM_SYNC, PCM1_SYNC, I2S0_WS, RES3, RES4, RES5, RES6, DBG_MON_A_25), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 123: PINMUX_CONSTANTS(GPIO_PAD_94, PCM_RX, PCM1_DI, I2S0_DI, RES3, RES4, RES5, RES6, DBG_MON_A_26), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 124: PINMUX_CONSTANTS(GPIO_PAD_95, PCM_TX, PCM1_DO, I2S0_DO, RES3, RES4, RES5, RES6, DBG_MON_A_27), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 125: PINMUX_CONSTANTS(GPIO_PAD_96, URXD1, URXD1, UTXD1, RES3, RES4, RES5, RES6, DBG_MON_A_28), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 126: PINMUX_CONSTANTS(GPIO_PAD_97, UTXD1, UTXD1, URXD1, RES3, RES4, RES5, RES6, DBG_MON_A_29), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 127: PINMUX_CONSTANTS(GPIO_PAD_98, URTS1, URTS1, UCTS1, RES3, RES4, RES5, RES6, DBG_MON_A_30), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 128: PINMUX_CONSTANTS(GPIO_PAD_99, UCTS1, UCTS1, URTS1, RES3, RES4, RES5, RES6, DBG_MON_A_31), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 129: PINMUX_CONSTANTS(GPIO_PAD_100, MSDC2_DAT0, MSDC2_DAT0, RES2, USB_DRVVBUS_P0, SDA5, USB_DRVVBUS_P1, RES6, DBG_MON_B_0), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 130: PINMUX_CONSTANTS(GPIO_PAD_101, MSDC2_DAT1, MSDC2_DAT1, RES2, AUD_SPDIF, SCL5, RES5, RES6, DBG_MON_B_1), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 131: PINMUX_CONSTANTS(GPIO_PAD_102, MSDC2_DAT2, MSDC2_DAT2, RES2, UTXD0, RES4, PWM0, SPI_CK_1, DBG_MON_B_2), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 132: PINMUX_CONSTANTS(GPIO_PAD_103, MSDC2_DAT3, MSDC2_DAT3, RES2, URXD0, RES4, PWM1, SPI_MI_1, DBG_MON_B_3), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 133: PINMUX_CONSTANTS(GPIO_PAD_104, MSDC2_CLK, MSDC2_CLK, RES2, UTXD3, SDA3, PWM2, SPI_MO_1, DBG_MON_B_4), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 134: PINMUX_CONSTANTS(GPIO_PAD_105, MSDC2_CMD, MSDC2_CMD, RES2, URXD3, SCL3, PWM3, SPI_CS_1, DBG_MON_B_5), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 135: PINMUX_CONSTANTS(GPIO_PAD_106, SDA3, SDA3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 136: PINMUX_CONSTANTS(GPIO_PAD_107, SCL3, SCL3, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 137: PINMUX_CONSTANTS(GPIO_PAD_108, JTMS, JTMS, MFG_JTAG_TMS, RES3, RES4, AP_MD32_JTAG_TMS, DFD_TMS, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 138: PINMUX_CONSTANTS(GPIO_PAD_109, JTCK, JTCK, MFG_JTAG_TCK, RES3, RES4, AP_MD32_JTAG_TCK, DFD_TCK, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 139: PINMUX_CONSTANTS(GPIO_PAD_110, JTDI, JTDI, MFG_JTAG_TDI, RES3, RES4, AP_MD32_JTAG_TDI, DFD_TDI, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 140: PINMUX_CONSTANTS(GPIO_PAD_111, JTDO, JTDO, MFG_JTAG_TDO, RES3, RES4, AP_MD32_JTAG_TDO, DFD_TDO, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 141: PINMUX_CONSTANTS(GPIO_PAD_112, JTRST_B, JTRST_B, MFG_JTAG_TRSTN, RES3, RES4, AP_MD32_JTAG_TRST, DFD_NTRST, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 142: PINMUX_CONSTANTS(GPIO_PAD_113, URXD0, URXD0, UTXD0, RES3, RES4, RES5, I2S2_WS, DBG_MON_A_0), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 143: PINMUX_CONSTANTS(GPIO_PAD_114, UTXD0, UTXD0, URXD0, RES3, RES4, RES5, I2S2_BCK, DBG_MON_A_1), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 144: PINMUX_CONSTANTS(GPIO_PAD_115, URTS0, URTS0, UCTS0, RES3, RES4, RES5, I2S2_MCK, DBG_MON_A_2), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 145: PINMUX_CONSTANTS(GPIO_PAD_116, UCTS0, UCTS0, URTS0, RES3, RES4, RES5, I2S2_DI_1, DBG_MON_A_3), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 146: PINMUX_CONSTANTS(GPIO_PAD_117, URXD3, URXD3, UTXD3, RES3, RES4, RES5, RES6, DBG_MON_A_9), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 147: PINMUX_CONSTANTS(GPIO_PAD_118, UTXD3, UTXD3, URXD3, RES3, RES4, RES5, RES6, DBG_MON_A_10), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 148: PINMUX_CONSTANTS(GPIO_PAD_119, KPROW0, KROW0, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_11), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 149: PINMUX_CONSTANTS(GPIO_PAD_120, KPROW1, KROW1, RES2, PWM6, RES4, RES5, RES6, DBG_MON_A_12), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 150: PINMUX_CONSTANTS(GPIO_PAD_121, KPROW2, KROW2, IRDA_PDN, USB_DRVVBUS_P0, PWM4, USB_DRVVBUS_P1, RES6, DBG_MON_A_13), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 151: PINMUX_CONSTANTS(GPIO_PAD_122, KPCOL0, KCOL0, RES2, RES3, RES4, RES5, RES6, DBG_MON_A_14), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 152: PINMUX_CONSTANTS(GPIO_PAD_123, KPCOL1, KCOL1, IRDA_RXD, PWM5, RES4, RES5, RES6, DBG_MON_A_15), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 153: PINMUX_CONSTANTS(GPIO_PAD_124, KPCOL2, KCOL2, IRDA_TXD, USB_DRVVBUS_P0, PWM3, USB_DRVVBUS_P1, RES6, DBG_MON_A_16), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 154: PINMUX_CONSTANTS(GPIO_PAD_125, SDA1, SDA1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 155: PINMUX_CONSTANTS(GPIO_PAD_126, SCL1, SCL1, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 156: PINMUX_CONSTANTS(GPIO_PAD_127, LCM_RST, LCM_RST, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 157: PINMUX_CONSTANTS(GPIO_PAD_128, I2S0_LRCK, I2S0_WS, I2S1_WS, I2S2_WS, RES4, SPI_CK_2, RES6, DBG_MON_A_4), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 158: PINMUX_CONSTANTS(GPIO_PAD_129, I2S0_BCK, I2S0_BCK, I2S1_BCK, I2S2_BCK, RES4, SPI_MI_2, RES6, DBG_MON_A_5), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 159: PINMUX_CONSTANTS(GPIO_PAD_130, I2S0_MCK, I2S0_MCK, I2S1_MCK, I2S2_MCK, RES4, SPI_MO_2, RES6, DBG_MON_A_6), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 160: PINMUX_CONSTANTS(GPIO_PAD_131, I2S0_DATA0, I2S0_DO, I2S1_DO_1, I2S2_DI_1, RES4, SPI_CS_2, RES6, DBG_MON_A_7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 161: PINMUX_CONSTANTS(GPIO_PAD_132, I2S0_DATA1, I2S0_DI, I2S1_DO_2, I2S2_DI_2, RES4, RES5, RES6, DBG_MON_A_8), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 162: PINMUX_CONSTANTS(GPIO_PAD_133, SDA4, SDA4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters https://review.coreboot.org/#/c/27416/2/src/soc/mediatek/mt8173/include/soc… PS2, Line 163: PINMUX_CONSTANTS(GPIO_PAD_134, SCL4, SCL4, RES2, RES3, RES4, RES5, RES6, RES7), line over 80 characters -- To view, visit https://review.coreboot.org/27416 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icdd1f2a1dd1bd64a7218bf9c63bd4a0af1acbcc0 Gerrit-Change-Number: 27416 Gerrit-PatchSet: 2 Gerrit-Owner: Tristan Hsieh <tristan.shieh(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Joel Kitching <kitching(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ting Shen <phoenixshen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 12 Jul 2018 15:31:01 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: Coverity: Fix CID1393976
by Philipp Deppenwiese (Code Review) 12 Jul '18

12 Jul '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/27447 ) Change subject: Coverity: Fix CID1393976 ...................................................................... Coverity: Fix CID1393976 Cast to u64 to prevent possible integer overflow. Change-Id: I5c7d25278db54523242314cba6c85ac2f7a6c1f3 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/27447 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/soc/cavium/cn81xx/clock.c 1 file changed, 2 insertions(+), 2 deletions(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved diff --git a/src/soc/cavium/cn81xx/clock.c b/src/soc/cavium/cn81xx/clock.c index bd6514c..02f152f 100644 --- a/src/soc/cavium/cn81xx/clock.c +++ b/src/soc/cavium/cn81xx/clock.c @@ -63,7 +63,7 @@ rst_boot.u = read64((void *)RST_PF_BAR0); - return rst_boot.s.pnr_mul * PLL_REF_CLK; + return ((u64)rst_boot.s.pnr_mul) * PLL_REF_CLK; } /** @@ -75,5 +75,5 @@ rst_boot.u = read64((void *)RST_PF_BAR0); - return rst_boot.s.c_mul * PLL_REF_CLK; + return ((u64)rst_boot.s.c_mul) * PLL_REF_CLK; } -- To view, visit https://review.coreboot.org/27447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I5c7d25278db54523242314cba6c85ac2f7a6c1f3 Gerrit-Change-Number: 27447 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: Coverity: Fix CID1393976
by Philipp Deppenwiese (Code Review) 12 Jul '18

12 Jul '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/27447 ) Change subject: Coverity: Fix CID1393976 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/27447 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5c7d25278db54523242314cba6c85ac2f7a6c1f3 Gerrit-Change-Number: 27447 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 12 Jul 2018 15:22:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Coverity: Fix CID1393978
by Philipp Deppenwiese (Code Review) 12 Jul '18

12 Jul '18

Philipp Deppenwiese has submitted this change and it was merged. ( https://review.coreboot.org/27446 ) Change subject: Coverity: Fix CID1393978 ...................................................................... Coverity: Fix CID1393978 Fix a typo. Only memcpy into target buffer if pointer is not NULL. Change-Id: I1aa4b2ce1843e53ab6ed2224eaa928fc79ea3b83 Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> Reviewed-on: https://review.coreboot.org/27446 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/vendorcode/cavium/bdk/libbdk-hal/device/bdk-device.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Philipp Deppenwiese: Looks good to me, approved diff --git a/src/vendorcode/cavium/bdk/libbdk-hal/device/bdk-device.c b/src/vendorcode/cavium/bdk/libbdk-hal/device/bdk-device.c index a8e65f0..0df70eb 100644 --- a/src/vendorcode/cavium/bdk/libbdk-hal/device/bdk-device.c +++ b/src/vendorcode/cavium/bdk/libbdk-hal/device/bdk-device.c @@ -519,7 +519,7 @@ { int grow = device_list_max + DEVICE_GROW; bdk_device_t *tmp = malloc(grow * sizeof(bdk_device_t)); - if (!tmp) + if (tmp) memcpy(tmp, device_list, device_list_max * sizeof(bdk_device_t)); free(device_list); if (tmp == NULL) -- To view, visit https://review.coreboot.org/27446 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I1aa4b2ce1843e53ab6ed2224eaa928fc79ea3b83 Gerrit-Change-Number: 27446 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit July 2018