coreboot-gerrit November 2018

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Change in coreboot[master]: mb/lenovo/x220: Add x1 as a variant
by Bill XIE (Code Review) 13 Nov '18

13 Nov '18

Bill XIE has posted comments on this change. ( https://review.coreboot.org/29434 ) Change subject: mb/lenovo/x220: Add x1 as a variant ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… File src/mainboard/lenovo/x220/variants/x1/overridetree.cb: https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… PS8, Line 1: chip northbridge/intel/sandybridge > looks like this a normal devicetree, not an overridetree There just are a lot of parameters needing to be override. You can compare this with the base tree src/mainboard/lenovo/x220/devicetree.cb, and you can see a lot of values are absent here. -- To view, visit https://review.coreboot.org/29434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1 Gerrit-Change-Number: 29434 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 12:29:37 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/lenovo/x220: Add x1 as a variant
by Patrick Rudolph (Code Review) 13 Nov '18

13 Nov '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29434 ) Change subject: mb/lenovo/x220: Add x1 as a variant ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… File src/mainboard/lenovo/x220/variants/x1/overridetree.cb: https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… PS8, Line 1: chip northbridge/intel/sandybridge looks like this a normal devicetree, not an overridetree -- To view, visit https://review.coreboot.org/29434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1 Gerrit-Change-Number: 29434 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 12:12:18 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/lenovo/x60/dsdt: Remove unused include
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29068 ) Change subject: mb/lenovo/x60/dsdt: Remove unused include ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/29068 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4666a8c9dd0e03ee32770844019dfc032e07e460 Gerrit-Change-Number: 29068 Gerrit-PatchSet: 2 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 10:23:32 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/{lenovo, roda}: Remove DISPLAY_DEVICE_2_IS_LCD_SCREEN macro
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29537 ) Change subject: mb/{lenovo,roda}: Remove DISPLAY_DEVICE_2_IS_LCD_SCREEN macro ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29537 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iabf927d8462673cb96851c01318d826d4c422e0d Gerrit-Change-Number: 29537 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 10:20:28 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/*/*/Kconfig: Don't specify devicetree path if default val used
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29625 ) Change subject: mb/*/*/Kconfig: Don't specify devicetree path if default val used ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3d77a625c5ece7b7ea5476fe0bd42829d1fc72c4 Gerrit-Change-Number: 29625 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Comment-Date: Tue, 13 Nov 2018 10:17:23 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/*/*/Kconfig: Don't specify devicetree path if default val used
by Peter Lemenkov (Code Review) 13 Nov '18

13 Nov '18

Peter Lemenkov has uploaded this change for review. ( https://review.coreboot.org/29625 Change subject: mb/*/*/Kconfig: Don't specify devicetree path if default val used ...................................................................... mb/*/*/Kconfig: Don't specify devicetree path if default val used Change-Id: I3d77a625c5ece7b7ea5476fe0bd42829d1fc72c4 Signed-off-by: Peter Lemenkov <lemenkov(a)gmail.com> --- M src/mainboard/cavium/cn8100_sff_evb/Kconfig M src/mainboard/google/gru/Kconfig M src/mainboard/intel/leafhill/Kconfig M src/mainboard/opencellular/elgon/Kconfig 4 files changed, 0 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/29625/1 diff --git a/src/mainboard/cavium/cn8100_sff_evb/Kconfig b/src/mainboard/cavium/cn8100_sff_evb/Kconfig index c67c362..744155c 100644 --- a/src/mainboard/cavium/cn8100_sff_evb/Kconfig +++ b/src/mainboard/cavium/cn8100_sff_evb/Kconfig @@ -61,9 +61,6 @@ ########################################################## #### Update below when adding a new derivative board. #### ########################################################## -config DEVICETREE - string - default "devicetree.cb" config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig index fee2dd0..49944a8 100644 --- a/src/mainboard/google/gru/Kconfig +++ b/src/mainboard/google/gru/Kconfig @@ -105,7 +105,6 @@ config DEVICETREE string default "devicetree.scarlet.cb" if BOARD_GOOGLE_SCARLET - default "devicetree.cb" config MAINBOARD_PART_NUMBER string diff --git a/src/mainboard/intel/leafhill/Kconfig b/src/mainboard/intel/leafhill/Kconfig index 79ee3d0..94d0493 100644 --- a/src/mainboard/intel/leafhill/Kconfig +++ b/src/mainboard/intel/leafhill/Kconfig @@ -11,10 +11,6 @@ string default intel/leafhill -config DEVICETREE - string - default "devicetree.cb" - config MAINBOARD_PART_NUMBER string default "Leafhill" diff --git a/src/mainboard/opencellular/elgon/Kconfig b/src/mainboard/opencellular/elgon/Kconfig index 3e0a125..3ba2a60 100644 --- a/src/mainboard/opencellular/elgon/Kconfig +++ b/src/mainboard/opencellular/elgon/Kconfig @@ -80,9 +80,6 @@ ########################################################## #### Update below when adding a new derivative board. #### ########################################################## -config DEVICETREE - string - default "devicetree.cb" config MAINBOARD_PART_NUMBER string -- To view, visit https://review.coreboot.org/29625 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3d77a625c5ece7b7ea5476fe0bd42829d1fc72c4 Gerrit-Change-Number: 29625 Gerrit-PatchSet: 1 Gerrit-Owner: Peter Lemenkov <lemenkov(a)gmail.com>

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Change in coreboot[master]: siemens/mc_apl4: Overwrite swizzle data for LPDDR4
by Mario Scheithauer (Code Review) 13 Nov '18

13 Nov '18

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/29624 Change subject: siemens/mc_apl4: Overwrite swizzle data for LPDDR4 ...................................................................... siemens/mc_apl4: Overwrite swizzle data for LPDDR4 This mainboard is equipped with LPDDR4 modules. The corresponding memory swizzle data must be set for this purpose. Change-Id: I4017de0713f0df5e614086912fc39d8eb6562702 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc A src/mainboard/siemens/mc_apl1/variants/mc_apl4/memory.c 2 files changed, 70 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/29624/1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc index f3c87b2..caf542f 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/Makefile.inc @@ -1 +1,3 @@ +romstage-y += memory.c + ramstage-y += mainboard.c diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl4/memory.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/memory.c new file mode 100644 index 0000000..9820f1e --- /dev/null +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl4/memory.c @@ -0,0 +1,68 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * Copyright (C) 2017-2018 Siemens AG + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <baseboard/variants.h> +#include <commonlib/helpers.h> +#include <soc/meminit.h> + +const struct lpddr4_swizzle_cfg mc_apl4_lpddr4_swizzle = { + /* CH0_DQA[0:31] SoC pins -> U22 LPDDR4 module pins */ + .phys[LP4_PHYS_CH0A] = { + /* DQA[0:7] pins of LPDDR4 module. */ + .dqs[LP4_DQS0] = { 0, 1, 5, 3, 4, 7, 6, 2 }, + /* DQA[8:15] pins of LPDDR4 module. */ + .dqs[LP4_DQS1] = { 11, 15, 14, 9, 8, 12, 13, 10 }, + /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS2] = { 16, 22, 23, 21, 19, 17, 18, 20 }, + /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS3] = { 30, 26, 31, 25, 24, 27, 28, 29 }, + }, + .phys[LP4_PHYS_CH0B] = { + /* DQA[0:7] pins of LPDDR4 module. */ + .dqs[LP4_DQS0] = { 7, 3, 2, 1, 4, 0, 6, 5 }, + /* DQA[8:15] pins of LPDDR4 module. */ + .dqs[LP4_DQS1] = { 14, 8, 9, 15, 10, 13, 12, 11 }, + /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS2] = { 23, 21, 20, 16, 19, 17, 18, 22 }, + /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS3] = { 24, 25, 26, 28, 29, 31, 30, 27 }, + }, + .phys[LP4_PHYS_CH1A] = { + /* DQA[0:7] pins of LPDDR4 module. */ + .dqs[LP4_DQS0] = { 6, 3, 1, 7, 4, 2, 5, 0 }, + /* DQA[8:15] pins of LPDDR4 module. */ + .dqs[LP4_DQS1] = { 14, 15, 12, 13, 11, 8, 10, 9 }, + /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS2] = { 16, 22, 17, 18, 20, 21, 23, 19 }, + /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS3] = { 31, 28, 26, 25, 29, 24, 27, 30 }, + }, + .phys[LP4_PHYS_CH1B] = { + /* DQA[0:7] pins of LPDDR4 module. */ + .dqs[LP4_DQS0] = { 3, 5, 7, 4, 1, 0, 6, 2 }, + /* DQA[8:15] pins of LPDDR4 module. */ + .dqs[LP4_DQS1] = { 14, 13, 10, 11, 15, 9, 8, 12 }, + /* DQB[0:7] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS2] = { 23, 18, 19, 22, 16, 17, 21, 20 }, + /* DQB[7:15] pins of LPDDR4 module with offset of 16. */ + .dqs[LP4_DQS3] = { 24, 31, 30, 29, 26, 27, 25, 28 }, + }, +}; + +const struct lpddr4_swizzle_cfg *variant_lpddr4_swizzle_config(void) +{ + return &mc_apl4_lpddr4_swizzle; +} -- To view, visit https://review.coreboot.org/29624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4017de0713f0df5e614086912fc39d8eb6562702 Gerrit-Change-Number: 29624 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>

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Change in coreboot[master]: oc/intel/quark/Kconfig: Remove unused MMCOMF_SUPPORT_DEFAULT
by Patrick Rudolph (Code Review) 13 Nov '18

13 Nov '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29609 ) Change subject: oc/intel/quark/Kconfig: Remove unused MMCOMF_SUPPORT_DEFAULT ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29609 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I24596b7b4f3e7caef7f42e4317a786caa42c5c2d Gerrit-Change-Number: 29609 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 09:11:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: drivers/intel/fsp1_1: Remove unused DISPLAY_FAST_BOOT_DATA
by Patrick Rudolph (Code Review) 13 Nov '18

13 Nov '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29617 ) Change subject: drivers/intel/fsp1_1: Remove unused DISPLAY_FAST_BOOT_DATA ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29617 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I405b79ee192317c86725f9bf0b1d166c045d30e2 Gerrit-Change-Number: 29617 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 09:11:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src: Add required space after "switch"
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29623 Change subject: src: Add required space after "switch" ...................................................................... src: Add required space after "switch" Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/riscv/trap_handler.c M src/cpu/via/nano/update_ucode.c M src/device/device_util.c M src/drivers/aspeed/common/ast_main.c M src/drivers/xgi/common/xgi_coreboot.c M src/mainboard/amd/inagua/BiosCallOuts.c M src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c M src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c M src/mainboard/amd/serengeti_cheetah_fam10/mptable.c M src/mainboard/amd/torpedo/BiosCallOuts.c M src/mainboard/apple/macbook21/smihandler.c M src/mainboard/google/link/i915.c M src/mainboard/google/link/mainboard.c M src/mainboard/kontron/ktqm77/mainboard.c M src/mainboard/lenovo/t60/smihandler.c M src/mainboard/lenovo/x60/smihandler.c M src/mainboard/lenovo/z61t/smihandler.c M src/northbridge/amd/agesa/family14/amdfam14_conf.c M src/northbridge/amd/agesa/family15tn/northbridge.c M src/northbridge/amd/agesa/family16kb/northbridge.c M src/northbridge/amd/amdht/h3ncmn.c M src/northbridge/amd/amdht/ht_wrapper.c M src/northbridge/intel/x4x/raminit_ddr23.c M src/soc/intel/skylake/romstage/romstage_fsp20.c M src/superio/fintek/f71863fg/superio.c M src/superio/fintek/f71869ad/superio.c M src/superio/fintek/f71872/superio.c M src/superio/fintek/f81216h/early_serial.c M src/superio/fintek/f81216h/superio.c M src/superio/ite/it8728f/superio.c M src/superio/nsc/pc87360/superio.c M src/superio/nsc/pc87366/superio.c M src/superio/nsc/pc87382/superio.c M src/superio/nsc/pc87417/superio.c M src/superio/nsc/pc97317/superio.c M src/superio/nuvoton/nct5104d/superio.c M src/superio/nuvoton/nct5572d/superio.c M src/superio/nuvoton/nct6779d/superio.c M src/superio/nuvoton/wpcm450/superio.c M src/superio/smsc/dme1737/superio.c M src/superio/smsc/lpc47b272/superio.c M src/superio/smsc/lpc47b397/superio.c M src/superio/smsc/lpc47m10x/superio.c M src/superio/smsc/lpc47m15x/superio.c M src/superio/smsc/lpc47n217/early_serial.c M src/superio/smsc/lpc47n217/superio.c M src/superio/smsc/mec1308/superio.c M src/superio/smsc/sch4037/superio.c M src/superio/winbond/w83627dhg/superio.c M src/superio/winbond/w83627ehg/superio.c M src/superio/winbond/w83627hf/superio.c M src/superio/winbond/w83627thg/superio.c M src/superio/winbond/w83627uhg/superio.c M src/superio/winbond/w83667hg-a/superio.c M src/superio/winbond/w83977tf/superio.c 55 files changed, 67 insertions(+), 67 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/29623/1 diff --git a/src/arch/riscv/trap_handler.c b/src/arch/riscv/trap_handler.c index 73c5278..e072bf7 100644 --- a/src/arch/riscv/trap_handler.c +++ b/src/arch/riscv/trap_handler.c @@ -125,7 +125,7 @@ return; } - switch(tf->cause) { + switch (tf->cause) { case CAUSE_MISALIGNED_FETCH: case CAUSE_FETCH_ACCESS: case CAUSE_ILLEGAL_INSTRUCTION: diff --git a/src/cpu/via/nano/update_ucode.c b/src/cpu/via/nano/update_ucode.c index cb7d1e0..0ccddc7 100644 --- a/src/cpu/via/nano/update_ucode.c +++ b/src/cpu/via/nano/update_ucode.c @@ -73,7 +73,7 @@ static void nano_print_ucode_status(ucode_update_status stat) { - switch(stat) + switch (stat) { case UCODE_UPDATE_SUCCESS: printk(BIOS_INFO, "Microcode update successful.\n"); diff --git a/src/device/device_util.c b/src/device/device_util.c index 2a26a55..38207eb 100644 --- a/src/device/device_util.c +++ b/src/device/device_util.c @@ -168,7 +168,7 @@ if (!dev) { memcpy(buffer, "<null>", 7); } else { - switch(dev->path.type) { + switch (dev->path.type) { case DEVICE_PATH_NONE: memcpy(buffer, "NONE", 5); break; diff --git a/src/drivers/aspeed/common/ast_main.c b/src/drivers/aspeed/common/ast_main.c index 264ef9d..3a0cf20 100644 --- a/src/drivers/aspeed/common/ast_main.c +++ b/src/drivers/aspeed/common/ast_main.c @@ -195,7 +195,7 @@ } /* Print stuff for diagnostic purposes */ - switch(ast->tx_chip_type) { + switch (ast->tx_chip_type) { case AST_TX_SIL164: DRM_INFO("Using Sil164 TMDS transmitter\n"); break; diff --git a/src/drivers/xgi/common/xgi_coreboot.c b/src/drivers/xgi/common/xgi_coreboot.c index 47320fd..d2acb60 100644 --- a/src/drivers/xgi/common/xgi_coreboot.c +++ b/src/drivers/xgi/common/xgi_coreboot.c @@ -379,7 +379,7 @@ xgi_fb.reserved_mask_pos = 0; xgi_fb.reserved_mask_size = 0; - switch(xgifb_info->video_bpp){ + switch (xgifb_info->video_bpp) { case 32: case 24: /* packed into 4-byte words */ diff --git a/src/mainboard/amd/inagua/BiosCallOuts.c b/src/mainboard/amd/inagua/BiosCallOuts.c index c995cff..b6267a6 100644 --- a/src/mainboard/amd/inagua/BiosCallOuts.c +++ b/src/mainboard/amd/inagua/BiosCallOuts.c @@ -91,7 +91,7 @@ TempData8 |= Data8; Write64Mem8(GpioMmioAddr+SB_GPIO_REG179, TempData8); - switch(MemData->ParameterListPtr->DDR3Voltage){ + switch (MemData->ParameterListPtr->DDR3Voltage) { case VOLT1_35: Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); Data8 &= ~(UINT8)BIT6; diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c index 9f273a4..03b849d 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/acpi_tables.c @@ -150,7 +150,7 @@ current = ALIGN(current, 8); printk(BIOS_DEBUG, "ACPI: * SSDT for PCI%c at %lx\n", c, current); /* pci0 and pci1 are in dsdt */ ssdtx = (acpi_header_t *)current; - switch(sysconf.hcid[i]) { + switch (sysconf.hcid[i]) { case 1: file_name = CONFIG_CBFS_PREFIX "/ssdt2.aml"; break; diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c b/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c index adf43c0..4e84fb2 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/get_bus_conf.c @@ -151,7 +151,7 @@ /* check hcid type here */ sysconf.hcid[i] = get_hcid(i); - switch(sysconf.hcid[i]) { + switch (sysconf.hcid[i]) { case 1: /* 8132 */ case 3: /* 8131 */ diff --git a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c index d9596da..fb9473f 100644 --- a/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c +++ b/src/mainboard/amd/serengeti_cheetah_fam10/mptable.c @@ -70,7 +70,7 @@ if (!(sysconf.pci1234[i] & 0x1)) continue; - switch(sysconf.hcid[i]) { + switch (sysconf.hcid[i]) { case 1: case 3: dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); @@ -137,7 +137,7 @@ int jj; struct device *dev; struct resource *res; - switch(sysconf.hcid[i]) { + switch (sysconf.hcid[i]) { case 1: case 3: dev = dev_find_slot(m->bus_8132a[j][0], PCI_DEVFN(m->sbdn3a[j], 1)); diff --git a/src/mainboard/amd/torpedo/BiosCallOuts.c b/src/mainboard/amd/torpedo/BiosCallOuts.c index 56c48c8..e7b0e29 100644 --- a/src/mainboard/amd/torpedo/BiosCallOuts.c +++ b/src/mainboard/amd/torpedo/BiosCallOuts.c @@ -63,7 +63,7 @@ AcpiMmioAddr = (UINT32)Data16 << 16; GpioMmioAddr = AcpiMmioAddr + GPIO_BASE; - switch(MemData->ParameterListPtr->DDR3Voltage){ + switch (MemData->ParameterListPtr->DDR3Voltage) { case VOLT1_35: Data8 = Read64Mem8 (GpioMmioAddr+SB_GPIO_REG178); Data8 &= ~(UINT8)BIT6; diff --git a/src/mainboard/apple/macbook21/smihandler.c b/src/mainboard/apple/macbook21/smihandler.c index 93920f2..ab33801 100644 --- a/src/mainboard/apple/macbook21/smihandler.c +++ b/src/mainboard/apple/macbook21/smihandler.c @@ -49,7 +49,7 @@ int mainboard_smi_apmc(u8 data) { - switch(data) { + switch (data) { case APM_CNT_ACPI_ENABLE: /* route H8SCI to SCI */ gpi_route_interrupt(GPE_EC_SCI, GPI_IS_SCI); diff --git a/src/mainboard/google/link/i915.c b/src/mainboard/google/link/i915.c index 8bd758b..e09785d 100644 --- a/src/mainboard/google/link/i915.c +++ b/src/mainboard/google/link/i915.c @@ -161,7 +161,7 @@ return index; /* state machine! */ for(i = index, id = &iodefs[i]; id->op; i++, id++){ - switch(id->op){ + switch (id->op) { case M: if (verbose & vmsg) printk(BIOS_SPEW, "%ld: %s\n", globalmicroseconds(), id->msg); @@ -193,7 +193,7 @@ if (id->addr == PCH_PP_CONTROL){ if (verbose & vio) printk(BIOS_SPEW, "PCH_PP_CONTROL\n"); - switch(id->data & 0xf){ + switch (id->data & 0xf) { case 8: break; case 7: break; default: udelay(100000); diff --git a/src/mainboard/google/link/mainboard.c b/src/mainboard/google/link/mainboard.c index 367e288..4919e6b 100644 --- a/src/mainboard/google/link/mainboard.c +++ b/src/mainboard/google/link/mainboard.c @@ -58,7 +58,7 @@ printk(BIOS_DEBUG, "%s: INT15 function %04x!\n", __func__, X86_AX); - switch(X86_AX) { + switch (X86_AX) { case 0x5f34: /* * Set Panel Fitting Hook: diff --git a/src/mainboard/kontron/ktqm77/mainboard.c b/src/mainboard/kontron/ktqm77/mainboard.c index 3a37290..37f0240 100644 --- a/src/mainboard/kontron/ktqm77/mainboard.c +++ b/src/mainboard/kontron/ktqm77/mainboard.c @@ -39,7 +39,7 @@ printk(BIOS_DEBUG, "%s: AX=%04x BX=%04x CX=%04x DX=%04x\n", __func__, X86_AX, X86_BX, X86_CX, X86_DX); - switch(X86_EAX & 0xffff) { + switch (X86_EAX & 0xffff) { case 0x5f34: /* * Set Panel Fitting Hook: diff --git a/src/mainboard/lenovo/t60/smihandler.c b/src/mainboard/lenovo/t60/smihandler.c index bccb7f1..4e6a68d 100644 --- a/src/mainboard/lenovo/t60/smihandler.c +++ b/src/mainboard/lenovo/t60/smihandler.c @@ -119,7 +119,7 @@ event = ec_query(); printk(BIOS_DEBUG, "EC event %02x\n", event); - switch(event) { + switch (event) { /* brightness up */ case 0x14: mainboard_smi_brightness_up(); @@ -153,7 +153,7 @@ int mainboard_smi_apmc(u8 data) { - switch(data) { + switch (data) { case APM_CNT_ACPI_ENABLE: /* use 0x1600/0x1604 to prevent races with userspace */ ec_set_ports(0x1604, 0x1600); diff --git a/src/mainboard/lenovo/x60/smihandler.c b/src/mainboard/lenovo/x60/smihandler.c index c66474d..6d95ee1 100644 --- a/src/mainboard/lenovo/x60/smihandler.c +++ b/src/mainboard/lenovo/x60/smihandler.c @@ -121,7 +121,7 @@ event = ec_query(); printk(BIOS_DEBUG, "EC event %02x\n", event); - switch(event) { + switch (event) { /* brightness up */ case 0x14: mainboard_smi_brightness_up(); @@ -158,7 +158,7 @@ int mainboard_smi_apmc(u8 data) { - switch(data) { + switch (data) { case APM_CNT_ACPI_ENABLE: /* use 0x1600/0x1604 to prevent races with userspace */ ec_set_ports(0x1604, 0x1600); diff --git a/src/mainboard/lenovo/z61t/smihandler.c b/src/mainboard/lenovo/z61t/smihandler.c index b93f48e..253ab44 100644 --- a/src/mainboard/lenovo/z61t/smihandler.c +++ b/src/mainboard/lenovo/z61t/smihandler.c @@ -121,7 +121,7 @@ event = ec_query(); printk(BIOS_DEBUG, "EC event %02x\n", event); - switch(event) { + switch (event) { /* brightness up */ case 0x14: mainboard_smi_brightness_up(); @@ -155,7 +155,7 @@ int mainboard_smi_apmc(u8 data) { - switch(data) { + switch (data) { case APM_CNT_ACPI_ENABLE: /* use 0x1600/0x1604 to prevent races with userspace */ ec_set_ports(0x1604, 0x1600); diff --git a/src/northbridge/amd/agesa/family14/amdfam14_conf.c b/src/northbridge/amd/agesa/family14/amdfam14_conf.c index f78e3f5..0eabaa8 100644 --- a/src/northbridge/amd/agesa/family14/amdfam14_conf.c +++ b/src/northbridge/amd/agesa/family14/amdfam14_conf.c @@ -126,7 +126,7 @@ { u32 new_vendev = vendev; - switch(vendev) { + switch (vendev) { case 0x10029809: case 0x10029808: case 0x10029807: diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c index 7248eb7..1186ec1 100644 --- a/src/northbridge/amd/agesa/family15tn/northbridge.c +++ b/src/northbridge/amd/agesa/family15tn/northbridge.c @@ -965,7 +965,7 @@ { u32 new_vendev = vendev; - switch(vendev) { + switch (vendev) { case 0x10029900: /* AMD Radeon HD 7660G (Trinity) */ case 0x10029901: /* AMD Radeon HD 7660D (Trinity) */ case 0x10029903: /* AMD Radeon HD 7640G (Trinity) */ diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c index a42ee5c..2df2626 100644 --- a/src/northbridge/amd/agesa/family16kb/northbridge.c +++ b/src/northbridge/amd/agesa/family16kb/northbridge.c @@ -990,7 +990,7 @@ { u32 new_vendev = vendev; - switch(vendev) { + switch (vendev) { case 0x10029830: case 0x10029831: case 0x10029832: diff --git a/src/northbridge/amd/amdht/h3ncmn.c b/src/northbridge/amd/amdht/h3ncmn.c index 1294bb3..1bf9d29 100644 --- a/src/northbridge/amd/amdht/h3ncmn.c +++ b/src/northbridge/amd/amdht/h3ncmn.c @@ -1253,7 +1253,7 @@ ******************************************************************************/ static u8 convertBitsToWidth(u8 value, cNorthBridge *nb) { - switch(value) { + switch (value) { case 1: return 16; case 0: return 8; case 5: return 4; diff --git a/src/northbridge/amd/amdht/ht_wrapper.c b/src/northbridge/amd/amdht/ht_wrapper.c index 05b8d12..d005223 100644 --- a/src/northbridge/amd/amdht/ht_wrapper.c +++ b/src/northbridge/amd/amdht/ht_wrapper.c @@ -132,7 +132,7 @@ } printk(log_level, ": "); - switch(event) { + switch (event) { case HT_EVENT_COH_EVENTS: case HT_EVENT_COH_NO_TOPOLOGY: case HT_EVENT_COH_LINK_EXCEED: diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c index 4e5c0ce..32fa0d9 100644 --- a/src/northbridge/intel/x4x/raminit_ddr23.c +++ b/src/northbridge/intel/x4x/raminit_ddr23.c @@ -820,7 +820,7 @@ FOR_EACH_POPULATED_CHANNEL(s->dimms, i) { const struct dll_setting *setting; - switch(s->selected_timings.mem_clk) { + switch (s->selected_timings.mem_clk) { default: /* Should not happen */ case MEM_CLOCK_667MHz: setting = default_ddr2_667_ctrl; diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 0945780..6407584 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -101,7 +101,7 @@ if (src_dimm->Status != DIMM_PRESENT) continue; - switch(memory_info_hob->MemoryType) { + switch (memory_info_hob->MemoryType) { case MRC_DDR_TYPE_DDR4: ddr_type = MEMORY_DEVICE_DDR4; break; diff --git a/src/superio/fintek/f71863fg/superio.c b/src/superio/fintek/f71863fg/superio.c index bfa0aee..b178d20 100644 --- a/src/superio/fintek/f71863fg/superio.c +++ b/src/superio/fintek/f71863fg/superio.c @@ -30,7 +30,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71863FG_KBC: res0 = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c index 7fc4db4..ac99ea9 100644 --- a/src/superio/fintek/f71869ad/superio.c +++ b/src/superio/fintek/f71869ad/superio.c @@ -31,7 +31,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71869AD_KBC: pc_keyboard_init(NO_AUX_DEVICE); diff --git a/src/superio/fintek/f71872/superio.c b/src/superio/fintek/f71872/superio.c index f26a0c6..9b22c4d 100644 --- a/src/superio/fintek/f71872/superio.c +++ b/src/superio/fintek/f71872/superio.c @@ -29,7 +29,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case F71872_KBC: pc_keyboard_init(NO_AUX_DEVICE); diff --git a/src/superio/fintek/f81216h/early_serial.c b/src/superio/fintek/f81216h/early_serial.c index 782a9ea..9e8e48b 100644 --- a/src/superio/fintek/f81216h/early_serial.c +++ b/src/superio/fintek/f81216h/early_serial.c @@ -38,7 +38,7 @@ void f81216h_enable_serial(pnp_devfn_t dev, u16 iobase, mode_key k) { u8 key; - switch(k) { + switch (k) { case MODE_6767: key = 0x67; break; diff --git a/src/superio/fintek/f81216h/superio.c b/src/superio/fintek/f81216h/superio.c index 2791876..e55ec57 100644 --- a/src/superio/fintek/f81216h/superio.c +++ b/src/superio/fintek/f81216h/superio.c @@ -40,7 +40,7 @@ * * See page 17 of data sheet. */ - switch(conf->conf_key_mode) { + switch (conf->conf_key_mode) { case MODE_6767: case MODE_7777: case MODE_8787: @@ -74,7 +74,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case F81216H_SP1: case F81216H_SP2: case F81216H_SP3: diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c index 912a4c3..cbf4208 100644 --- a/src/superio/ite/it8728f/superio.c +++ b/src/superio/ite/it8728f/superio.c @@ -34,7 +34,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for FDC etc. */ case IT8728F_EC: res = find_resource(dev, PNP_IDX_IO0); diff --git a/src/superio/nsc/pc87360/superio.c b/src/superio/nsc/pc87360/superio.c index 85ccdea..5961c54 100644 --- a/src/superio/nsc/pc87360/superio.c +++ b/src/superio/nsc/pc87360/superio.c @@ -29,7 +29,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case PC87360_KBCK: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/nsc/pc87366/superio.c b/src/superio/nsc/pc87366/superio.c index 6883e81..eb85ca0 100644 --- a/src/superio/nsc/pc87366/superio.c +++ b/src/superio/nsc/pc87366/superio.c @@ -29,7 +29,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case PC87366_KBCK: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/nsc/pc87382/superio.c b/src/superio/nsc/pc87382/superio.c index 8e0d61c..0cbd3cc 100644 --- a/src/superio/nsc/pc87382/superio.c +++ b/src/superio/nsc/pc87382/superio.c @@ -28,7 +28,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case PC87382_DOCK: break; diff --git a/src/superio/nsc/pc87417/superio.c b/src/superio/nsc/pc87417/superio.c index 73b7655..2201d5c 100644 --- a/src/superio/nsc/pc87417/superio.c +++ b/src/superio/nsc/pc87417/superio.c @@ -30,7 +30,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case PC87417_KBCK: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/nsc/pc97317/superio.c b/src/superio/nsc/pc97317/superio.c index c840ced..ad82168 100644 --- a/src/superio/nsc/pc97317/superio.c +++ b/src/superio/nsc/pc97317/superio.c @@ -27,7 +27,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case PC97317_KBCK: pnp_set_logical_device(dev); pnp_set_enable(dev, 0); /* Disable keyboard */ diff --git a/src/superio/nuvoton/nct5104d/superio.c b/src/superio/nuvoton/nct5104d/superio.c index 47687e1..bc9af3b 100644 --- a/src/superio/nuvoton/nct5104d/superio.c +++ b/src/superio/nuvoton/nct5104d/superio.c @@ -30,7 +30,7 @@ reg26 |= CR26_LOCK_REG; pnp_write_config(dev, GLOBAL_OPTION_CR26, reg26); - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { //SP1 (UARTA) IRQ type selection (1:level,0:edge) is controlled by CR 10, bit 5 case NCT5104D_SP1: reg10 = pnp_read_config(dev, IRQ_TYPE_SEL_CR10); @@ -116,7 +116,7 @@ pnp_enter_conf_mode(dev); - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case NCT5104D_SP1: case NCT5104D_SP2: set_irq_trigger_type(dev, conf->irq_trigger_type != 0); diff --git a/src/superio/nuvoton/nct5572d/superio.c b/src/superio/nuvoton/nct5572d/superio.c index 10542d5..c6d46bf 100644 --- a/src/superio/nuvoton/nct5572d/superio.c +++ b/src/superio/nuvoton/nct5572d/superio.c @@ -44,7 +44,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case NCT5572D_KBC: /* Enable mouse controller */ diff --git a/src/superio/nuvoton/nct6779d/superio.c b/src/superio/nuvoton/nct6779d/superio.c index 465ef66..e582496 100644 --- a/src/superio/nuvoton/nct6779d/superio.c +++ b/src/superio/nuvoton/nct6779d/superio.c @@ -32,7 +32,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case NCT6779D_KBC: pc_keyboard_init(NO_AUX_DEVICE); diff --git a/src/superio/nuvoton/wpcm450/superio.c b/src/superio/nuvoton/wpcm450/superio.c index 05078eb..5312a27 100644 --- a/src/superio/nuvoton/wpcm450/superio.c +++ b/src/superio/nuvoton/wpcm450/superio.c @@ -29,7 +29,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case WPCM450_KBCK: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/smsc/dme1737/superio.c b/src/superio/smsc/dme1737/superio.c index 42b9284..43f8cea 100644 --- a/src/superio/smsc/dme1737/superio.c +++ b/src/superio/smsc/dme1737/superio.c @@ -33,7 +33,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case DME1737_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c index ded4bb0..d2bf4f6 100644 --- a/src/superio/smsc/lpc47b272/superio.c +++ b/src/superio/smsc/lpc47b272/superio.c @@ -44,7 +44,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47B272_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/smsc/lpc47b397/superio.c b/src/superio/smsc/lpc47b397/superio.c index ab2271a..9e943ea 100644 --- a/src/superio/smsc/lpc47b397/superio.c +++ b/src/superio/smsc/lpc47b397/superio.c @@ -43,7 +43,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47B397_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; @@ -55,7 +55,7 @@ pnp_enable_resources(dev); pnp_enter_conf_mode(dev); - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47B397_HWM: printk(BIOS_DEBUG, "LPC47B397 SensorBus register access enabled\n"); pnp_set_logical_device(dev); diff --git a/src/superio/smsc/lpc47m10x/superio.c b/src/superio/smsc/lpc47m10x/superio.c index 18618d3..ddd6b9c 100644 --- a/src/superio/smsc/lpc47m10x/superio.c +++ b/src/superio/smsc/lpc47m10x/superio.c @@ -42,7 +42,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47M10X2_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/smsc/lpc47m15x/superio.c b/src/superio/smsc/lpc47m15x/superio.c index 41339c1..8c44d37 100644 --- a/src/superio/smsc/lpc47m15x/superio.c +++ b/src/superio/smsc/lpc47m15x/superio.c @@ -64,7 +64,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47M15X_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/smsc/lpc47n217/early_serial.c b/src/superio/smsc/lpc47n217/early_serial.c index 454d77f..f9ff04e 100644 --- a/src/superio/smsc/lpc47n217/early_serial.c +++ b/src/superio/smsc/lpc47n217/early_serial.c @@ -43,7 +43,7 @@ /* LPC47N217 requires base ports to be a multiple of 4. */ ASSERT(!(iobase & 0x3)); - switch(dev & 0xFF) { + switch (dev & 0xFF) { case LPC47N217_PP: pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff); break; @@ -74,7 +74,7 @@ { u8 power_register = 0, power_mask = 0, current_power, new_power; - switch(dev & 0xFF) { + switch (dev & 0xFF) { case LPC47N217_PP: power_register = 0x01; power_mask = 0x04; diff --git a/src/superio/smsc/lpc47n217/superio.c b/src/superio/smsc/lpc47n217/superio.c index e63645e..0a14e4c 100644 --- a/src/superio/smsc/lpc47n217/superio.c +++ b/src/superio/smsc/lpc47n217/superio.c @@ -163,7 +163,7 @@ { ASSERT(!(iobase & 0x3)); - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47N217_PP: pnp_write_config(dev, 0x23, (iobase >> 2) & 0xff); break; @@ -201,7 +201,7 @@ u8 irq_config_register = 0, irq_config_mask = 0; u8 current_config, new_config; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47N217_PP: irq_config_register = 0x27; irq_config_mask = 0x0F; @@ -231,7 +231,7 @@ { u8 power_register = 0, power_mask = 0, current_power, new_power; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case LPC47N217_PP: power_register = 0x01; power_mask = 0x04; diff --git a/src/superio/smsc/mec1308/superio.c b/src/superio/smsc/mec1308/superio.c index 2f17deb..f1dca27 100644 --- a/src/superio/smsc/mec1308/superio.c +++ b/src/superio/smsc/mec1308/superio.c @@ -32,7 +32,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case MEC1308_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/smsc/sch4037/superio.c b/src/superio/smsc/sch4037/superio.c index 5165dd6..f618f0e 100644 --- a/src/superio/smsc/sch4037/superio.c +++ b/src/superio/smsc/sch4037/superio.c @@ -31,7 +31,7 @@ return; } - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case SCH4037_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/winbond/w83627dhg/superio.c b/src/superio/winbond/w83627dhg/superio.c index 23b73a2..363bcc4 100644 --- a/src/superio/winbond/w83627dhg/superio.c +++ b/src/superio/winbond/w83627dhg/superio.c @@ -38,7 +38,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83627DHG_SP2: w83627dhg_enable_UR2(dev); break; diff --git a/src/superio/winbond/w83627ehg/superio.c b/src/superio/winbond/w83627ehg/superio.c index db1f98e..04dda6e 100644 --- a/src/superio/winbond/w83627ehg/superio.c +++ b/src/superio/winbond/w83627ehg/superio.c @@ -83,7 +83,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83627EHG_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/winbond/w83627hf/superio.c b/src/superio/winbond/w83627hf/superio.c index 21c3016..e9cc13b 100644 --- a/src/superio/winbond/w83627hf/superio.c +++ b/src/superio/winbond/w83627hf/superio.c @@ -90,7 +90,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83627HF_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; @@ -110,7 +110,7 @@ pnp_enable_resources(dev); pnp_enter_conf_mode(dev); - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83627HF_HWM: printk(BIOS_DEBUG, "W83627HF HWM SMBus enabled\n"); enable_hwm_smbus(dev); diff --git a/src/superio/winbond/w83627thg/superio.c b/src/superio/winbond/w83627thg/superio.c index fb6e54d..956b080 100644 --- a/src/superio/winbond/w83627thg/superio.c +++ b/src/superio/winbond/w83627thg/superio.c @@ -31,7 +31,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83627THG_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; diff --git a/src/superio/winbond/w83627uhg/superio.c b/src/superio/winbond/w83627uhg/superio.c index f68aec9..891cd8b 100644 --- a/src/superio/winbond/w83627uhg/superio.c +++ b/src/superio/winbond/w83627uhg/superio.c @@ -59,7 +59,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83627UHG_SP1: set_uart_clock_source(dev, 0); break; diff --git a/src/superio/winbond/w83667hg-a/superio.c b/src/superio/winbond/w83667hg-a/superio.c index ceb783d..09859cf 100644 --- a/src/superio/winbond/w83667hg-a/superio.c +++ b/src/superio/winbond/w83667hg-a/superio.c @@ -44,7 +44,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { /* TODO: Might potentially need code for HWM or FDC etc. */ case W83667HG_A_KBC: /* Enable mouse controller */ diff --git a/src/superio/winbond/w83977tf/superio.c b/src/superio/winbond/w83977tf/superio.c index b0c838e..06b289b 100644 --- a/src/superio/winbond/w83977tf/superio.c +++ b/src/superio/winbond/w83977tf/superio.c @@ -32,7 +32,7 @@ if (!dev->enabled) return; - switch(dev->path.pnp.device) { + switch (dev->path.pnp.device) { case W83977TF_KBC: pc_keyboard_init(NO_AUX_DEVICE); break; -- To view, visit https://review.coreboot.org/29623 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I85cf93e30606bc7838852bd300a369e79370629a Gerrit-Change-Number: 29623 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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coreboot-gerrit November 2018