coreboot-gerrit November 2018

coreboot-gerrit@coreboot.org

1 participants
1699 discussions

Change in coreboot[master]: mb/cannonlake: Remove SmbusEnable from devicetree
by Duncan Laurie (Code Review) 13 Nov '18

13 Nov '18

Duncan Laurie has submitted this change and it was merged. ( https://review.coreboot.org/29551 ) Change subject: mb/cannonlake: Remove SmbusEnable from devicetree ...................................................................... mb/cannonlake: Remove SmbusEnable from devicetree Remove the SmbusEnable parameter from all Cannon Lake mainboards. Instead this will be determined by the enable state of the SMBUS PCI device. Change-Id: I7ece6768da4c517747af12a07012583575816ae1 Signed-off-by: Duncan Laurie <dlaurie(a)google.com> Reviewed-on: https://review.coreboot.org/29551 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/zoombini/variants/baseboard/devicetree.cb M src/mainboard/google/zoombini/variants/meowth/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb 7 files changed, 0 insertions(+), 7 deletions(-) Approvals: build bot (Jenkins): Verified Furquan Shaikh: Looks good to me, approved diff --git a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb index c7ef264..36c6595 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb @@ -20,7 +20,6 @@ # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" # Intel Common SoC Config diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb index c3a546e..b014353 100644 --- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb @@ -29,7 +29,6 @@ # FSP configuration register "SaGv" = "SaGv_Enabled" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" # Intel Common SoC Config diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index da439d5..bb963c9 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -6,7 +6,6 @@ # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index a1c8586..55afde2 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -6,7 +6,6 @@ # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb index 4a2fad9..35aa624 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_h/devicetree.cb @@ -7,7 +7,6 @@ # FSP configuration register "SaGv" = "3" register "RMT" = "1" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC5)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb index 2b47f00..bbfc9e7 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb @@ -7,7 +7,6 @@ # FSP configuration register "SaGv" = "3" register "RMT" = "1" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC4)" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb index da439d5..bb963c9 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb @@ -6,7 +6,6 @@ # FSP configuration register "SaGv" = "3" - register "SmbusEnable" = "1" register "ScsEmmcHs400Enabled" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC0)" -- To view, visit https://review.coreboot.org/29551 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I7ece6768da4c517747af12a07012583575816ae1 Gerrit-Change-Number: 29551 Gerrit-PatchSet: 2 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: mb/lenovo/x220: Add x1 as a variant
by Bill XIE (Code Review) 13 Nov '18

13 Nov '18

Bill XIE has posted comments on this change. ( https://review.coreboot.org/29434 ) Change subject: mb/lenovo/x220: Add x1 as a variant ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… File src/mainboard/lenovo/x220/variants/x1/overridetree.cb: https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… PS8, Line 17: subsystemid 0x17aa 0x21e8 > there's no reason to override the subsystemid. […] I am just reproducing the behavior of the vendor firmware which sets them to 17aa:21e8. -- To view, visit https://review.coreboot.org/29434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1 Gerrit-Change-Number: 29434 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 16:13:53 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: mb/{intel/google}: Make static IRQ mapping for PIC mode
by Subrata Banik (Code Review) 13 Nov '18

13 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29629 to look at the new patch set (#2). Change subject: mb/{intel/google}: Make static IRQ mapping for PIC mode ...................................................................... mb/{intel/google}: Make static IRQ mapping for PIC mode This patch makes static PIRQ->IRQ mapping, where IRQ10 is mapped to PBRC and IRQ11 is mapped for PARC/PCRC/PDRC/PERC/PFRC/PGRC/PHRC. Change-Id: I8722e34841fe53a4d425202b915ac7838af0d859 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/sarien/devicetree.cb M src/mainboard/google/zoombini/variants/baseboard/devicetree.cb M src/mainboard/google/zoombini/variants/meowth/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb M src/soc/intel/cannonlake/chip.h 10 files changed, 82 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29629/2 -- To view, visit https://review.coreboot.org/29629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I8722e34841fe53a4d425202b915ac7838af0d859 Gerrit-Change-Number: 29629 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: mb/{intel/google}: Make static IRQ mapping for PIC mode
by Subrata Banik (Code Review) 13 Nov '18

13 Nov '18

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/29629 Change subject: mb/{intel/google}: Make static IRQ mapping for PIC mode ...................................................................... mb/{intel/google}: Make static IRQ mapping for PIC mode This patch makes static PIRQ->IRQ mapping, where IRQ10 is mapped to PBRC and IRQ11 is mapped for PARC/PCRC/PDRC/PERC/PFRC/PGRC/PHRC. Change-Id: I8722e34841fe53a4d425202b915ac7838af0d859 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- M src/mainboard/google/sarien/variants/arcada/devicetree.cb M src/mainboard/google/sarien/variants/sarien/devicetree.cb M src/mainboard/google/zoombini/variants/baseboard/devicetree.cb M src/mainboard/google/zoombini/variants/meowth/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb M src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb 9 files changed, 81 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29629/1 diff --git a/src/mainboard/google/sarien/variants/arcada/devicetree.cb b/src/mainboard/google/sarien/variants/arcada/devicetree.cb index ee1cca0..29c644a 100644 --- a/src/mainboard/google/sarien/variants/arcada/devicetree.cb +++ b/src/mainboard/google/sarien/variants/arcada/devicetree.cb @@ -28,6 +28,15 @@ register "SkipExtGfxScan" = "1" register "VmxEnable" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "speed_shift_enable" = "1" register "s0ix_enable" = "1" diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index b33c923..13143f1 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -28,6 +28,15 @@ register "SkipExtGfxScan" = "1" register "VmxEnable" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "speed_shift_enable" = "1" register "s0ix_enable" = "1" diff --git a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb index c7ef264..592f2aa 100644 --- a/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/baseboard/devicetree.cb @@ -18,6 +18,15 @@ device lapic 0 on end end + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + # FSP configuration register "SaGv" = "3" register "SmbusEnable" = "1" diff --git a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb index c3a546e..af7c01b 100644 --- a/src/mainboard/google/zoombini/variants/meowth/devicetree.cb +++ b/src/mainboard/google/zoombini/variants/meowth/devicetree.cb @@ -27,6 +27,15 @@ device lapic 0 on end end + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + # FSP configuration register "SaGv" = "SaGv_Enabled" register "SmbusEnable" = "1" diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index da439d5..d255b16 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -30,6 +30,15 @@ register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index a1c8586..40d8802 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -32,6 +32,15 @@ register "PchHdaAudioLinkSsp0" = "1" register "PchHdaAudioLinkSsp1" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb index 2b47f00..aa04c60 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_s/devicetree.cb @@ -46,6 +46,15 @@ register "SataPortsEnable[6]" = "1" register "SataPortsEnable[7]" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "PchHdaDspEnable" = "0" register "PchHdaAudioLinkHda" = "1" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb index da439d5..d255b16 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/cfl_u/devicetree.cb @@ -30,6 +30,15 @@ register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" diff --git a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb index 010ad65..3ae8700 100644 --- a/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb +++ b/src/mainboard/intel/coffeelake_rvp/variants/whl_u/devicetree.cb @@ -40,6 +40,15 @@ register "PchHdaDspEnable" = "1" register "PchHdaAudioLinkHda" = "1" + register "pirqa_routing" = "PCH_IRQ11" + register "pirqb_routing" = "PCH_IRQ10" + register "pirqc_routing" = "PCH_IRQ11" + register "pirqd_routing" = "PCH_IRQ11" + register "pirqe_routing" = "PCH_IRQ11" + register "pirqf_routing" = "PCH_IRQ11" + register "pirqg_routing" = "PCH_IRQ11" + register "pirqh_routing" = "PCH_IRQ11" + register "PcieRpEnable[0]" = "1" register "PcieRpEnable[1]" = "1" register "PcieRpEnable[2]" = "1" -- To view, visit https://review.coreboot.org/29629 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I8722e34841fe53a4d425202b915ac7838af0d859 Gerrit-Change-Number: 29629 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

1 0

Change in coreboot[master]: soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices
by Subrata Banik (Code Review) 13 Nov '18

13 Nov '18

Subrata Banik has uploaded this change for review. ( https://review.coreboot.org/29628 Change subject: soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices ...................................................................... soc/intel/cannonlake: Make static IRQ mapping for CNP PCH pci devices Since PIRQ->IRQ mapping registers PxRC are not available after FSP-S call due to PCH requirement change from CNP PCH onwards, hence making static IRQ mapping for pci_irqs.asl and pcie.asl Also remove unused irqlinks.asl from soc/intel/cannonlake/acpi/ Change-Id: I35e2ed150a1db195fc9ce13897e65b23fc8b7ca1 Signed-off-by: Subrata Banik <subrata.banik(a)intel.com> --- D src/soc/intel/cannonlake/acpi/irqlinks.asl M src/soc/intel/cannonlake/acpi/pci_irqs.asl M src/soc/intel/cannonlake/acpi/pcie.asl M src/soc/intel/cannonlake/acpi/southbridge.asl 4 files changed, 51 insertions(+), 332 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/29628/1 diff --git a/src/soc/intel/cannonlake/acpi/irqlinks.asl b/src/soc/intel/cannonlake/acpi/irqlinks.asl deleted file mode 100644 index 0403ea0..0000000 --- a/src/soc/intel/cannonlake/acpi/irqlinks.asl +++ /dev/null @@ -1,282 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2018 Intel Corporation. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -/* - * PIRQ routing control is in PCR ITSS region. - * - * Due to what appears to be an ACPI interpreter bug we do not use - * the PCRB() method here as it may not be defined yet because the method - * definiton depends on the order of the include files in pch.asl. - * - * https://bugs.acpica.org/show_bug.cgi?id=1201 - */ -OperationRegion (ITSS, SystemMemory, - Add (PCR_ITSS_PIRQA_ROUT, - Add (CONFIG_PCR_BASE_ADDRESS, - ShiftLeft (PID_ITSS, PCR_PORTID_SHIFT))), 8) -Field (ITSS, ByteAcc, NoLock, Preserve) -{ - PIRA, 8, /* PIRQA Routing Control */ - PIRB, 8, /* PIRQB Routing Control */ - PIRC, 8, /* PIRQC Routing Control */ - PIRD, 8, /* PIRQD Routing Control */ - PIRE, 8, /* PIRQE Routing Control */ - PIRF, 8, /* PIRQF Routing Control */ - PIRG, 8, /* PIRQG Routing Control */ - PIRH, 8, /* PIRQH Routing Control */ -} - -Name (IREN, 0x80) /* Interrupt Routing Enable */ -Name (IREM, 0x0f) /* Interrupt Routing Mask */ - -Device (LNKA) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 1) - - Method (_CRS, 0, Serialized) - { - Name (RTLA, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLA, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRA, ^^IREM), IRQ0) - - Return (RTLA) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRA, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKB) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 2) - - Method (_CRS, 0, Serialized) - { - Name (RTLB, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {10} - }) - CreateWordField (RTLB, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRB, ^^IREM), IRQ0) - - Return (RTLB) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRB, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKC) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 3) - - Method (_CRS, 0, Serialized) - { - Name (RTLC, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLC, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRC, ^^IREM), IRQ0) - - Return (RTLC) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRC, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKD) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 4) - - Method (_CRS, 0, Serialized) - { - Name (RTLD, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLD, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRD, ^^IREM), IRQ0) - - Return (RTLD) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRD, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKE) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 5) - - Method (_CRS, 0, Serialized) - { - Name (RTLE, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLE, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRE, ^^IREM), IRQ0) - - Return (RTLE) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRE, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKF) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 6) - - Method (_CRS, 0, Serialized) - { - Name (RTLF, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLF, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRF, ^^IREM), IRQ0) - - Return (RTLF) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRF, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKG) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 7) - - Method (_CRS, 0, Serialized) - { - Name (RTLG, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLG, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRG, ^^IREM), IRQ0) - - Return (RTLG) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRG, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} - -Device (LNKH) -{ - Name (_HID, EISAID ("PNP0C0F")) - Name (_UID, 8) - - Method (_CRS, 0, Serialized) - { - Name (RTLH, ResourceTemplate () - { - IRQ (Level, ActiveLow, Shared) {11} - }) - CreateWordField (RTLH, 1, IRQ0) - Store (Zero, IRQ0) - - /* Set the bit from PIRQ Routing Register */ - ShiftLeft (1, And (^^PIRH, ^^IREM), IRQ0) - - Return (RTLH) - } - - Method (_STA, 0, Serialized) - { - If (And (^^PIRH, ^^IREN)) { - Return (0x9) - } Else { - Return (0xb) - } - } -} diff --git a/src/soc/intel/cannonlake/acpi/pci_irqs.asl b/src/soc/intel/cannonlake/acpi/pci_irqs.asl index d346ce2..accfdb9 100644 --- a/src/soc/intel/cannonlake/acpi/pci_irqs.asl +++ b/src/soc/intel/cannonlake/acpi/pci_irqs.asl @@ -83,52 +83,56 @@ }) Name (PICN, Package () { + /* + * If the setting change in soc_pch_pirq_init(), then + * please make the same static IRQ changes here as well. + */ /* D31: cAVS, SMBus, GbE, Nothpeak */ - Package () { 0x001FFFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x001FFFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x001FFFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x001FFFFF, 3, \_SB.PCI0.LNKD, 0 }, - /* D32: Can't use PIC*/ + Package () { 0x001FFFFF, 0, 0, 11 }, + Package () { 0x001FFFFF, 1, 0, 10 }, + Package () { 0x001FFFFF, 2, 0, 11 }, + Package () { 0x001FFFFF, 3, 0, 11 }, + /* D30: Can't use PIC*/ /* D29: PCI Express Port 9-16 */ - Package () { 0x001DFFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x001DFFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x001DFFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x001DFFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x001DFFFF, 0, 0, 11 }, + Package () { 0x001DFFFF, 1, 0, 10 }, + Package () { 0x001DFFFF, 2, 0, 11 }, + Package () { 0x001DFFFF, 3, 0, 11 }, /* D28: PCI Express Port 1-8 */ - Package () { 0x001CFFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x001CFFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x001CFFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x001CFFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x001CFFFF, 0, 0, 11 }, + Package () { 0x001CFFFF, 1, 0, 10 }, + Package () { 0x001CFFFF, 2, 0, 11 }, + Package () { 0x001CFFFF, 3, 0, 11 }, /* D25: Can't use PIC*/ /* D23 */ - Package () { 0x0017FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0017FFFF, 0, 0, 11 }, /* D22: CSME (HECI, IDE-R, KT redirection */ - Package () { 0x0016FFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0016FFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0016FFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0016FFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x0016FFFF, 0, 0, 11 }, + Package () { 0x0016FFFF, 1, 0, 10 }, + Package () { 0x0016FFFF, 2, 0, 11 }, + Package () { 0x0016FFFF, 3, 0, 11 }, /* D21: Can't use PIC*/ /* D20: xHCI, OTG, SRAM, CNVi WiFi */ - Package () { 0x0014FFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0014FFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0014FFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0014FFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x0014FFFF, 0, 0, 11 }, + Package () { 0x0014FFFF, 1, 0, 10 }, + Package () { 0x0014FFFF, 2, 0, 11 }, + Package () { 0x0014FFFF, 3, 0, 11 }, /* D19: Can't use PIC*/ /* Thermal */ - Package () { 0x0012FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0012FFFF, 0, 0, 11 }, /* P.E.G. Root Port D1F0 */ - Package () { 0x0001FFFF, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0001FFFF, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0001FFFF, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0001FFFF, 3, \_SB.PCI0.LNKD, 0 }, + Package () { 0x0001FFFF, 0, 0, 11 }, + Package () { 0x0001FFFF, 1, 0, 10 }, + Package () { 0x0001FFFF, 2, 0, 11 }, + Package () { 0x0001FFFF, 3, 0, 11 }, /* SA IGFX Device */ - Package () { 0x0002FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0002FFFF, 0, 0, 11 }, /* SA Thermal Device */ - Package () { 0x0004FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0004FFFF, 0, 0, 11 }, /* SA IPU Device */ - Package () { 0x0005FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0005FFFF, 0, 0, 11 }, /* SA GNA Device */ - Package () { 0x0008FFFF, 0, \_SB.PCI0.LNKA, 0 }, + Package () { 0x0008FFFF, 0, 0, 11 }, }) Method (_PRT) diff --git a/src/soc/intel/cannonlake/acpi/pcie.asl b/src/soc/intel/cannonlake/acpi/pcie.asl index 69e16ca..9d4a65c 100644 --- a/src/soc/intel/cannonlake/acpi/pcie.asl +++ b/src/soc/intel/cannonlake/acpi/pcie.asl @@ -24,10 +24,10 @@ Package () { 0x0000ffff, 2, 0, 18 }, Package () { 0x0000ffff, 3, 0, 19 } }) Name (IQAP, Package () { - Package () { 0x0000ffff, 0, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0000ffff, 1, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0000ffff, 2, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0000ffff, 3, \_SB.PCI0.LNKD, 0 } }) + Package () { 0x0000ffff, 0, 0, 11 }, + Package () { 0x0000ffff, 1, 0, 10 }, + Package () { 0x0000ffff, 2, 0, 11 }, + Package () { 0x0000ffff, 3, 0, 11 } }) /* Interrupt Map INTA->INTB, INTB->INTC, INTC->INTD, INTD->INTA */ Name (IQBA, Package () { @@ -36,10 +36,10 @@ Package () { 0x0000ffff, 2, 0, 19 }, Package () { 0x0000ffff, 3, 0, 16 } }) Name (IQBP, Package () { - Package () { 0x0000ffff, 0, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0000ffff, 1, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0000ffff, 2, \_SB.PCI0.LNKD, 0 }, - Package () { 0x0000ffff, 3, \_SB.PCI0.LNKA, 0 } }) + Package () { 0x0000ffff, 0, 0, 10 }, + Package () { 0x0000ffff, 1, 0, 11 }, + Package () { 0x0000ffff, 2, 0, 11 }, + Package () { 0x0000ffff, 3, 0, 11 } }) /* Interrupt Map INTA->INTC, INTB->INTD, INTC->INTA, INTD->INTB */ Name (IQCA, Package () { @@ -48,10 +48,10 @@ Package () { 0x0000ffff, 2, 0, 16 }, Package () { 0x0000ffff, 3, 0, 17 } }) Name (IQCP, Package () { - Package () { 0x0000ffff, 0, \_SB.PCI0.LNKC, 0 }, - Package () { 0x0000ffff, 1, \_SB.PCI0.LNKD, 0 }, - Package () { 0x0000ffff, 2, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0000ffff, 3, \_SB.PCI0.LNKB, 0 } }) + Package () { 0x0000ffff, 0, 0, 11 }, + Package () { 0x0000ffff, 1, 0, 11 }, + Package () { 0x0000ffff, 2, 0, 11 }, + Package () { 0x0000ffff, 3, 0, 10 } }) /* Interrupt Map INTA->INTD, INTB->INTA, INTC->INTB, INTD->INTC */ Name (IQDA, Package () { @@ -60,10 +60,10 @@ Package () { 0x0000ffff, 2, 0, 17 }, Package () { 0x0000ffff, 3, 0, 18 } }) Name (IQDP, Package () { - Package () { 0x0000ffff, 0, \_SB.PCI0.LNKD, 0 }, - Package () { 0x0000ffff, 1, \_SB.PCI0.LNKA, 0 }, - Package () { 0x0000ffff, 2, \_SB.PCI0.LNKB, 0 }, - Package () { 0x0000ffff, 3, \_SB.PCI0.LNKC, 0 } }) + Package () { 0x0000ffff, 0, 0, 11 }, + Package () { 0x0000ffff, 1, 0, 11 }, + Package () { 0x0000ffff, 2, 0, 10 }, + Package () { 0x0000ffff, 3, 0, 11 } }) Switch (ToInteger (Arg0)) { diff --git a/src/soc/intel/cannonlake/acpi/southbridge.asl b/src/soc/intel/cannonlake/acpi/southbridge.asl index eabff66..dfa2975 100644 --- a/src/soc/intel/cannonlake/acpi/southbridge.asl +++ b/src/soc/intel/cannonlake/acpi/southbridge.asl @@ -20,9 +20,6 @@ #include <soc/itss.h> #include <soc/pcr_ids.h> -/* Interrupt Routing */ -#include "irqlinks.asl" - /* PCI IRQ assignment */ #include "pci_irqs.asl" -- To view, visit https://review.coreboot.org/29628 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I35e2ed150a1db195fc9ce13897e65b23fc8b7ca1 Gerrit-Change-Number: 29628 Gerrit-PatchSet: 1 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com>

1 0

Change in coreboot[master]: soc/amd/stoneyridge: Add PC speaker control
by Richard Spiegel (Code Review) 13 Nov '18

13 Nov '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/29627 Change subject: soc/amd/stoneyridge: Add PC speaker control ...................................................................... soc/amd/stoneyridge: Add PC speaker control Chromebook do not implement PC AT speaker, they use sound cards (normally integrated to the FCH). Therefore, declaring PC AT speaker in ACPI is a waste of memory. However, if some user needs it, it can't be simply removed. Add a config parameter, disabled by default, to control the inclusion of PC AT speaker into the ACPI code. BUG=b:117818432 TEST=Used IASL do disassemble original DSDT and saved. Added code, compiled grunt, disassembled new DSDT, compared to original. The PC AT speaker code was missing. Then flashed the new image and boot grunt. Change-Id: I746b990e1174a613189657566974b41e53b23456 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/soc/amd/stoneyridge/Kconfig M src/soc/amd/stoneyridge/acpi/lpc.asl 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/29627/1 diff --git a/src/soc/amd/stoneyridge/Kconfig b/src/soc/amd/stoneyridge/Kconfig index 4411984..d6af91a 100644 --- a/src/soc/amd/stoneyridge/Kconfig +++ b/src/soc/amd/stoneyridge/Kconfig @@ -385,4 +385,8 @@ return to S0. Otherwise the system will remain in S5 once power is restored. +config ACPI_PC_SPKR + bool + default n + endif # SOC_AMD_STONEYRIDGE_FP4 || SOC_AMD_STONEYRIDGE_FT4 diff --git a/src/soc/amd/stoneyridge/acpi/lpc.asl b/src/soc/amd/stoneyridge/acpi/lpc.asl index a41357a..acddb5e 100644 --- a/src/soc/amd/stoneyridge/acpi/lpc.asl +++ b/src/soc/amd/stoneyridge/acpi/lpc.asl @@ -65,12 +65,14 @@ }) } /* End Device(_SB.PCI0.LpcIsaBr.TMR) */ +#if IS_ENABLED(CONFIG_ACPI_PC_SPKR) Device(SPKR) { /* Speaker */ Name(_HID,EISAID("PNP0800")) /* AT style speaker */ Name(_CRS, ResourceTemplate() { IO(Decode16, 0x0061, 0x0061, 0, 1) }) } /* End Device(_SB.PCI0.LpcIsaBr.SPKR) */ +#endif Device(PIC) { Name(_HID,EISAID("PNP0000")) /* AT Interrupt Controller */ -- To view, visit https://review.coreboot.org/29627 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I746b990e1174a613189657566974b41e53b23456 Gerrit-Change-Number: 29627 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Change in coreboot[master]: mb/lenovo/x220: Add x1 as a variant
by Patrick Rudolph (Code Review) 13 Nov '18

13 Nov '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/29434 ) Change subject: mb/lenovo/x220: Add x1 as a variant ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… File src/mainboard/lenovo/x220/variants/x1/overridetree.cb: https://review.coreboot.org/#/c/29434/8/src/mainboard/lenovo/x220/variants/… PS8, Line 17: subsystemid 0x17aa 0x21e8 there's no reason to override the subsystemid. It's 0x17aa for lenovo, that should be sufficient... -- To view, visit https://review.coreboot.org/29434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibbc45f22c63b77ac95c188db825d0d7e2b03d2d1 Gerrit-Change-Number: 29434 Gerrit-PatchSet: 8 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 13 Nov 2018 14:12:54 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

1 0

Change in coreboot[master]: ACPI: Fix DSDT's revision field
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29626 to look at the new patch set (#3). Change subject: ACPI: Fix DSDT's revision field ...................................................................... ACPI: Fix DSDT's revision field DSDT revision is =1 for ACPI v1 and =2 for greater ACPI version. This will cause the AML interpreter to use 32-bit integers and math if the version is 1, and 64-bit if the version is >=2. Current spec version is 2 for ACPI 6.2-a. Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/adi/rcc-dff/dsdt.asl M src/mainboard/aopen/dxplplusu/dsdt.asl M src/mainboard/apple/macbook21/dsdt.asl M src/mainboard/apple/macbookair4_2/dsdt.asl M src/mainboard/asrock/b75pro3-m/dsdt.asl M src/mainboard/asrock/g41c-gs/dsdt.asl M src/mainboard/asus/kcma-d8/dsdt.asl M src/mainboard/asus/kgpe-d16/dsdt.asl M src/mainboard/asus/maximus_iv_gene-z/dsdt.asl M src/mainboard/asus/p5gc-mx/dsdt.asl M src/mainboard/asus/p5qc/dsdt.asl M src/mainboard/asus/p8h61-m_lx/dsdt.asl M src/mainboard/asus/p8h61-m_pro/dsdt.asl M src/mainboard/compulab/intense_pc/dsdt.asl M src/mainboard/esd/atom15/dsdt.asl M src/mainboard/facebook/watson/dsdt.asl M src/mainboard/foxconn/d41s/dsdt.asl M src/mainboard/foxconn/g41s-k/dsdt.asl M src/mainboard/getac/p470/dsdt.asl M src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl M src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl M src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl M src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl M src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl M src/mainboard/google/auron/dsdt.asl M src/mainboard/google/beltino/dsdt.asl M src/mainboard/google/butterfly/dsdt.asl M src/mainboard/google/cyan/dsdt.asl M src/mainboard/google/eve/dsdt.asl M src/mainboard/google/fizz/dsdt.asl M src/mainboard/google/glados/dsdt.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/google/link/dsdt.asl M src/mainboard/google/octopus/dsdt.asl M src/mainboard/google/parrot/dsdt.asl M src/mainboard/google/poppy/dsdt.asl M src/mainboard/google/rambi/dsdt.asl M src/mainboard/google/reef/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/google/slippy/dsdt.asl M src/mainboard/google/stout/dsdt.asl M src/mainboard/google/zoombini/dsdt.asl M src/mainboard/hp/2570p/dsdt.asl M src/mainboard/hp/2760p/dsdt.asl M src/mainboard/hp/8460p/dsdt.asl M src/mainboard/hp/8470p/dsdt.asl M src/mainboard/hp/8770w/dsdt.asl M src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl M src/mainboard/hp/folio_9470m/dsdt.asl M src/mainboard/hp/revolve_810_g1/dsdt.asl M src/mainboard/ibase/mb899/dsdt.asl M src/mainboard/intel/apollolake_rvp/dsdt.asl M src/mainboard/intel/baskingridge/dsdt.asl M src/mainboard/intel/bayleybay_fsp/dsdt.asl M src/mainboard/intel/camelbackmountain_fsp/dsdt.asl M src/mainboard/intel/cannonlake_rvp/dsdt.asl M src/mainboard/intel/coffeelake_rvp/dsdt.asl M src/mainboard/intel/cougar_canyon2/dsdt.asl M src/mainboard/intel/d510mo/dsdt.asl M src/mainboard/intel/d945gclf/dsdt.asl M src/mainboard/intel/dcp847ske/dsdt.asl M src/mainboard/intel/dg41wv/dsdt.asl M src/mainboard/intel/dg43gt/dsdt.asl M src/mainboard/intel/emeraldlake2/dsdt.asl M src/mainboard/intel/galileo/dsdt.asl M src/mainboard/intel/glkrvp/dsdt.asl M src/mainboard/intel/harcuvar/dsdt.asl M src/mainboard/intel/icelake_rvp/dsdt.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl M src/mainboard/intel/leafhill/dsdt.asl M src/mainboard/intel/littleplains/dsdt.asl M src/mainboard/intel/minnow3/dsdt.asl M src/mainboard/intel/minnowmax/dsdt.asl M src/mainboard/intel/mohonpeak/dsdt.asl M src/mainboard/intel/saddlebrook/dsdt.asl M src/mainboard/intel/stargo2/dsdt.asl M src/mainboard/intel/strago/dsdt.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/kontron/986lcd-m/dsdt.asl M src/mainboard/kontron/ktqm77/dsdt.asl M src/mainboard/lenovo/l520/dsdt.asl M src/mainboard/lenovo/s230u/dsdt.asl M src/mainboard/lenovo/t400/dsdt.asl M src/mainboard/lenovo/t420/dsdt.asl M src/mainboard/lenovo/t420s/dsdt.asl M src/mainboard/lenovo/t430/dsdt.asl M src/mainboard/lenovo/t430s/dsdt.asl M src/mainboard/lenovo/t520/dsdt.asl M src/mainboard/lenovo/t530/dsdt.asl M src/mainboard/lenovo/t60/dsdt.asl M src/mainboard/lenovo/x131e/dsdt.asl M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl M src/mainboard/lenovo/x200/dsdt.asl M src/mainboard/lenovo/x201/dsdt.asl M src/mainboard/lenovo/x220/dsdt.asl M src/mainboard/lenovo/x230/dsdt.asl M src/mainboard/lenovo/x60/dsdt.asl M src/mainboard/lenovo/z61t/dsdt.asl M src/mainboard/ocp/monolake/dsdt.asl M src/mainboard/ocp/wedge100s/dsdt.asl M src/mainboard/opencellular/rotundu/dsdt.asl M src/mainboard/packardbell/ms2290/dsdt.asl M src/mainboard/purism/librem_bdw/dsdt.asl M src/mainboard/purism/librem_skl/dsdt.asl M src/mainboard/roda/rk886ex/dsdt.asl M src/mainboard/roda/rk9/dsdt.asl M src/mainboard/roda/rv11/dsdt.asl M src/mainboard/samsung/lumpy/dsdt.asl M src/mainboard/samsung/stumpy/dsdt.asl M src/mainboard/sapphire/pureplatinumh61/dsdt.asl M src/mainboard/scaleway/tagada/dsdt.asl M src/mainboard/siemens/mc_apl1/dsdt.asl M src/mainboard/siemens/mc_bdx1/dsdt.asl M src/mainboard/siemens/mc_tcu3/dsdt.asl M util/autoport/main.go 116 files changed, 116 insertions(+), 116 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/29626/3 -- To view, visit https://review.coreboot.org/29626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Gerrit-Change-Number: 29626 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

1 0

Change in coreboot[master]: ACPI: Fix DSDT's revision field
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Elyes HAOUAS has uploaded a new patch set (#2). ( https://review.coreboot.org/29626 ) Change subject: ACPI: Fix DSDT's revision field ...................................................................... ACPI: Fix DSDT's revision field DSDT revision is =1 for ACPI v1 and =2 for greater ACPI version. This will cause the AML interpreter to use 32-bit integers and math if the version is 1, and 64-bit if the version is >=2. Current spec version is 2 for ACPI 6.2-a. Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/adi/rcc-dff/dsdt.asl M src/mainboard/aopen/dxplplusu/dsdt.asl M src/mainboard/apple/macbook21/dsdt.asl M src/mainboard/apple/macbookair4_2/dsdt.asl M src/mainboard/asrock/b75pro3-m/dsdt.asl M src/mainboard/asrock/g41c-gs/dsdt.asl M src/mainboard/asus/p5gc-mx/dsdt.asl M src/mainboard/asus/p5qc/dsdt.asl M src/mainboard/asus/p8h61-m_pro/dsdt.asl M src/mainboard/compulab/intense_pc/dsdt.asl M src/mainboard/esd/atom15/dsdt.asl M src/mainboard/facebook/watson/dsdt.asl M src/mainboard/foxconn/d41s/dsdt.asl M src/mainboard/foxconn/g41s-k/dsdt.asl M src/mainboard/getac/p470/dsdt.asl M src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl M src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl M src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl M src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl M src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl M src/mainboard/google/auron/dsdt.asl M src/mainboard/google/beltino/dsdt.asl M src/mainboard/google/butterfly/dsdt.asl M src/mainboard/google/cyan/dsdt.asl M src/mainboard/google/eve/dsdt.asl M src/mainboard/google/fizz/dsdt.asl M src/mainboard/google/glados/dsdt.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/google/link/dsdt.asl M src/mainboard/google/octopus/dsdt.asl M src/mainboard/google/parrot/dsdt.asl M src/mainboard/google/poppy/dsdt.asl M src/mainboard/google/rambi/dsdt.asl M src/mainboard/google/reef/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/google/slippy/dsdt.asl M src/mainboard/google/stout/dsdt.asl M src/mainboard/google/zoombini/dsdt.asl M src/mainboard/hp/2570p/dsdt.asl M src/mainboard/hp/2760p/dsdt.asl M src/mainboard/hp/8460p/dsdt.asl M src/mainboard/hp/8470p/dsdt.asl M src/mainboard/hp/8770w/dsdt.asl M src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl M src/mainboard/hp/folio_9470m/dsdt.asl M src/mainboard/hp/revolve_810_g1/dsdt.asl M src/mainboard/ibase/mb899/dsdt.asl M src/mainboard/intel/apollolake_rvp/dsdt.asl M src/mainboard/intel/baskingridge/dsdt.asl M src/mainboard/intel/bayleybay_fsp/dsdt.asl M src/mainboard/intel/camelbackmountain_fsp/dsdt.asl M src/mainboard/intel/cannonlake_rvp/dsdt.asl M src/mainboard/intel/coffeelake_rvp/dsdt.asl M src/mainboard/intel/cougar_canyon2/dsdt.asl M src/mainboard/intel/d510mo/dsdt.asl M src/mainboard/intel/d945gclf/dsdt.asl M src/mainboard/intel/dcp847ske/dsdt.asl M src/mainboard/intel/dg41wv/dsdt.asl M src/mainboard/intel/dg43gt/dsdt.asl M src/mainboard/intel/emeraldlake2/dsdt.asl M src/mainboard/intel/galileo/dsdt.asl M src/mainboard/intel/glkrvp/dsdt.asl M src/mainboard/intel/harcuvar/dsdt.asl M src/mainboard/intel/icelake_rvp/dsdt.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl M src/mainboard/intel/leafhill/dsdt.asl M src/mainboard/intel/littleplains/dsdt.asl M src/mainboard/intel/minnow3/dsdt.asl M src/mainboard/intel/minnowmax/dsdt.asl M src/mainboard/intel/mohonpeak/dsdt.asl M src/mainboard/intel/saddlebrook/dsdt.asl M src/mainboard/intel/stargo2/dsdt.asl M src/mainboard/intel/strago/dsdt.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/kontron/986lcd-m/dsdt.asl M src/mainboard/kontron/ktqm77/dsdt.asl M src/mainboard/lenovo/l520/dsdt.asl M src/mainboard/lenovo/s230u/dsdt.asl M src/mainboard/lenovo/t400/dsdt.asl M src/mainboard/lenovo/t420/dsdt.asl M src/mainboard/lenovo/t420s/dsdt.asl M src/mainboard/lenovo/t430/dsdt.asl M src/mainboard/lenovo/t430s/dsdt.asl M src/mainboard/lenovo/t520/dsdt.asl M src/mainboard/lenovo/t530/dsdt.asl M src/mainboard/lenovo/t60/dsdt.asl M src/mainboard/lenovo/x131e/dsdt.asl M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl M src/mainboard/lenovo/x200/dsdt.asl M src/mainboard/lenovo/x201/dsdt.asl M src/mainboard/lenovo/x220/dsdt.asl M src/mainboard/lenovo/x230/dsdt.asl M src/mainboard/lenovo/x60/dsdt.asl M src/mainboard/lenovo/z61t/dsdt.asl M src/mainboard/ocp/monolake/dsdt.asl M src/mainboard/ocp/wedge100s/dsdt.asl M src/mainboard/opencellular/rotundu/dsdt.asl M src/mainboard/packardbell/ms2290/dsdt.asl M src/mainboard/purism/librem_bdw/dsdt.asl M src/mainboard/purism/librem_skl/dsdt.asl M src/mainboard/roda/rk886ex/dsdt.asl M src/mainboard/roda/rk9/dsdt.asl M src/mainboard/roda/rv11/dsdt.asl M src/mainboard/samsung/lumpy/dsdt.asl M src/mainboard/samsung/stumpy/dsdt.asl M src/mainboard/sapphire/pureplatinumh61/dsdt.asl M src/mainboard/scaleway/tagada/dsdt.asl M src/mainboard/siemens/mc_apl1/dsdt.asl M src/mainboard/siemens/mc_bdx1/dsdt.asl M src/mainboard/siemens/mc_tcu3/dsdt.asl M util/autoport/main.go 112 files changed, 112 insertions(+), 112 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/29626/2 -- To view, visit https://review.coreboot.org/29626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Gerrit-Change-Number: 29626 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

1 0

Change in coreboot[master]: ACPI: Fix DSDT table's revision field
by Elyes HAOUAS (Code Review) 13 Nov '18

13 Nov '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29626 Change subject: ACPI: Fix DSDT table's revision field ...................................................................... ACPI: Fix DSDT table's revision field DSDT revision is =1 for ACPI v1 and =2 for greater ACPI version. This will cause the AML interpreter to use 32-bit integers and math if the version is 1, and 64-bit if the version is >=2. Current spec version is 2 for ACPI 6.2-a. Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/adi/rcc-dff/dsdt.asl M src/mainboard/aopen/dxplplusu/dsdt.asl M src/mainboard/apple/macbook21/dsdt.asl M src/mainboard/apple/macbookair4_2/dsdt.asl M src/mainboard/asrock/b75pro3-m/dsdt.asl M src/mainboard/asrock/g41c-gs/dsdt.asl M src/mainboard/asus/p5gc-mx/dsdt.asl M src/mainboard/asus/p5qc/dsdt.asl M src/mainboard/asus/p8h61-m_pro/dsdt.asl M src/mainboard/compulab/intense_pc/dsdt.asl M src/mainboard/esd/atom15/dsdt.asl M src/mainboard/facebook/watson/dsdt.asl M src/mainboard/foxconn/d41s/dsdt.asl M src/mainboard/foxconn/g41s-k/dsdt.asl M src/mainboard/getac/p470/dsdt.asl M src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl M src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl M src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl M src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl M src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl M src/mainboard/google/auron/dsdt.asl M src/mainboard/google/beltino/dsdt.asl M src/mainboard/google/butterfly/dsdt.asl M src/mainboard/google/cyan/dsdt.asl M src/mainboard/google/eve/dsdt.asl M src/mainboard/google/fizz/dsdt.asl M src/mainboard/google/glados/dsdt.asl M src/mainboard/google/jecht/dsdt.asl M src/mainboard/google/link/dsdt.asl M src/mainboard/google/octopus/dsdt.asl M src/mainboard/google/parrot/dsdt.asl M src/mainboard/google/poppy/dsdt.asl M src/mainboard/google/rambi/dsdt.asl M src/mainboard/google/reef/dsdt.asl M src/mainboard/google/sarien/dsdt.asl M src/mainboard/google/slippy/dsdt.asl M src/mainboard/google/stout/dsdt.asl M src/mainboard/google/zoombini/dsdt.asl M src/mainboard/hp/2570p/dsdt.asl M src/mainboard/hp/2760p/dsdt.asl M src/mainboard/hp/8460p/dsdt.asl M src/mainboard/hp/8470p/dsdt.asl M src/mainboard/hp/8770w/dsdt.asl M src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl M src/mainboard/hp/folio_9470m/dsdt.asl M src/mainboard/hp/revolve_810_g1/dsdt.asl M src/mainboard/ibase/mb899/dsdt.asl M src/mainboard/intel/apollolake_rvp/dsdt.asl M src/mainboard/intel/baskingridge/dsdt.asl M src/mainboard/intel/bayleybay_fsp/dsdt.asl M src/mainboard/intel/camelbackmountain_fsp/dsdt.asl M src/mainboard/intel/cannonlake_rvp/dsdt.asl M src/mainboard/intel/coffeelake_rvp/dsdt.asl M src/mainboard/intel/cougar_canyon2/dsdt.asl M src/mainboard/intel/d510mo/dsdt.asl M src/mainboard/intel/d945gclf/dsdt.asl M src/mainboard/intel/dcp847ske/dsdt.asl M src/mainboard/intel/dg41wv/dsdt.asl M src/mainboard/intel/dg43gt/dsdt.asl M src/mainboard/intel/emeraldlake2/dsdt.asl M src/mainboard/intel/galileo/dsdt.asl M src/mainboard/intel/glkrvp/dsdt.asl M src/mainboard/intel/harcuvar/dsdt.asl M src/mainboard/intel/icelake_rvp/dsdt.asl M src/mainboard/intel/kblrvp/dsdt.asl M src/mainboard/intel/kunimitsu/dsdt.asl M src/mainboard/intel/leafhill/dsdt.asl M src/mainboard/intel/littleplains/dsdt.asl M src/mainboard/intel/minnow3/dsdt.asl M src/mainboard/intel/minnowmax/dsdt.asl M src/mainboard/intel/mohonpeak/dsdt.asl M src/mainboard/intel/saddlebrook/dsdt.asl M src/mainboard/intel/stargo2/dsdt.asl M src/mainboard/intel/strago/dsdt.asl M src/mainboard/intel/wtm2/dsdt.asl M src/mainboard/kontron/986lcd-m/dsdt.asl M src/mainboard/kontron/ktqm77/dsdt.asl M src/mainboard/lenovo/l520/dsdt.asl M src/mainboard/lenovo/s230u/dsdt.asl M src/mainboard/lenovo/t400/dsdt.asl M src/mainboard/lenovo/t420/dsdt.asl M src/mainboard/lenovo/t420s/dsdt.asl M src/mainboard/lenovo/t430/dsdt.asl M src/mainboard/lenovo/t430s/dsdt.asl M src/mainboard/lenovo/t520/dsdt.asl M src/mainboard/lenovo/t530/dsdt.asl M src/mainboard/lenovo/t60/dsdt.asl M src/mainboard/lenovo/x131e/dsdt.asl M src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl M src/mainboard/lenovo/x200/dsdt.asl M src/mainboard/lenovo/x201/dsdt.asl M src/mainboard/lenovo/x220/dsdt.asl M src/mainboard/lenovo/x230/dsdt.asl M src/mainboard/lenovo/x60/dsdt.asl M src/mainboard/lenovo/z61t/dsdt.asl M src/mainboard/ocp/monolake/dsdt.asl M src/mainboard/ocp/wedge100s/dsdt.asl M src/mainboard/opencellular/rotundu/dsdt.asl M src/mainboard/packardbell/ms2290/dsdt.asl M src/mainboard/purism/librem_bdw/dsdt.asl M src/mainboard/purism/librem_skl/dsdt.asl M src/mainboard/roda/rk886ex/dsdt.asl M src/mainboard/roda/rk9/dsdt.asl M src/mainboard/roda/rv11/dsdt.asl M src/mainboard/samsung/lumpy/dsdt.asl M src/mainboard/samsung/stumpy/dsdt.asl M src/mainboard/sapphire/pureplatinumh61/dsdt.asl M src/mainboard/scaleway/tagada/dsdt.asl M src/mainboard/siemens/mc_apl1/dsdt.asl M src/mainboard/siemens/mc_bdx1/dsdt.asl M src/mainboard/siemens/mc_tcu3/dsdt.asl M util/autoport/main.go 112 files changed, 112 insertions(+), 112 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/29626/1 diff --git a/src/mainboard/adi/rcc-dff/dsdt.asl b/src/mainboard/adi/rcc-dff/dsdt.asl index ec56e26..eb661c2 100644 --- a/src/mainboard/adi/rcc-dff/dsdt.asl +++ b/src/mainboard/adi/rcc-dff/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/aopen/dxplplusu/dsdt.asl b/src/mainboard/aopen/dxplplusu/dsdt.asl index 0fec68c..908a9f5 100644 --- a/src/mainboard/aopen/dxplplusu/dsdt.asl +++ b/src/mainboard/aopen/dxplplusu/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x04, // DSDT revision: ACPI v4.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20111103 // OEM revision diff --git a/src/mainboard/apple/macbook21/dsdt.asl b/src/mainboard/apple/macbook21/dsdt.asl index 2405c3e..76b95ac 100644 --- a/src/mainboard/apple/macbook21/dsdt.asl +++ b/src/mainboard/apple/macbook21/dsdt.asl @@ -21,7 +21,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/apple/macbookair4_2/dsdt.asl b/src/mainboard/apple/macbookair4_2/dsdt.asl index 8e6fd28..ac2d1bd 100644 --- a/src/mainboard/apple/macbookair4_2/dsdt.asl +++ b/src/mainboard/apple/macbookair4_2/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/asrock/b75pro3-m/dsdt.asl b/src/mainboard/asrock/b75pro3-m/dsdt.asl index f01afa2..44141c3 100644 --- a/src/mainboard/asrock/b75pro3-m/dsdt.asl +++ b/src/mainboard/asrock/b75pro3-m/dsdt.asl @@ -20,7 +20,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/asrock/g41c-gs/dsdt.asl b/src/mainboard/asrock/g41c-gs/dsdt.asl index e11eb39..8c99025 100644 --- a/src/mainboard/asrock/g41c-gs/dsdt.asl +++ b/src/mainboard/asrock/g41c-gs/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/asus/p5gc-mx/dsdt.asl b/src/mainboard/asus/p5gc-mx/dsdt.asl index 5eb55ea..61f0cea 100644 --- a/src/mainboard/asus/p5gc-mx/dsdt.asl +++ b/src/mainboard/asus/p5gc-mx/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/asus/p5qc/dsdt.asl b/src/mainboard/asus/p5qc/dsdt.asl index 4888b9c..9399208 100644 --- a/src/mainboard/asus/p5qc/dsdt.asl +++ b/src/mainboard/asus/p5qc/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x00000001 // OEM revision diff --git a/src/mainboard/asus/p8h61-m_pro/dsdt.asl b/src/mainboard/asus/p8h61-m_pro/dsdt.asl index d007c2f..ab7409c 100644 --- a/src/mainboard/asus/p8h61-m_pro/dsdt.asl +++ b/src/mainboard/asus/p8h61-m_pro/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/compulab/intense_pc/dsdt.asl b/src/mainboard/compulab/intense_pc/dsdt.asl index a3fa256..85b3e09 100644 --- a/src/mainboard/compulab/intense_pc/dsdt.asl +++ b/src/mainboard/compulab/intense_pc/dsdt.asl @@ -20,7 +20,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/esd/atom15/dsdt.asl b/src/mainboard/esd/atom15/dsdt.asl index 63b9d03..9fad919 100644 --- a/src/mainboard/esd/atom15/dsdt.asl +++ b/src/mainboard/esd/atom15/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/facebook/watson/dsdt.asl b/src/mainboard/facebook/watson/dsdt.asl index 8861f32..88dff41 100644 --- a/src/mainboard/facebook/watson/dsdt.asl +++ b/src/mainboard/facebook/watson/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/foxconn/d41s/dsdt.asl b/src/mainboard/foxconn/d41s/dsdt.asl index 621b87d..c89eb75 100644 --- a/src/mainboard/foxconn/d41s/dsdt.asl +++ b/src/mainboard/foxconn/d41s/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/foxconn/g41s-k/dsdt.asl b/src/mainboard/foxconn/g41s-k/dsdt.asl index e11eb39..8c99025 100644 --- a/src/mainboard/foxconn/g41s-k/dsdt.asl +++ b/src/mainboard/foxconn/g41s-k/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/getac/p470/dsdt.asl b/src/mainboard/getac/p470/dsdt.asl index 4b3ae14..33eb3cc 100644 --- a/src/mainboard/getac/p470/dsdt.asl +++ b/src/mainboard/getac/p470/dsdt.asl @@ -20,7 +20,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl index cbc1573..79f953d 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl index 665d81b..8020bde 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl +++ b/src/mainboard/gigabyte/ga-b75m-d3h/dsdt.asl @@ -14,7 +14,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl index 665d81b..8020bde 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl +++ b/src/mainboard/gigabyte/ga-b75m-d3v/dsdt.asl @@ -14,7 +14,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl index e11eb39..8c99025 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl +++ b/src/mainboard/gigabyte/ga-g41m-es2l/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl index 71d238d..3d14968 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/google/auron/dsdt.asl b/src/mainboard/google/auron/dsdt.asl index 445d927d..8c9a020 100644 --- a/src/mainboard/google/auron/dsdt.asl +++ b/src/mainboard/google/auron/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/beltino/dsdt.asl b/src/mainboard/google/beltino/dsdt.asl index 268cd9d..e356ee4 100644 --- a/src/mainboard/google/beltino/dsdt.asl +++ b/src/mainboard/google/beltino/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/butterfly/dsdt.asl b/src/mainboard/google/butterfly/dsdt.asl index b4fd6cf..08aeda9 100644 --- a/src/mainboard/google/butterfly/dsdt.asl +++ b/src/mainboard/google/butterfly/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/cyan/dsdt.asl b/src/mainboard/google/cyan/dsdt.asl index a49b1a9..3e0f888 100644 --- a/src/mainboard/google/cyan/dsdt.asl +++ b/src/mainboard/google/cyan/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, /* DSDT revision: ACPI v5.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20110725 /* OEM revision */ diff --git a/src/mainboard/google/eve/dsdt.asl b/src/mainboard/google/eve/dsdt.asl index 9382e35..13873d5 100644 --- a/src/mainboard/google/eve/dsdt.asl +++ b/src/mainboard/google/eve/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/fizz/dsdt.asl b/src/mainboard/google/fizz/dsdt.asl index 8a35197..367b0f8 100644 --- a/src/mainboard/google/fizz/dsdt.asl +++ b/src/mainboard/google/fizz/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/glados/dsdt.asl b/src/mainboard/google/glados/dsdt.asl index b5a37c6..0b4f9dd 100644 --- a/src/mainboard/google/glados/dsdt.asl +++ b/src/mainboard/google/glados/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/jecht/dsdt.asl b/src/mainboard/google/jecht/dsdt.asl index 8157a84..1108f29 100644 --- a/src/mainboard/google/jecht/dsdt.asl +++ b/src/mainboard/google/jecht/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/link/dsdt.asl b/src/mainboard/google/link/dsdt.asl index 5af0793..7056c2b 100644 --- a/src/mainboard/google/link/dsdt.asl +++ b/src/mainboard/google/link/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/octopus/dsdt.asl b/src/mainboard/google/octopus/dsdt.asl index 63b93e6..aadcd43 100644 --- a/src/mainboard/google/octopus/dsdt.asl +++ b/src/mainboard/google/octopus/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/parrot/dsdt.asl b/src/mainboard/google/parrot/dsdt.asl index ebc86ca..7b9847e 100644 --- a/src/mainboard/google/parrot/dsdt.asl +++ b/src/mainboard/google/parrot/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/poppy/dsdt.asl b/src/mainboard/google/poppy/dsdt.asl index 5b776c9..3d00524 100644 --- a/src/mainboard/google/poppy/dsdt.asl +++ b/src/mainboard/google/poppy/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/rambi/dsdt.asl b/src/mainboard/google/rambi/dsdt.asl index a37756f..dfc7ce8 100644 --- a/src/mainboard/google/rambi/dsdt.asl +++ b/src/mainboard/google/rambi/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/reef/dsdt.asl b/src/mainboard/google/reef/dsdt.asl index dc63436..f97476b 100644 --- a/src/mainboard/google/reef/dsdt.asl +++ b/src/mainboard/google/reef/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/sarien/dsdt.asl b/src/mainboard/google/sarien/dsdt.asl index 18fedd5..34484c0 100644 --- a/src/mainboard/google/sarien/dsdt.asl +++ b/src/mainboard/google/sarien/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, /* DSDT revision: ACPI v5.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20110725 /* OEM revision */ diff --git a/src/mainboard/google/slippy/dsdt.asl b/src/mainboard/google/slippy/dsdt.asl index 076039d..6f5f207 100644 --- a/src/mainboard/google/slippy/dsdt.asl +++ b/src/mainboard/google/slippy/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/stout/dsdt.asl b/src/mainboard/google/stout/dsdt.asl index 60ea646..023b920 100644 --- a/src/mainboard/google/stout/dsdt.asl +++ b/src/mainboard/google/stout/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/google/zoombini/dsdt.asl b/src/mainboard/google/zoombini/dsdt.asl index 3140990..4715196 100644 --- a/src/mainboard/google/zoombini/dsdt.asl +++ b/src/mainboard/google/zoombini/dsdt.asl @@ -21,7 +21,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/hp/2570p/dsdt.asl b/src/mainboard/hp/2570p/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/2570p/dsdt.asl +++ b/src/mainboard/hp/2570p/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/2760p/dsdt.asl b/src/mainboard/hp/2760p/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/2760p/dsdt.asl +++ b/src/mainboard/hp/2760p/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/8460p/dsdt.asl b/src/mainboard/hp/8460p/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/8460p/dsdt.asl +++ b/src/mainboard/hp/8460p/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/8470p/dsdt.asl b/src/mainboard/hp/8470p/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/8470p/dsdt.asl +++ b/src/mainboard/hp/8470p/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/8770w/dsdt.asl b/src/mainboard/hp/8770w/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/8770w/dsdt.asl +++ b/src/mainboard/hp/8770w/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl b/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl index 555028c..2341fd9 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl +++ b/src/mainboard/hp/compaq_8200_elite_sff/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/folio_9470m/dsdt.asl b/src/mainboard/hp/folio_9470m/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/folio_9470m/dsdt.asl +++ b/src/mainboard/hp/folio_9470m/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/hp/revolve_810_g1/dsdt.asl b/src/mainboard/hp/revolve_810_g1/dsdt.asl index 51934c7..987238d 100644 --- a/src/mainboard/hp/revolve_810_g1/dsdt.asl +++ b/src/mainboard/hp/revolve_810_g1/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/ibase/mb899/dsdt.asl b/src/mainboard/ibase/mb899/dsdt.asl index 6844bbd..e26cfa0 100644 --- a/src/mainboard/ibase/mb899/dsdt.asl +++ b/src/mainboard/ibase/mb899/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv2", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/intel/apollolake_rvp/dsdt.asl b/src/mainboard/intel/apollolake_rvp/dsdt.asl index 53a7b0f..260cfe3 100644 --- a/src/mainboard/intel/apollolake_rvp/dsdt.asl +++ b/src/mainboard/intel/apollolake_rvp/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, /* DSDT revision: ACPI v2.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20110725 /* OEM revision */ diff --git a/src/mainboard/intel/baskingridge/dsdt.asl b/src/mainboard/intel/baskingridge/dsdt.asl index 1871c3a..88c3280 100644 --- a/src/mainboard/intel/baskingridge/dsdt.asl +++ b/src/mainboard/intel/baskingridge/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/bayleybay_fsp/dsdt.asl b/src/mainboard/intel/bayleybay_fsp/dsdt.asl index 63b9d03..9fad919 100644 --- a/src/mainboard/intel/bayleybay_fsp/dsdt.asl +++ b/src/mainboard/intel/bayleybay_fsp/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl b/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl index 9db2693..71b6353 100644 --- a/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl +++ b/src/mainboard/intel/camelbackmountain_fsp/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/cannonlake_rvp/dsdt.asl b/src/mainboard/intel/cannonlake_rvp/dsdt.asl index 5c4b31c..fb3b697 100644 --- a/src/mainboard/intel/cannonlake_rvp/dsdt.asl +++ b/src/mainboard/intel/cannonlake_rvp/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/coffeelake_rvp/dsdt.asl b/src/mainboard/intel/coffeelake_rvp/dsdt.asl index 37a1725..7f2c6d6 100644 --- a/src/mainboard/intel/coffeelake_rvp/dsdt.asl +++ b/src/mainboard/intel/coffeelake_rvp/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/cougar_canyon2/dsdt.asl b/src/mainboard/intel/cougar_canyon2/dsdt.asl index d167e4e..f210e8e 100644 --- a/src/mainboard/intel/cougar_canyon2/dsdt.asl +++ b/src/mainboard/intel/cougar_canyon2/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/d510mo/dsdt.asl b/src/mainboard/intel/d510mo/dsdt.asl index 621b87d..c89eb75 100644 --- a/src/mainboard/intel/d510mo/dsdt.asl +++ b/src/mainboard/intel/d510mo/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/intel/d945gclf/dsdt.asl b/src/mainboard/intel/d945gclf/dsdt.asl index cbc1573..79f953d 100644 --- a/src/mainboard/intel/d945gclf/dsdt.asl +++ b/src/mainboard/intel/d945gclf/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/intel/dcp847ske/dsdt.asl b/src/mainboard/intel/dcp847ske/dsdt.asl index 71b4d89..d5ec147 100644 --- a/src/mainboard/intel/dcp847ske/dsdt.asl +++ b/src/mainboard/intel/dcp847ske/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/intel/dg41wv/dsdt.asl b/src/mainboard/intel/dg41wv/dsdt.asl index e11eb39..8c99025 100644 --- a/src/mainboard/intel/dg41wv/dsdt.asl +++ b/src/mainboard/intel/dg41wv/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/intel/dg43gt/dsdt.asl b/src/mainboard/intel/dg43gt/dsdt.asl index 3315c97..262cb23 100644 --- a/src/mainboard/intel/dg43gt/dsdt.asl +++ b/src/mainboard/intel/dg43gt/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/intel/emeraldlake2/dsdt.asl b/src/mainboard/intel/emeraldlake2/dsdt.asl index 26c41c4..4e78491 100644 --- a/src/mainboard/intel/emeraldlake2/dsdt.asl +++ b/src/mainboard/intel/emeraldlake2/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/galileo/dsdt.asl b/src/mainboard/intel/galileo/dsdt.asl index 881c1b9..da7ac14 100644 --- a/src/mainboard/intel/galileo/dsdt.asl +++ b/src/mainboard/intel/galileo/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "Intel", // OEM id "COREBOOT", // OEM table id 0x20160220 // OEM revision diff --git a/src/mainboard/intel/glkrvp/dsdt.asl b/src/mainboard/intel/glkrvp/dsdt.asl index 3a80f6c..8e9722b 100644 --- a/src/mainboard/intel/glkrvp/dsdt.asl +++ b/src/mainboard/intel/glkrvp/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/harcuvar/dsdt.asl b/src/mainboard/intel/harcuvar/dsdt.asl index 4e66d17..5edbb6c 100644 --- a/src/mainboard/intel/harcuvar/dsdt.asl +++ b/src/mainboard/intel/harcuvar/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/icelake_rvp/dsdt.asl b/src/mainboard/intel/icelake_rvp/dsdt.asl index 7951501..eb5c5ab 100644 --- a/src/mainboard/intel/icelake_rvp/dsdt.asl +++ b/src/mainboard/intel/icelake_rvp/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/kblrvp/dsdt.asl b/src/mainboard/intel/kblrvp/dsdt.asl index 9531219..903198d 100644 --- a/src/mainboard/intel/kblrvp/dsdt.asl +++ b/src/mainboard/intel/kblrvp/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/kunimitsu/dsdt.asl b/src/mainboard/intel/kunimitsu/dsdt.asl index b5a37c6..0b4f9dd 100644 --- a/src/mainboard/intel/kunimitsu/dsdt.asl +++ b/src/mainboard/intel/kunimitsu/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/leafhill/dsdt.asl b/src/mainboard/intel/leafhill/dsdt.asl index 004523a..d16a289 100644 --- a/src/mainboard/intel/leafhill/dsdt.asl +++ b/src/mainboard/intel/leafhill/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/littleplains/dsdt.asl b/src/mainboard/intel/littleplains/dsdt.asl index ec56e26..eb661c2 100644 --- a/src/mainboard/intel/littleplains/dsdt.asl +++ b/src/mainboard/intel/littleplains/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/minnow3/dsdt.asl b/src/mainboard/intel/minnow3/dsdt.asl index 004523a..d16a289 100644 --- a/src/mainboard/intel/minnow3/dsdt.asl +++ b/src/mainboard/intel/minnow3/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/minnowmax/dsdt.asl b/src/mainboard/intel/minnowmax/dsdt.asl index 63b9d03..9fad919 100644 --- a/src/mainboard/intel/minnowmax/dsdt.asl +++ b/src/mainboard/intel/minnowmax/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/mohonpeak/dsdt.asl b/src/mainboard/intel/mohonpeak/dsdt.asl index ec56e26..eb661c2 100644 --- a/src/mainboard/intel/mohonpeak/dsdt.asl +++ b/src/mainboard/intel/mohonpeak/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/saddlebrook/dsdt.asl b/src/mainboard/intel/saddlebrook/dsdt.asl index 45d9a85..59ebc17 100644 --- a/src/mainboard/intel/saddlebrook/dsdt.asl +++ b/src/mainboard/intel/saddlebrook/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/stargo2/dsdt.asl b/src/mainboard/intel/stargo2/dsdt.asl index b4ae0ec..cd243d1 100644 --- a/src/mainboard/intel/stargo2/dsdt.asl +++ b/src/mainboard/intel/stargo2/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/intel/strago/dsdt.asl b/src/mainboard/intel/strago/dsdt.asl index 29ea7d6..7f78e7b 100644 --- a/src/mainboard/intel/strago/dsdt.asl +++ b/src/mainboard/intel/strago/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, /* DSDT revision: ACPI v5.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20110725 /* OEM revision */ diff --git a/src/mainboard/intel/wtm2/dsdt.asl b/src/mainboard/intel/wtm2/dsdt.asl index 410f6d2..fac7b0e 100644 --- a/src/mainboard/intel/wtm2/dsdt.asl +++ b/src/mainboard/intel/wtm2/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/kontron/986lcd-m/dsdt.asl b/src/mainboard/kontron/986lcd-m/dsdt.asl index 35264bd..0ddedd5 100644 --- a/src/mainboard/kontron/986lcd-m/dsdt.asl +++ b/src/mainboard/kontron/986lcd-m/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/kontron/ktqm77/dsdt.asl b/src/mainboard/kontron/ktqm77/dsdt.asl index 0432f77..794f8d5 100644 --- a/src/mainboard/kontron/ktqm77/dsdt.asl +++ b/src/mainboard/kontron/ktqm77/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/l520/dsdt.asl b/src/mainboard/lenovo/l520/dsdt.asl index 42a61fb..7648d05 100644 --- a/src/mainboard/lenovo/l520/dsdt.asl +++ b/src/mainboard/lenovo/l520/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/lenovo/s230u/dsdt.asl b/src/mainboard/lenovo/s230u/dsdt.asl index 71f3ef7..305a6c3 100644 --- a/src/mainboard/lenovo/s230u/dsdt.asl +++ b/src/mainboard/lenovo/s230u/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/lenovo/t400/dsdt.asl b/src/mainboard/lenovo/t400/dsdt.asl index 6ba4774..9feaefc 100644 --- a/src/mainboard/lenovo/t400/dsdt.asl +++ b/src/mainboard/lenovo/t400/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/lenovo/t420/dsdt.asl b/src/mainboard/lenovo/t420/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/t420/dsdt.asl +++ b/src/mainboard/lenovo/t420/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/t420s/dsdt.asl b/src/mainboard/lenovo/t420s/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/t420s/dsdt.asl +++ b/src/mainboard/lenovo/t420s/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/t430/dsdt.asl b/src/mainboard/lenovo/t430/dsdt.asl index dff8dcd..6161393 100644 --- a/src/mainboard/lenovo/t430/dsdt.asl +++ b/src/mainboard/lenovo/t430/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/lenovo/t430s/dsdt.asl b/src/mainboard/lenovo/t430s/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/t430s/dsdt.asl +++ b/src/mainboard/lenovo/t430s/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/t520/dsdt.asl b/src/mainboard/lenovo/t520/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/t520/dsdt.asl +++ b/src/mainboard/lenovo/t520/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/t530/dsdt.asl b/src/mainboard/lenovo/t530/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/t530/dsdt.asl +++ b/src/mainboard/lenovo/t530/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/t60/dsdt.asl b/src/mainboard/lenovo/t60/dsdt.asl index a13ac3c..ef69baa 100644 --- a/src/mainboard/lenovo/t60/dsdt.asl +++ b/src/mainboard/lenovo/t60/dsdt.asl @@ -22,7 +22,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/lenovo/x131e/dsdt.asl b/src/mainboard/lenovo/x131e/dsdt.asl index cd1af34..8c907e7 100644 --- a/src/mainboard/lenovo/x131e/dsdt.asl +++ b/src/mainboard/lenovo/x131e/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl index bb576f5..4901fda 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl +++ b/src/mainboard/lenovo/x1_carbon_gen1/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/lenovo/x200/dsdt.asl b/src/mainboard/lenovo/x200/dsdt.asl index 5452fe3..cbeeef2 100644 --- a/src/mainboard/lenovo/x200/dsdt.asl +++ b/src/mainboard/lenovo/x200/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index b59c215..643c803 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -23,7 +23,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, /* DSDT revision: ACPI v3.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20130325 /* OEM revision */ diff --git a/src/mainboard/lenovo/x220/dsdt.asl b/src/mainboard/lenovo/x220/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/x220/dsdt.asl +++ b/src/mainboard/lenovo/x220/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/x230/dsdt.asl b/src/mainboard/lenovo/x230/dsdt.asl index 7db8344..d554ed9 100644 --- a/src/mainboard/lenovo/x230/dsdt.asl +++ b/src/mainboard/lenovo/x230/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/lenovo/x60/dsdt.asl b/src/mainboard/lenovo/x60/dsdt.asl index 3222303..d0170af 100644 --- a/src/mainboard/lenovo/x60/dsdt.asl +++ b/src/mainboard/lenovo/x60/dsdt.asl @@ -24,7 +24,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/lenovo/z61t/dsdt.asl b/src/mainboard/lenovo/z61t/dsdt.asl index a13ac3c..ef69baa 100644 --- a/src/mainboard/lenovo/z61t/dsdt.asl +++ b/src/mainboard/lenovo/z61t/dsdt.asl @@ -22,7 +22,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/ocp/monolake/dsdt.asl b/src/mainboard/ocp/monolake/dsdt.asl index 9db2693..71b6353 100644 --- a/src/mainboard/ocp/monolake/dsdt.asl +++ b/src/mainboard/ocp/monolake/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/ocp/wedge100s/dsdt.asl b/src/mainboard/ocp/wedge100s/dsdt.asl index 9db2693..71b6353 100644 --- a/src/mainboard/ocp/wedge100s/dsdt.asl +++ b/src/mainboard/ocp/wedge100s/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/opencellular/rotundu/dsdt.asl b/src/mainboard/opencellular/rotundu/dsdt.asl index 63b9d03..9fad919 100644 --- a/src/mainboard/opencellular/rotundu/dsdt.asl +++ b/src/mainboard/opencellular/rotundu/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/packardbell/ms2290/dsdt.asl b/src/mainboard/packardbell/ms2290/dsdt.asl index 338ecca..69778e2 100644 --- a/src/mainboard/packardbell/ms2290/dsdt.asl +++ b/src/mainboard/packardbell/ms2290/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, /* DSDT revision: ACPI v3.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20140108 /* OEM revision */ diff --git a/src/mainboard/purism/librem_bdw/dsdt.asl b/src/mainboard/purism/librem_bdw/dsdt.asl index 955857a..eba4de4 100644 --- a/src/mainboard/purism/librem_bdw/dsdt.asl +++ b/src/mainboard/purism/librem_bdw/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, /* DSDT revision: ACPI v5.0 */ + 0x02, /* DSDT revision: ACPI v2.0 and up */ "COREv4", /* OEM id */ "COREBOOT", /* OEM table id */ 0x20160115 /* OEM revision */ diff --git a/src/mainboard/purism/librem_skl/dsdt.asl b/src/mainboard/purism/librem_skl/dsdt.asl index b1f6a54..1284be5 100644 --- a/src/mainboard/purism/librem_skl/dsdt.asl +++ b/src/mainboard/purism/librem_skl/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/roda/rk886ex/dsdt.asl b/src/mainboard/roda/rk886ex/dsdt.asl index efb2f92..0e9bf07 100644 --- a/src/mainboard/roda/rk886ex/dsdt.asl +++ b/src/mainboard/roda/rk886ex/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/roda/rk9/dsdt.asl b/src/mainboard/roda/rk9/dsdt.asl index 5c5ca2f..56379c7 100644 --- a/src/mainboard/roda/rk9/dsdt.asl +++ b/src/mainboard/roda/rk9/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20090419 // OEM revision diff --git a/src/mainboard/roda/rv11/dsdt.asl b/src/mainboard/roda/rv11/dsdt.asl index ff83795..7a106a9 100644 --- a/src/mainboard/roda/rv11/dsdt.asl +++ b/src/mainboard/roda/rv11/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/samsung/lumpy/dsdt.asl b/src/mainboard/samsung/lumpy/dsdt.asl index 3ca8bf2..3b5e049 100644 --- a/src/mainboard/samsung/lumpy/dsdt.asl +++ b/src/mainboard/samsung/lumpy/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/samsung/stumpy/dsdt.asl b/src/mainboard/samsung/stumpy/dsdt.asl index c1ea0e6..916e718 100644 --- a/src/mainboard/samsung/stumpy/dsdt.asl +++ b/src/mainboard/samsung/stumpy/dsdt.asl @@ -17,7 +17,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/sapphire/pureplatinumh61/dsdt.asl b/src/mainboard/sapphire/pureplatinumh61/dsdt.asl index 6247fe3..9635908 100644 --- a/src/mainboard/sapphire/pureplatinumh61/dsdt.asl +++ b/src/mainboard/sapphire/pureplatinumh61/dsdt.asl @@ -20,7 +20,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision diff --git a/src/mainboard/scaleway/tagada/dsdt.asl b/src/mainboard/scaleway/tagada/dsdt.asl index 4e66d17..5edbb6c 100644 --- a/src/mainboard/scaleway/tagada/dsdt.asl +++ b/src/mainboard/scaleway/tagada/dsdt.asl @@ -19,7 +19,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/siemens/mc_apl1/dsdt.asl b/src/mainboard/siemens/mc_apl1/dsdt.asl index e7f1ade..b26d135 100644 --- a/src/mainboard/siemens/mc_apl1/dsdt.asl +++ b/src/mainboard/siemens/mc_apl1/dsdt.asl @@ -16,7 +16,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x05, // DSDT revision: ACPI v5.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/siemens/mc_bdx1/dsdt.asl b/src/mainboard/siemens/mc_bdx1/dsdt.asl index 9db2693..71b6353 100644 --- a/src/mainboard/siemens/mc_bdx1/dsdt.asl +++ b/src/mainboard/siemens/mc_bdx1/dsdt.asl @@ -18,7 +18,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/src/mainboard/siemens/mc_tcu3/dsdt.asl b/src/mainboard/siemens/mc_tcu3/dsdt.asl index 63b9d03..9fad919 100644 --- a/src/mainboard/siemens/mc_tcu3/dsdt.asl +++ b/src/mainboard/siemens/mc_tcu3/dsdt.asl @@ -25,7 +25,7 @@ DefinitionBlock( "dsdt.aml", "DSDT", - 0x02, // DSDT revision: ACPI v2.0 + 0x02, // DSDT revision: ACPI v2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20110725 // OEM revision diff --git a/util/autoport/main.go b/util/autoport/main.go index ed56a55..0892b5e 100644 --- a/util/autoport/main.go +++ b/util/autoport/main.go @@ -851,7 +851,7 @@ `DefinitionBlock( "dsdt.aml", "DSDT", - 0x03, // DSDT revision: ACPI v3.0 + 0x02, // DSDT revision: ACPI 2.0 and up "COREv4", // OEM id "COREBOOT", // OEM table id 0x20141018 // OEM revision -- To view, visit https://review.coreboot.org/29626 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Gerrit-Change-Number: 29626 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit November 2018