coreboot-gerrit November 2018

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Change in coreboot[master]: drivers/spi: Return error in failure case
by Patrick Rudolph (Code Review) 07 Nov '18

07 Nov '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/29531 Change subject: drivers/spi: Return error in failure case ...................................................................... drivers/spi: Return error in failure case In case the function pointer isn't set return an error. Change-Id: I9de300f651ac93889dafa7377c876bf5ae2c50cc Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com> --- M src/drivers/spi/spi_flash.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/29531/1 diff --git a/src/drivers/spi/spi_flash.c b/src/drivers/spi/spi_flash.c index cc21ccb..b0b5899 100644 --- a/src/drivers/spi/spi_flash.c +++ b/src/drivers/spi/spi_flash.c @@ -448,7 +448,7 @@ if (!flash->ops->get_write_protection) { printk(BIOS_WARNING, "SPI: Write-protection gathering not " "implemented for this vendor.\n"); - return 0; + return -1; } return flash->ops->get_write_protection(flash, region); @@ -473,7 +473,7 @@ if (!flash->ops->set_write_protection) { printk(BIOS_WARNING, "SPI: Setting write-protection is not " "implemented for this vendor.\n"); - return 0; + return -1; } ret = flash->ops->set_write_protection(flash, region, non_volatile, -- To view, visit https://review.coreboot.org/29531 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9de300f651ac93889dafa7377c876bf5ae2c50cc Gerrit-Change-Number: 29531 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com>

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Change in coreboot[master]: arch/x86/smbios: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Hello Richard Spiegel, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29529 to look at the new patch set (#6). Change subject: arch/x86/smbios: [WIP] Add CPU_SOCKET_TYPE ...................................................................... arch/x86/smbios: [WIP] Add CPU_SOCKET_TYPE CPU_SOCKET_TYPE values added in accordance with SMBIOS Reference Specification Version: 3.2.0 AMD's have CPU_SOCKET_TYPE but are not a same as SMBIOS spec. Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/smbios.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/socket_AM2r2/Kconfig M src/cpu/amd/socket_AM3/Kconfig M src/cpu/amd/socket_ASB2/Kconfig M src/cpu/amd/socket_C32/Kconfig M src/cpu/amd/socket_FM2/Kconfig M src/cpu/amd/socket_F_1207/Kconfig M src/cpu/amd/socket_G34/Kconfig M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA1284/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA1023/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA1155/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_mFCPGA478/Kconfig M src/cpu/intel/socket_mPGA478MN/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_rPGA988B/Kconfig M src/cpu/intel/socket_rPGA989/Kconfig M src/northbridge/amd/amdfam10/raminit_amdmct.c M src/northbridge/amd/amdmct/mct/Makefile.inc M src/northbridge/amd/amdmct/mct_ddr3/Makefile.inc M src/northbridge/amd/amdmct/wrappers/mcti_d.c 25 files changed, 75 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29529/6 -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: arch/x86/smbios: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Hello Richard Spiegel, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29529 to look at the new patch set (#5). Change subject: arch/x86/smbios: [WIP] Add CPU_SOCKET_TYPE ...................................................................... arch/x86/smbios: [WIP] Add CPU_SOCKET_TYPE CPU_SOCKET_TYPE values added in accordance with SMBIOS Reference Specification Version: 3.2.0 AMD's have CPU_SOCKET_TYPE but are not a same as SMBIOS spec. Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/smbios.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/socket_AM2r2/Kconfig M src/cpu/amd/socket_AM3/Kconfig M src/cpu/amd/socket_ASB2/Kconfig M src/cpu/amd/socket_C32/Kconfig M src/cpu/amd/socket_FM2/Kconfig M src/cpu/amd/socket_F_1207/Kconfig M src/cpu/amd/socket_G34/Kconfig M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA1284/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA1023/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA1155/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_mFCPGA478/Kconfig M src/cpu/intel/socket_mPGA478MN/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_rPGA988B/Kconfig M src/cpu/intel/socket_rPGA989/Kconfig M src/northbridge/amd/amdfam10/raminit_amdmct.c M src/northbridge/amd/amdmct/mct/Makefile.inc M src/northbridge/amd/amdmct/mct_ddr3/Makefile.inc M src/northbridge/amd/amdmct/wrappers/mcti_d.c 25 files changed, 75 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29529/5 -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: arch/x86/smbios: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Hello Richard Spiegel, build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29529 to look at the new patch set (#4). Change subject: arch/x86/smbios: [WIP] Add CPU_SOCKET_TYPE ...................................................................... arch/x86/smbios: [WIP] Add CPU_SOCKET_TYPE CPU_SOCKET_TYPE values added in accordance with SMBIOS Reference Specification Version: 3.2.0 AMD's have CPU_SOCKET_TYPE but are not a same as SMBIOS spec. Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/smbios.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/socket_AM2r2/Kconfig M src/cpu/amd/socket_AM3/Kconfig M src/cpu/amd/socket_ASB2/Kconfig M src/cpu/amd/socket_C32/Kconfig M src/cpu/amd/socket_FM2/Kconfig M src/cpu/amd/socket_F_1207/Kconfig M src/cpu/amd/socket_G34/Kconfig M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA1284/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA1023/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA1155/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_mFCPGA478/Kconfig M src/cpu/intel/socket_mPGA478MN/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_rPGA988B/Kconfig M src/cpu/intel/socket_rPGA989/Kconfig M src/northbridge/amd/amdfam10/raminit_amdmct.c M src/northbridge/amd/amdmct/mct/Makefile.inc M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct_ddr3/Makefile.inc M src/northbridge/amd/amdmct/wrappers/mcti_d.c 26 files changed, 76 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29529/4 -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 4 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: siemens/mc_apl3: Set Full Reset Bit into Reset Control Register
by Mario Scheithauer (Code Review) 07 Nov '18

07 Nov '18

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/29530 Change subject: siemens/mc_apl3: Set Full Reset Bit into Reset Control Register ...................................................................... siemens/mc_apl3: Set Full Reset Bit into Reset Control Register This mainboard provides customer hardware reset button. A feature of this button is that it holds the APL in reset state as long as the reset button is pressed. After releasing the reset button the APL should restart again without the need for a power cycle. When Bit 3 in Reset Control Register (I/O port CF9h) is set to 1 the PCH is driving SLP_S3 active (low). Change-Id: Ib842f15b6ba14851d7f9b1b97c83389adc61f50b Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c 1 file changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/29530/1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index f41fe73..13fa0f0 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -14,6 +14,7 @@ */ #include <bootstate.h> +#include <cf9_reset.h> #include <console/console.h> #include <device/pci_def.h> #include <device/pci_ids.h> @@ -62,6 +63,11 @@ cmd |= PCI_COMMAND_MASTER; pci_write_config16(dev, PCI_COMMAND, cmd); } + + /* Set Full Reset Bit into Reset Control Register (I/O port CF9h). + * When Bit 3 is set to 1 the PCH will driving SLP_S3 active (low). + */ + outb(FULL_RST, RST_CNT); } static void wait_for_legacy_dev(void *unused) -- To view, visit https://review.coreboot.org/29530 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib842f15b6ba14851d7f9b1b97c83389adc61f50b Gerrit-Change-Number: 29530 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>

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Change in coreboot[master]: cpu/intel/socket */Kconfig: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Hello build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29529 to look at the new patch set (#3). Change subject: cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE ...................................................................... cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE CPU_SOCKET_TYPE values added in accordance with SMBIOS Reference Specification Version: 3.2.0 AMD's have CPU_SOCKET_TYPE but are not a same as SMBIOS spec. Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/smbios.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/socket_AM2r2/Kconfig M src/cpu/amd/socket_AM3/Kconfig M src/cpu/amd/socket_ASB2/Kconfig M src/cpu/amd/socket_C32/Kconfig M src/cpu/amd/socket_FM2/Kconfig M src/cpu/amd/socket_F_1207/Kconfig M src/cpu/amd/socket_G34/Kconfig M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA1284/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA1023/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA1155/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_mFCPGA478/Kconfig M src/cpu/intel/socket_mPGA478MN/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_rPGA988B/Kconfig M src/cpu/intel/socket_rPGA989/Kconfig M src/northbridge/amd/amdfam10/raminit_amdmct.c M src/northbridge/amd/amdmct/mct/Makefile.inc M src/northbridge/amd/amdmct/mct_ddr3/Makefile.inc M src/northbridge/amd/amdmct/wrappers/mcti_d.c 25 files changed, 75 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29529/3 -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: drivers/intel/fsp2_0: Run SplitFspBin with python2
by Philipp Deppenwiese (Code Review) 07 Nov '18

07 Nov '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/29519 ) Change subject: drivers/intel/fsp2_0: Run SplitFspBin with python2 ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/29519 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibaad2c31bb6494652ce650ab7c1064728ec5fe80 Gerrit-Change-Number: 29519 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 07 Nov 2018 10:15:46 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variants/nami: add the hynix memory parts
by Patrick Georgi (Code Review) 07 Nov '18

07 Nov '18

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/29524 ) Change subject: mb/google/poppy/variants/nami: add the hynix memory parts ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/29524 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I137259b88f39779768a58959a2dcc565645eee6d Gerrit-Change-Number: 29524 Gerrit-PatchSet: 1 Gerrit-Owner: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Ren Kuo <ren.kuo(a)quanta.corp-partner.google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 07 Nov 2018 10:14:14 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/intel/socket */Kconfig: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Hello build bot (Jenkins), Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/29529 to look at the new patch set (#2). Change subject: cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE ...................................................................... cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE CPU_SOCKET_TYPE values added in accordance with SMBIOS Reference Specification Version: 3.2.0 AMD's have CPU_SOCKET_TYPE but are not a same as SMBIOS spec. Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/smbios.c M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA1284/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA1023/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA1155/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_mFCPGA478/Kconfig M src/cpu/intel/socket_mPGA478MN/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_rPGA988B/Kconfig M src/cpu/intel/socket_rPGA989/Kconfig 13 files changed, 52 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29529/2 -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: cpu/intel/socket */Kconfig: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Elyes HAOUAS has posted comments on this change. ( https://review.coreboot.org/29529 ) Change subject: cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE ...................................................................... Patch Set 1: Code-Review-1 -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Comment-Date: Wed, 07 Nov 2018 10:00:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit November 2018