coreboot-gerrit November 2018

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Change in coreboot[master]: cpu/intel/socket */Kconfig: [WIP] Add CPU SOCKET TYPE
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/29529 Change subject: cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE ...................................................................... cpu/intel/socket_*/Kconfig: [WIP] Add CPU_SOCKET_TYPE CPU_SOCKET_TYPE values added in accordance with SMBIOS Reference Specification Version: 3.2.0 AMD's have CPU_SOCKET_TYPE but are not a same as SMBIOS spec. Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/arch/x86/smbios.c M src/cpu/intel/socket_441/Kconfig M src/cpu/intel/socket_BGA1284/Kconfig M src/cpu/intel/socket_BGA956/Kconfig M src/cpu/intel/socket_FCBGA1023/Kconfig M src/cpu/intel/socket_FCBGA559/Kconfig M src/cpu/intel/socket_LGA1155/Kconfig M src/cpu/intel/socket_LGA775/Kconfig M src/cpu/intel/socket_mFCPGA478/Kconfig M src/cpu/intel/socket_mPGA478MN/Kconfig M src/cpu/intel/socket_mPGA604/Kconfig M src/cpu/intel/socket_rPGA988B/Kconfig M src/cpu/intel/socket_rPGA989/Kconfig 13 files changed, 49 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/29529/1 diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c index c0545ce..b6337f2 100644 --- a/src/arch/x86/smbios.c +++ b/src/arch/x86/smbios.c @@ -555,12 +555,11 @@ t->processor_version = smbios_processor_name(t->eos); t->processor_family = (res.eax > 0) ? 0x0c : 0x6; t->processor_type = 3; /* System Processor */ - t->processor_upgrade = 0x06; t->core_count = (res.ebx >> 16) & 0xff; t->l1_cache_handle = 0xffff; t->l2_cache_handle = 0xffff; t->l3_cache_handle = 0xffff; - t->processor_upgrade = 1; + t->processor_upgrade = CONFIG_CPU_SOCKET_TYPE; len = t->length + smbios_string_table_len(t->eos); *current += len; return len; diff --git a/src/cpu/intel/socket_441/Kconfig b/src/cpu/intel/socket_441/Kconfig index ac249c5..66761f5 100644 --- a/src/cpu/intel/socket_441/Kconfig +++ b/src/cpu/intel/socket_441/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_441 +config CPU_SOCKET_TYPE + hex + default 0x04 + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_106CX diff --git a/src/cpu/intel/socket_BGA1284/Kconfig b/src/cpu/intel/socket_BGA1284/Kconfig index 402dc5c..5fef2ba 100644 --- a/src/cpu/intel/socket_BGA1284/Kconfig +++ b/src/cpu/intel/socket_BGA1284/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_BGA1284 +config CPU_SOCKET_TYPE + hex + default 0x01 # Other + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select MMX diff --git a/src/cpu/intel/socket_BGA956/Kconfig b/src/cpu/intel/socket_BGA956/Kconfig index 6c5e414..91c1039 100644 --- a/src/cpu/intel/socket_BGA956/Kconfig +++ b/src/cpu/intel/socket_BGA956/Kconfig @@ -6,6 +6,10 @@ if CPU_INTEL_SOCKET_BGA956 +config CPU_SOCKET_TYPE + hex + default 0x01 # Other + config DCACHE_RAM_BASE hex default 0xfefc0000 diff --git a/src/cpu/intel/socket_FCBGA1023/Kconfig b/src/cpu/intel/socket_FCBGA1023/Kconfig index 3c6e2bf..206e5d9ec3 100644 --- a/src/cpu/intel/socket_FCBGA1023/Kconfig +++ b/src/cpu/intel/socket_FCBGA1023/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_FCBGA1023 +config CPU_SOCKET_TYPE + hex + default 0x22 + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select MMX diff --git a/src/cpu/intel/socket_FCBGA559/Kconfig b/src/cpu/intel/socket_FCBGA559/Kconfig index d1cc80f..f7aaca3 100644 --- a/src/cpu/intel/socket_FCBGA559/Kconfig +++ b/src/cpu/intel/socket_FCBGA559/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_FCBGA559 +config CPU_SOCKET_TYPE + hex + default 0x01 # Other + config SOCKET_SPECIFIC_OPTIONS def_bool y select CPU_INTEL_MODEL_106CX diff --git a/src/cpu/intel/socket_LGA1155/Kconfig b/src/cpu/intel/socket_LGA1155/Kconfig index 35aac3c..46e7509 100644 --- a/src/cpu/intel/socket_LGA1155/Kconfig +++ b/src/cpu/intel/socket_LGA1155/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_LGA1155 +config CPU_SOCKET_TYPE + hex + default 0x24 + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select MMX diff --git a/src/cpu/intel/socket_LGA775/Kconfig b/src/cpu/intel/socket_LGA775/Kconfig index 8b227bd..3d61ac3 100644 --- a/src/cpu/intel/socket_LGA775/Kconfig +++ b/src/cpu/intel/socket_LGA775/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_LGA775 +config CPU_SOCKET_TYPE + hex + default 0x15 + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_6FX diff --git a/src/cpu/intel/socket_mFCPGA478/Kconfig b/src/cpu/intel/socket_mFCPGA478/Kconfig index 075abad..83b3e8b 100644 --- a/src/cpu/intel/socket_mFCPGA478/Kconfig +++ b/src/cpu/intel/socket_mFCPGA478/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_MFCPGA478 +config CPU_SOCKET_TYPE + hex + default 0x01 # Other + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_6EX diff --git a/src/cpu/intel/socket_mPGA478MN/Kconfig b/src/cpu/intel/socket_mPGA478MN/Kconfig index 7d97022..aa0c7d7 100644 --- a/src/cpu/intel/socket_mPGA478MN/Kconfig +++ b/src/cpu/intel/socket_mPGA478MN/Kconfig @@ -7,6 +7,10 @@ if CPU_INTEL_SOCKET_MPGA478MN +config CPU_SOCKET_TYPE + hex + default 0x01 # Other + config DCACHE_RAM_BASE hex default 0xfefc0000 diff --git a/src/cpu/intel/socket_mPGA604/Kconfig b/src/cpu/intel/socket_mPGA604/Kconfig index ab0cf8a..206382e 100644 --- a/src/cpu/intel/socket_mPGA604/Kconfig +++ b/src/cpu/intel/socket_mPGA604/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_MPGA604 +config CPU_SOCKET_TYPE + hex + default 0x13 + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select CPU_INTEL_MODEL_F2X diff --git a/src/cpu/intel/socket_rPGA988B/Kconfig b/src/cpu/intel/socket_rPGA988B/Kconfig index 753cfb3..f53491e 100644 --- a/src/cpu/intel/socket_rPGA988B/Kconfig +++ b/src/cpu/intel/socket_rPGA988B/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_RPGA988B +config CPU_SOCKET_TYPE + hex + default 0x21 + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select MMX diff --git a/src/cpu/intel/socket_rPGA989/Kconfig b/src/cpu/intel/socket_rPGA989/Kconfig index 1d1f64f..8094221 100644 --- a/src/cpu/intel/socket_rPGA989/Kconfig +++ b/src/cpu/intel/socket_rPGA989/Kconfig @@ -3,6 +3,10 @@ if CPU_INTEL_SOCKET_RPGA989 +config CPU_SOCKET_TYPE + hex + default 0x01 # Other + config SOCKET_SPECIFIC_OPTIONS # dummy def_bool y select MMX -- To view, visit https://review.coreboot.org/29529 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1bf5ac6c411720d349df8fd706015c6835758cd0 Gerrit-Change-Number: 29529 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: payloads/external/Linuxboot: support u-root versions
by Jens Drenhaus (Code Review) 07 Nov '18

07 Nov '18

Hello Patrick Rudolph, Marcello Sylvester Bauer, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29516 to look at the new patch set (#4). Change subject: payloads/external/Linuxboot: support u-root versions ...................................................................... payloads/external/Linuxboot: support u-root versions Since u-root uses release tags on github, now these releases can be checked out in u-root.mk. A specific release can be selected in the Kbuild system when u-root is set in Linuxboot payload. The default vlalue is v2.0.0. Change-Id: I65e1ccf0319809f7fab23142b31882e9928a5ec2 Signed-off-by: Jens Drenhaus <jens.drenhaus(a)9elements.com> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/targets/u-root.mk 2 files changed, 21 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/29516/4 -- To view, visit https://review.coreboot.org/29516 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I65e1ccf0319809f7fab23142b31882e9928a5ec2 Gerrit-Change-Number: 29516 Gerrit-PatchSet: 4 Gerrit-Owner: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: payloads/external/Linuxboot/targets: use go get to install u-root
by Jens Drenhaus (Code Review) 07 Nov '18

07 Nov '18

Hello Patrick Rudolph, Marcello Sylvester Bauer, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29515 to look at the new patch set (#3). Change subject: payloads/external/Linuxboot/targets: use go get to install u-root ...................................................................... payloads/external/Linuxboot/targets: use go get to install u-root make sure, there is proper go tree set up in inside the linuxboot build directory. Then use go get to to download u-root from github. Go get creates the approriate path inside the src directory and checks out the master brnach of the git repository. It also builds the code and installs u-root into the bin directory of the lokal go tree. Change-Id: I72866944165823300566e2e9bdaba59599a88178 Signed-off-by: Jens Drenhaus <jens.drenhaus(a)9elements.com> --- M payloads/external/LinuxBoot/targets/u-root.mk 1 file changed, 12 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/29515/3 -- To view, visit https://review.coreboot.org/29515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I72866944165823300566e2e9bdaba59599a88178 Gerrit-Change-Number: 29515 Gerrit-PatchSet: 3 Gerrit-Owner: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: payloads/external/Linuxboot: support u-root versions
by Jens Drenhaus (Code Review) 07 Nov '18

07 Nov '18

Hello Patrick Rudolph, Marcello Sylvester Bauer, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29516 to look at the new patch set (#3). Change subject: payloads/external/Linuxboot: support u-root versions ...................................................................... payloads/external/Linuxboot: support u-root versions Since u-root uses release tags on github, now these releases can be checked out in u-root.mk. A specific release can be selected in the Kbuild system when u-root is set in Linuxboot payload. The default vlalue is v2.0.0. Change-Id: I65e1ccf0319809f7fab23142b31882e9928a5ec2 Signed-off-by: Jens Drenhaus <jens.drenhaus(a)9elements.com> --- M payloads/external/LinuxBoot/Kconfig M payloads/external/LinuxBoot/targets/u-root.mk 2 files changed, 21 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/29516/3 -- To view, visit https://review.coreboot.org/29516 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I65e1ccf0319809f7fab23142b31882e9928a5ec2 Gerrit-Change-Number: 29516 Gerrit-PatchSet: 3 Gerrit-Owner: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: payloads/external/Linuxboot/targets: use go get to install u-root
by Jens Drenhaus (Code Review) 07 Nov '18

07 Nov '18

Hello Patrick Rudolph, Marcello Sylvester Bauer, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29515 to look at the new patch set (#2). Change subject: payloads/external/Linuxboot/targets: use go get to install u-root ...................................................................... payloads/external/Linuxboot/targets: use go get to install u-root make sure, there is proper go tree set up in inside the linuxboot build directory. Then use go get to to download u-root from github. It also builds the code and installs u-root into the bin directory of the lokal go tree. Change-Id: I72866944165823300566e2e9bdaba59599a88178 Signed-off-by: Jens Drenhaus <jens.drenhaus(a)9elements.com> --- M payloads/external/LinuxBoot/targets/u-root.mk 1 file changed, 12 insertions(+), 35 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/29515/2 -- To view, visit https://review.coreboot.org/29515 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I72866944165823300566e2e9bdaba59599a88178 Gerrit-Change-Number: 29515 Gerrit-PatchSet: 2 Gerrit-Owner: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: payloads/external/Linuxboot/targets: fix Makefile output of u-root
by Jens Drenhaus (Code Review) 07 Nov '18

07 Nov '18

Hello Marcello Sylvester Bauer, Patrick Rudolph, Philipp Deppenwiese, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29514 to look at the new patch set (#2). Change subject: payloads/external/Linuxboot/targets: fix Makefile output of u-root ...................................................................... payloads/external/Linuxboot/targets: fix Makefile output of u-root Suppress printing echo commandlines. Split long output in multiple lines. Change-Id: Ic63a8f498720fda6d4ac3e287572dbf76500adfa Signed-off-by: Jens Drenhaus <jens.drenhaus(a)9elements.com> --- M payloads/external/LinuxBoot/targets/u-root.mk 1 file changed, 13 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/29514/2 -- To view, visit https://review.coreboot.org/29514 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic63a8f498720fda6d4ac3e287572dbf76500adfa Gerrit-Change-Number: 29514 Gerrit-PatchSet: 2 Gerrit-Owner: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: siemens/mc_apl3: Set bus master bit for on-board PCI device
by Mario Scheithauer (Code Review) 07 Nov '18

07 Nov '18

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/29528 Change subject: siemens/mc_apl3: Set bus master bit for on-board PCI device ...................................................................... siemens/mc_apl3: Set bus master bit for on-board PCI device There is an on-board PCI device where bus master has to be enabled in PCI configuration space. As there is no need for a complete PCI driver for this device just set the bus master bit in mainboard_final(). Change-Id: I1ef4a7774d4ca75c230063debbc63d03486fed6f Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c 1 file changed, 10 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/29528/1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index bfcf38e..f41fe73 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -15,6 +15,7 @@ #include <bootstate.h> #include <console/console.h> +#include <device/pci_def.h> #include <device/pci_ids.h> #include <device/pci_ops.h> #include <gpio.h> @@ -31,6 +32,7 @@ void variant_mainboard_final(void) { struct device *dev = NULL; + uint16_t cmd = 0; /* PIR6 register mapping for PCIe root ports * INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#-> PIRQC# @@ -52,6 +54,14 @@ * offset 0x341C bit [3:0]. */ pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN)); + + /* Set Master Enable for on-board PCI device. */ + dev = dev_find_device(PCI_VENDOR_ID_SIEMENS, 0x403e, 0); + if (dev) { + cmd = pci_read_config16(dev, PCI_COMMAND); + cmd |= PCI_COMMAND_MASTER; + pci_write_config16(dev, PCI_COMMAND, cmd); + } } static void wait_for_legacy_dev(void *unused) -- To view, visit https://review.coreboot.org/29528 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1ef4a7774d4ca75c230063debbc63d03486fed6f Gerrit-Change-Number: 29528 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>

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Change in coreboot[master]: siemens/mc_apl3: Remove the correction of the Tx signal for SATA
by Mario Scheithauer (Code Review) 07 Nov '18

07 Nov '18

Mario Scheithauer has uploaded this change for review. ( https://review.coreboot.org/29527 Change subject: siemens/mc_apl3: Remove the correction of the Tx signal for SATA ...................................................................... siemens/mc_apl3: Remove the correction of the Tx signal for SATA For this mainboard the correction of transmit voltage swing from SATA interface is not necessary. Change-Id: I900d0d44b88585c223182d85c78cf3ff1e3e9159 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c 1 file changed, 0 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/29527/1 diff --git a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c index ade923a..bfcf38e 100644 --- a/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c +++ b/src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c @@ -52,14 +52,6 @@ * offset 0x341C bit [3:0]. */ pcr_or32(PID_LPC, PCR_LPC_PRC, (PCR_LPC_CCE_EN | PCR_LPC_PCE_EN)); - - /* - * Correct the SATA transmit signal via the High Speed I/O Transmit - * Control Register 3. - * Bit [23:16] set the output voltage swing for TX line. - * The value 0x4a sets the swing level to 0.58 V. - */ - pcr_rmw32(PID_MODPHY, TX_DWORD3, (0x00 << 16), (0x4a << 16)); } static void wait_for_legacy_dev(void *unused) -- To view, visit https://review.coreboot.org/29527 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I900d0d44b88585c223182d85c78cf3ff1e3e9159 Gerrit-Change-Number: 29527 Gerrit-PatchSet: 1 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com>

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Change in coreboot[master]: siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices
by Mario Scheithauer (Code Review) 07 Nov '18

07 Nov '18

Hello Werner Zeh, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29513 to look at the new patch set (#3). Change subject: siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices ...................................................................... siemens/mc_apl3: Adjust Legacy IRQ routing for PCI devices On this mainboard there is a legacy PCI device, which is connected to the PCIe root port via a PCIe-2-PCI bridge. This device only supports legacy interrupt routing. For this reason we have to adjust the PIR6 register (0x314c) which is responsible for PCIe device 13h and 14h. This means that the interrupt routing will also be the same for both PCIe devices. The bridge is connected to PCIe root port 2 and 3 over two lanes (Device 13.0 and 13.1). The following routing is required: INTA#->PIRQD#, INTB#->PIRQA#, INTC#->PIRQB#, INTD#->PIRQC# Change-Id: I5028c26769a2122b1c609ad7789c9949e3cb7a87 Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_apl1/variants/mc_apl3/mainboard.c 1 file changed, 3 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/29513/3 -- To view, visit https://review.coreboot.org/29513 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I5028c26769a2122b1c609ad7789c9949e3cb7a87 Gerrit-Change-Number: 29513 Gerrit-PatchSet: 3 Gerrit-Owner: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macros
by Elyes HAOUAS (Code Review) 07 Nov '18

07 Nov '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/29525 to look at the new patch set (#2). Change subject: nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macros ...................................................................... nb/amd/amdmct/mct_ddr3: Replace MTRR addresses with macros Change-Id: I6d161e9e44ebd284e229ea38b6e23d571aa7bf1e Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/amd/amdmct/mct_ddr3/mct_d.c 1 file changed, 5 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/25/29525/2 -- To view, visit https://review.coreboot.org/29525 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6d161e9e44ebd284e229ea38b6e23d571aa7bf1e Gerrit-Change-Number: 29525 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit November 2018