Matt DeVillier has submitted this change. ( https://review.coreboot.org/c/coreboot/+/87030?usp=email )
Change subject: Documentation: Add coreboot release 25.06 template
......................................................................
Documentation: Add coreboot release 25.06 template
This adds the release notes template for the upcoming June release of
coreboot.
Change-Id: Ia8aa266973181be12620343eb58bb9ba8f0ccc79
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87030
Reviewed-by: Jason Glenesk <jason.glenesk(a)gmail.com>
Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
A Documentation/releases/coreboot-25.06-relnotes.md
M Documentation/releases/index.md
2 files changed, 98 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Matt DeVillier: Looks good to me, approved
Jason Glenesk: Looks good to me, approved
diff --git a/Documentation/releases/coreboot-25.06-relnotes.md b/Documentation/releases/coreboot-25.06-relnotes.md
new file mode 100644
index 0000000..585af8b
--- /dev/null
+++ b/Documentation/releases/coreboot-25.06-relnotes.md
@@ -0,0 +1,96 @@
+Upcoming release - coreboot 25.06
+========================================================================
+
+The 25.06 release is scheduled for the end of June, 2025
+
+
+Update this document with changes that should be in the release notes.
+
+* Please use Markdown.
+* See the past few release notes for the general format.
+* The chip and board additions and removals will be updated right
+ before the release, so those do not need to be added.
+* Note that all changes before the release are done are marked upcoming.
+ A final version of the notes are done after the release.
+
+
+
+Significant or interesting changes
+----------------------------------
+
+* Add changes that need a full description here
+
+* This section should have full descriptions and can or should have
+ a link to the referenced commits.
+
+
+
+Additional coreboot changes
+---------------------------
+
+The following are changes across a number of patches, or changes worth
+noting, but not needing a full description.
+
+* Changes that only need a line or two of description go here.
+
+
+
+Changes to external resources
+-----------------------------
+
+### Toolchain updates
+
+
+
+### Git submodule pointers
+
+
+### External payloads
+
+
+
+Platform Updates
+----------------
+
+### Added mainboards:
+* To be filled in immediately before the release by the release team
+
+
+### Removed Mainboards
+* To be filled in immediately before the release by the release team
+
+
+### Updated SoCs
+* To be filled in immediately before the release by the release team
+
+
+
+Plans to move platform support to a branch
+------------------------------------------
+* To be filled in immediately before the release by the release team
+
+
+
+Statistics from the 24.12 to the 25.03 release
+--------------------------------------------
+* To be filled in immediately before the release by the release team
+
+
+
+Significant Known and Open Issues
+---------------------------------
+
+Issues from the coreboot bugtracker: <https://ticket.coreboot.org/>
+* To be filled in immediately before the release by the release team
+
+
+
+coreboot Links and Contact Information
+--------------------------------------
+
+* Main Web site: <https://www.coreboot.org>
+* Downloads: <https://coreboot.org/downloads.html>
+* Source control: <https://review.coreboot.org>
+* Documentation: <https://doc.coreboot.org>
+* Issue tracker: <https://ticket.coreboot.org/projects/coreboot>
+* Donations: <https://coreboot.org/donate.html>
diff --git a/Documentation/releases/index.md b/Documentation/releases/index.md
index 0fe44e0..aec897e 100644
--- a/Documentation/releases/index.md
+++ b/Documentation/releases/index.md
@@ -6,7 +6,7 @@
```{toctree}
:maxdepth: 1
-25.03 - March 2025 <coreboot-25.03-relnotes.md>
+25.06 - June 2025 <coreboot-25.06-relnotes.md>
```
The [checklist] contains instructions to ensure that a release covers all
@@ -22,6 +22,7 @@
```{toctree}
:maxdepth: 1
+25.03 - March 2025 <coreboot-25.03-relnotes.md>
24.12 - December 2024 <coreboot-24.12-relnotes.md>
24.08 - August 2024 <coreboot-24.08-relnotes.md>
24.05 - May 2024 <coreboot-24.05-relnotes.md>
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......................................................................
Patch Set 1: Code-Review+1
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Change subject: arch/x86/cpu: Add helper function to compute cache
......................................................................
Patch Set 7: Code-Review+1
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Change subject: google/chromeec: Add function to report the SKU ID
......................................................................
Patch Set 12:
(4 comments)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86810/comment/42b86f1c_2c079722?us… :
PS11, Line 10: chromeOS
> ChromeOS?
Done
https://review.coreboot.org/c/coreboot/+/86810/comment/d052f5d4_03129a2e?us… :
PS11, Line 11: that
: relies
> that rely or relying
Done
https://review.coreboot.org/c/coreboot/+/86810/comment/80df6f87_6377abdd?us… :
PS11, Line 14: that relies
> relying
Done
https://review.coreboot.org/c/coreboot/+/86810/comment/80fe7648_f4988253?us… :
PS11, Line 19: TEST=Verify zork board can report the SKU ID information
> How exactly? Check the logs?
Update the test comment for more clarity.
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Hello Boris Mittelberg, Caveh Jalali, Dinesh Gehlot, Eran Mitrani, Eric Lai, Jakub "Kuba" Czapiga, Jason Nien, Jayvik Desai, Julius Werner, Kapil Porwal, Martin Roth, Nick Vaccaro, Pranava Y N, Subrata Banik, Tarun, Yu-Ping Wu, build bot (Jenkins),
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Change subject: ec/google/chromeec: Add Kconfig for ChromeEC SMBIOS APIs
......................................................................
ec/google/chromeec: Add Kconfig for ChromeEC SMBIOS APIs
ChromeEC support information for SKU, OEM name and manufacturer name
using EC host commands. Instead of tying it up with SKU ID Kconfig
define a new Kconfig that clearly describes and allow adding support
for SMBIOS APIs based on ChromeEC host command.
BUG=b:396366352
TEST=Verify ec_smbios still compiles for required boards.
Change-Id: I665a3276aa6dc01571657359d17f292efc601d63
Signed-off-by: Aamir Bohra <aamirbohra(a)google.com>
---
M src/ec/google/chromeec/Kconfig
M src/ec/google/chromeec/Makefile.mk
M src/mainboard/google/brox/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/fatcat/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/myst/Kconfig
M src/mainboard/google/ocelot/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/puff/Kconfig
M src/mainboard/google/rex/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/zork/Kconfig
M src/mainboard/intel/ptlrvp/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
18 files changed, 24 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/86993/3
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Hello Boris Mittelberg, Caveh Jalali, Dinesh Gehlot, Eran Mitrani, Eric Lai, Hung-Te Lin, Jakub "Kuba" Czapiga, Jason Nien, Jayvik Desai, Julius Werner, Kapil Porwal, Martin Roth, Nick Vaccaro, Pranava Y N, Subrata Banik, Tarun, Yidi Lin, build bot (Jenkins),
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Change subject: google/chromeec: Add function to report the SKU ID
......................................................................
google/chromeec: Add function to report the SKU ID
Add implementation of sku_id function that reports the SKU ID
information by making use of ChromeOS EC host command. This function
can replace redundant sku_id function definitions across boards that
rely on ChromeOS EC host command to report the SKU ID information.
The boards that relying on ChromeOS EC host command for SKU information
without any board specific quirks can select EC_GOOGLE_CHROMEEC_SKUID
to make use of common sku_id function.
BUG=b:396366352
TEST=Verify zork boot log reports the correct the SKU ID information
Change-Id: I958cc88bf316dd2327b6545c5a37e8010e96c5d7
Signed-off-by: Aamir Bohra <aamirbohra(a)google.com>
---
M src/ec/google/chromeec/Makefile.mk
M src/ec/google/chromeec/ec_skuid.c
M src/mainboard/google/brox/Kconfig
M src/mainboard/google/brya/Kconfig
M src/mainboard/google/cherry/Kconfig
M src/mainboard/google/corsola/Kconfig
M src/mainboard/google/dedede/Kconfig
M src/mainboard/google/fatcat/Kconfig
M src/mainboard/google/geralt/Kconfig
M src/mainboard/google/guybrush/Kconfig
M src/mainboard/google/hatch/Kconfig
M src/mainboard/google/herobrine/Kconfig
M src/mainboard/google/myst/Kconfig
M src/mainboard/google/ocelot/Kconfig
M src/mainboard/google/octopus/Kconfig
M src/mainboard/google/puff/Kconfig
M src/mainboard/google/rauru/Kconfig
M src/mainboard/google/rex/Kconfig
M src/mainboard/google/skyrim/Kconfig
M src/mainboard/google/volteer/Kconfig
M src/mainboard/google/zork/sku_id.c
M src/mainboard/intel/ptlrvp/Kconfig
M src/mainboard/intel/shadowmountain/Kconfig
23 files changed, 11 insertions(+), 28 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/86810/12
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Change subject: mb/google/fatcat/var/felino: Add ALC1320 codec to devicetree
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Patch Set 6:
(1 comment)
File src/mainboard/google/fatcat/variants/felino/overridetree.cb:
https://review.coreboot.org/c/coreboot/+/86747/comment/b5c51d8f_aeeba551?us… :
PS3, Line 221: 3.1
> yes, it;s confirmed. rt712 support multilane both on Soundwire link 3 with rt1320.
Link 3 is ok but what about ID? Both cannot be 1.
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Change subject: mb/google/brya/var/meliks: reset DPHY_CLOCK_LANE_TIMING
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Patch Set 18:
(1 comment)
File src/mainboard/google/brya/variants/meliks/ramstage.c:
https://review.coreboot.org/c/coreboot/+/86838/comment/d6065674_e010cb5b?us… :
PS17, Line 20: 0xf
> Yes, hardcoding the MMIO address is possible. The reason is we need to clear the same system memory which is used by GFX before warm boot. However, I have found 2 possible addresses are used for TWL, 0x81000000 or 0xAF000000. It means that the address can be changed according to different PCI devices. Even only for this project, I can't say the PCI devices are consistent until its EOL. Thought?
Any temp base should be fine and you can also ensure clearing the temp bar at the end of `reset_display_dphy_clock`.
The implementation should be like
1. Read the `igd_mem_base` if zero then `set_igd_mem_base` to 0xAF000000. Set a static variable (bool temp_bar_imp) to track the temp bar allocation.
2. Reset the DPHY
3. Reset the `igd_mem_base` if `temp_bar_imp` is set meaning IGD bar was not implemented and this code sets the IGD bar
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