coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info
by Subrata Banik (Code Review) 20 Feb '25

20 Feb '25

Subrata Banik has submitted this change. ( https://review.coreboot.org/c/coreboot/+/85960?usp=email ) ( 7 is the latest approved patch-set. No files were changed between the latest approved patch-set and the submitted one. )Change subject: mainboard/google/fatcat: Fix SMBIOS Processor upgrade info ...................................................................... mainboard/google/fatcat: Fix SMBIOS Processor upgrade info The current SMBIOS for fatcat is missing processor upgrade … [View More]information. This patch adds the missing value by enabling kconfig flag CPU_INTEL_SOCKET_OTHER. Refer to SMBIOS spec sheet for documentation on cpu socket values: https://web.archive.org/web/20221012222420/https://www.dmtf.org/sites/defau… Output of dmidecode: Handle 0x0004, DMI type 4, 48 bytes Processor Information Socket Designation: CPU0 Type: Central Processor Family: Pentium Pro Manufacturer: GenuineIntel ID: C0 06 0C 00 FF FB EB BF Signature: Type 0, Family 6, Model 204, Stepping 0 Flags: ... Version: Genuine Intel(R) 0000 Voltage: Unknown External Clock: 100 MHz Max Speed: 3200 MHz Current Speed: 3000 MHz Status: Populated, Enabled - Upgrade: Unknown + Upgrade: Other BUG=NONE TEST=Boot and verified that SMBIOS processor upgrade value is correct. Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Signed-off-by: Zhixing Ma <zhixing.ma(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85960 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Jérémy Compostella <jeremy.compostella(a)intel.com> Reviewed-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/mainboard/google/fatcat/Kconfig 1 file changed, 1 insertion(+), 0 deletions(-) Approvals: Jérémy Compostella: Looks good to me, but someone else must approve Bora Guvendik: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/google/fatcat/Kconfig b/src/mainboard/google/fatcat/Kconfig index e82081d..13d791a 100644 --- a/src/mainboard/google/fatcat/Kconfig +++ b/src/mainboard/google/fatcat/Kconfig @@ -3,6 +3,7 @@ config BOARD_GOOGLE_FATCAT_COMMON def_bool n select BOARD_ROMSIZE_KB_32768 + select CPU_INTEL_SOCKET_OTHER select DRIVERS_GFX_GENERIC select DRIVERS_I2C_GENERIC select DRIVERS_I2C_HID -- To view, visit https://review.coreboot.org/c/coreboot/+/85960?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ica92d15e4a6123f928fceb77c7638e4c45d6dc7d Gerrit-Change-Number: 85960 Gerrit-PatchSet: 9 Gerrit-Owner: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.corp-partner.google.com> [View Less]

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[S] Change in coreboot[main]: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type
by Ivy Jian (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: David Wu, Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Subrata Banik. Ivy Jian has posted comments on this change by David Wu. ( https://review.coreboot.org/c/coreboot/+/86540?usp=email ) Change subject: mb/google/nissa/var/dirks: Add fw_config probe for WIFI Type ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86540?usp=… [View More]

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP
by hualin wei (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik. hualin wei has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86510?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP ...................................................................... Patch Set 4: (1 comment) File src/mainboard/google/brya/variants/baseboard/nissa/… [View More]include/baseboard/gpio.h: https://review.coreboot.org/c/coreboot/+/86510/comment/c76b69b9_ea79fca7?us… : PS3, Line 14: #if CONFIG(BOARD_GOOGLE_PUJJONIRU) : #define GPIO_PCH_WP GPP_E17 : #else : #define GPIO_PCH_WP GPP_E12 : #endif > I have tried the modification as you mentioned, but this method did not work in pujjoniru. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/86510?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee76fa8b357aa472699f17789b2c718028f812a3 Gerrit-Change-Number: 86510 Gerrit-PatchSet: 4 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cindy Lu <luyi8(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 02:18:40 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Comment-In-Reply-To: Dinesh Gehlot <digehlot(a)google.com> [View Less]

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP
by hualin wei (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik. hualin wei has posted comments on this change by hualin wei. ( https://review.coreboot.org/c/coreboot/+/86510?usp=email ) Change subject: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP ...................................................................... Patch Set 4: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/… [View More]86510/comment/e0d3a073_0c8cc76b?us… : PS3, Line 15: Build coreboot, flash, boot to : and log into kernel, execute "wp enable" in console, : execute "crossystem" at kernel prompt and verify that "wpsw_cur" : shows as being "1", Execute "wp disable" in console, execute : "crossystem" at kernel prompt and verify "wpsw_cur" is 0. > wp status update verified by toggling it on and off. Done File src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h: https://review.coreboot.org/c/coreboot/+/86510/comment/323a43b3_c3c7e3cf?us… : PS3, Line 14: #if CONFIG(BOARD_GOOGLE_PUJJONIRU) : #define GPIO_PCH_WP GPP_E17 : #else : #define GPIO_PCH_WP GPP_E12 : #endif > Instead of adding a condition to the baseboard, we can update the WP GPIO at a specific variant leve […] I have tried the modification as you mentioned, but this method did not work in pujjoniru. At the same time, based on the method you mentioned, we tried to add `#include <variant/gpio.h>` to `mainboard/google/brya/chromeos.c`, because `chromeos.c` calls `GPIO_PCH_WP`, but this problem has not been solved either. ``` #include <variant/gpio.h> #include <bootmode.h> #include <boot/coreboot_tables.h> #include <gpio.h> #include <types.h> ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/86510?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee76fa8b357aa472699f17789b2c718028f812a3 Gerrit-Change-Number: 86510 Gerrit-PatchSet: 4 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cindy Lu <luyi8(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 02:18:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Dinesh Gehlot <digehlot(a)google.com> [View Less]

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[S] Change in coreboot[main]: soc/intel/pantherlake: Display Sign-of-Life during memory training
by Subrata Banik (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Alok Agarwal, Anil Kumar K, Intel coreboot Reviewers, Jayvik Desai, Jérémy Compostella, Kapil Porwal, Paul Menzel, Pranava Y N, Vikrant L Jadeja. Subrata Banik has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/85454?usp=email ) Change subject: soc/intel/pantherlake: Display Sign-of-Life during memory training ...................................................................... Patch Set 21: (1 … [View More]comment) File src/soc/intel/pantherlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/85454/comment/e0e9b370_8a949317?us… : PS21, Line 387: m_cfg->VgaMessage = (efi_uintn_t)ux_locales_get_text(UX_LOCALE_MSG_MEMORY_TRAINING); > Why not try Jérémy's solution for now and use it for as many generations as it works in? "common" doesn't need to mean "it has to work in every SoC from now till the end of forever". As long as it's common between at least two SoCs and it's a large enough piece of code worth deduplicating, you can factor it out into common code. > > Just call the file `common/fsp_esol.c` for now, and if they eventually change the UPDs you can rename it to `common/fsp_esol_2025.c` and put a `common/fsp_esol_2028.c` or whatever with the new implementation next to it (or whatever other version distinguisher seems suitable for that). Then each SoC just needs to select the version that's applicable to them, but we still duplicate less code than if we had kept a separate copy for each SoC. (Compare, for example, how there's a `dpm_v1.c` and `dpm_v2.c` in `src/soc/mediatek/common`. `mt8188`, `mt8192` and `mt8195` refer to `dpm_v1.c` in their Makefiles, and `mt8196` and later will use `dpm_v2.c`. On the Arm boards we just tend to pull in common `.c` files from the SoC-specific Makefile so this pick-and-choose approach becomes particularly easy, but you can achieve the same with SoC-selected Kconfigs if you prefer too.) Since the inception of the IA common code, our approach has been to make things common based on their applicability. For example, SoC IP is used across multiple generations of SoCs, and features can be common across different SoC/platform generations. If we were to follow your suggestion, there would be many opportunities to make things common, but this could lead to a lot of unmanageable fragmentation. For example, we could have two different versions of the `fsp_esol` folder, one per year. This would be churn and wouldn't make sense because the logic of common code is based on either generic HW or generic FW features. We're not trying to make things common just because they use the same variable names. In the past, Intel CPU folks have tried to make common code in the same way you suggested, and it ended up creating multiple versions of the common folder. This happened because it's difficult to manage common code based on software commonality rather than a valid HW reason. In summary, I don't think we need to make common code just because it uses eSOL UPD name same between MTL and PTL. We might even introduce new UPDs, even for PTL, to might add new UPD to handle battery level and avoid string comparison for rendering differnt eSOL msg. Therefore, the suggestion for `fsp_esol_2025` still doesn't apply to anything beyond MTL at this point. -- To view, visit https://review.coreboot.org/c/coreboot/+/85454?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I993eb0d59cd01fa62f35a77f84e262e389efb367 Gerrit-Change-Number: 85454 Gerrit-PatchSet: 21 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Reviewer: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Anil Kumar K <anil.kumar.k(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Attention: Alok Agarwal <alok.agarwal(a)intel.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 02:05:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Jérémy Compostella <jeremy.compostella(a)intel.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> [View Less]

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[XS] Change in coreboot[main]: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP
by hualin wei (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik, hualin wei. Hello Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Qinghong Zeng, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86510?usp=email to look at the new patch set (#4). Change subject: mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP ..............… [View More]........................................................ mb/google/nissa/var/pujjoniru: Modify the gpio of GPIO_PCH_WP According to the circuit schematic diagram, pujjoniru uses GPP_E17 as a write-protected gpio, so it is necessary to add the GPIO_PCH_WP definition for GPP_E17 in gpio.h and add an if judgment so that the modification only takes effect on pujjoniru. BUG=b:396594296 TEST=wp status update verified by toggling it on and off. Change-Id: Iee76fa8b357aa472699f17789b2c718028f812a3 Signed-off-by: Hualin Wei <weihualin(a)huaqin.corp-partner.google.com> --- M src/mainboard/google/brya/variants/baseboard/nissa/include/baseboard/gpio.h M src/mainboard/google/brya/variants/pujjoniru/gpio.c 2 files changed, 7 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/86510/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/86510?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iee76fa8b357aa472699f17789b2c718028f812a3 Gerrit-Change-Number: 86510 Gerrit-PatchSet: 4 Gerrit-Owner: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Cindy Lu <luyi8(a)huaqin.corp-partner.google.com> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: hualin wei <weihualin(a)huaqin.corp-partner.google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Qinghong Zeng <zengqinghong(a)huaqin.corp-partner.google.com> [View Less]

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[XS] Change in coreboot[main]: mb/google/nissa/var/meliks: Add VBT data file
by SH Kim (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86508?usp=email ) Change subject: mb/google/nissa/var/meliks: Add VBT data file ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > but just verified the bootimage has the VBT from chrome-… [View More]

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[XS] Change in coreboot[main]: mb/google/nissa/var/meliks: Add VBT data file
by SH Kim (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Matt DeVillier, Nick Vaccaro, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86508?usp=email ) Change subject: mb/google/nissa/var/meliks: Add VBT data file ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: > > Do we really need this? […] I thought every board that … [View More]

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[L] Change in coreboot[main]: mb/google/nissa/var/meliks: Copy pirrha’s overridetree as initial one
by SH Kim (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Dinesh Gehlot, Eric Lai, Jayvik Desai, Kapil Porwal, Nick Vaccaro, Paul Menzel, Subrata Banik. SH Kim has posted comments on this change by SH Kim. ( https://review.coreboot.org/c/coreboot/+/86377?usp=email ) Change subject: mb/google/nissa/var/meliks: Copy pirrha’s overridetree as initial one ...................................................................... Patch Set 7: (1 comment) File src/mainboard/google/brya/variants/meliks/overridetree.cb: … [View More]

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[M] Change in coreboot[main]: mb/cwwk/adl: Various device tree fixes
by Brandon Weeks (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Felix Held. Brandon Weeks has posted comments on this change by Brandon Weeks. ( https://review.coreboot.org/c/coreboot/+/86260?usp=email ) Change subject: mb/cwwk/adl: Various device tree fixes ...................................................................... Patch Set 2: (1 comment) File src/mainboard/cwwk/adl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/86260/comment/ceb3086b_88dee500?us… : PS1, Line 17: PCIE_RP_AER > i'd say … [View More]

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coreboot-gerrit February 2025