coreboot-gerrit February 2025

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Disable HWRot's clocks
by Jarried Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86553?usp=email to look at the new patch set (#3). Change subject: soc/mediatek/mt8196: Disable HWRot's clocks ...................................................................... soc/mediatek/mt8196: Disable HWRot's clocks HWRot(Hardware Root of trust) are not used, so we disable its clocks to save power. This is a Vcore sub-block item that decreases SOC power consumption from 120mW to 90mW. BRANCH=rauru BUG=b:377628718 TEST=Bootup OK & Suspend/Resume passed Signed-off-by: Guangjie Song <guangjie.song(a)mediatek.com> Change-Id: I25e607e8e8b2d52608d279e1862f423ca50aab6a --- M src/soc/mediatek/mt8196/pll.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/86553/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/86553?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I25e607e8e8b2d52608d279e1862f423ca50aab6a Gerrit-Change-Number: 86553 Gerrit-PatchSet: 3 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat/var/felino: Enable CNVi wifi core
by Weimin Wu (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Jayvik Desai, Kapil Porwal, Pranava Y N, Tongtong Pan. Weimin Wu has posted comments on this change by Tongtong Pan. ( https://review.coreboot.org/c/coreboot/+/86549?usp=email ) Change subject: mb/google/fatcat/var/felino: Enable CNVi wifi core ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86549?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib5a98dc481b0c64612ffd50242262714f114b5b7 Gerrit-Change-Number: 86549 Gerrit-PatchSet: 1 Gerrit-Owner: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Weimin Wu <wuweimin(a)huaqin.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Dolan Liu <liuyong5(a)huaqin.corp-partner.google.com> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tongtong Pan <pantongtong(a)huaqin.corp-partner.google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 07:44:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Disable HWRot's clocks
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Save HW protect temperature to SRAM
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86551?usp=email ) Change subject: soc/mediatek/mt8196: Save HW protect temperature to SRAM ...................................................................... Patch Set 2: (3 comments) File src/soc/mediatek/mt8196/thermal.c: https://review.coreboot.org/c/coreboot/+/86551/comment/382005e2_ec8e6ef4?us… : PS2, Line 626: const struct lvts_thermal_controller *tc = &lvts_tscpu_g_tc[i]; : if (tc->ctrl_on_off == CTRL_OFF) : continue; you can still keep those. https://review.coreboot.org/c/coreboot/+/86551/comment/bcffbec2_e41dafa0?us… : PS2, Line 606: if (tc_num == LVTS_AP_CONTROLLER0) : tc_index = 0; : else if (tc_num == LVTS_AP_CONTROLLER1) : tc_index = 1; : : if (tc_index != 0xff) { : thermal_write_reboot_msr_sram(tc_index, raw_high); : if (tc_index == 0) : thermal_write_reboot_temp_sram(tc->reboot_temperature); : } ``` if (tc_num == LVTS_AP_CONTROLLER0 || tc_num == LVTS_AP_CONTROLLER1) { thermal_write_reboot_msr_sram(tc_num, raw_high); if (tc_num == LVTS_AP_CONTROLLER0) thermal_write_reboot_temp_sram(tc->reboot_temperature); } ``` File src/soc/mediatek/mt8196/thermal_sram.c: https://review.coreboot.org/c/coreboot/+/86551/comment/57ef3bb0_3d94d8e3?us… : PS2, Line 68: write32 write32p ? -- To view, visit https://review.coreboot.org/c/coreboot/+/86551?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib714c297871132907e286536c4b3aea1532f3869 Gerrit-Change-Number: 86551 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 07:26:15 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Adjust HW protect temperature
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86552?usp=email ) Change subject: soc/mediatek/mt8196: Adjust HW protect temperature ...................................................................... Patch Set 2: (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86552/comment/4d7496e6_9d8dea2c?us… : PS2, Line 7: HW protect temperature > thermal trip points Adjust thermal trip point parameters https://review.coreboot.org/c/coreboot/+/86552/comment/dbaed4fa_cfaf9e36?us… : PS2, Line 9: Adjust HW protect temperature so HW will trigger interrupt at expected : trip point. > Adjust thermal trip points so the thermal can trigger the interrupt at the expected trip point. Adjust thermal trip point parameters so the thermal can trigger the interrupt at the expected trip point. -- To view, visit https://review.coreboot.org/c/coreboot/+/86552?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7361edd7f75b82fff4241ec94488ed1ef07346f Gerrit-Change-Number: 86552 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 07:17:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Adjust HW protect temperature
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Jarried Lin, Yu-Ping Wu. Yidi Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/86552?usp=email ) Change subject: soc/mediatek/mt8196: Adjust HW protect temperature ...................................................................... Patch Set 2: Code-Review+1 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/86552/comment/8044976e_ecb5491c?us… : PS2, Line 7: HW protect temperature thermal trip points https://review.coreboot.org/c/coreboot/+/86552/comment/e8e242de_a4051d9a?us… : PS2, Line 9: Adjust HW protect temperature so HW will trigger interrupt at expected : trip point. Adjust thermal trip points so the thermal can trigger the interrupt at the expected trip point. -- To view, visit https://review.coreboot.org/c/coreboot/+/86552?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7361edd7f75b82fff4241ec94488ed1ef07346f Gerrit-Change-Number: 86552 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Comment-Date: Fri, 21 Feb 2025 07:16:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in blobs[main]: soc/mediatek/mt8196: Update MCUPM firmware to v1.2
by Yidi Lin (Code Review) 20 Feb '25

20 Feb '25

Yidi Lin has submitted this change. ( https://review.coreboot.org/c/blobs/+/86511?usp=email ) Change subject: soc/mediatek/mt8196: Update MCUPM firmware to v1.2 ...................................................................... soc/mediatek/mt8196: Update MCUPM firmware to v1.2 Update coefficient for MCU-LVTS reboot temperature setting. TEST=NA BUG=b:317009620 BRANCH=rauru Change-Id: I81e745a7290c31fe15240102df0a78dfaadf54e7 Signed-off-by: Agogo Huang <agogo.huang(a)mediatek.corp-partner.google.com> --- M soc/mediatek/mt8196/mcupm.bin M soc/mediatek/mt8196/mcupm.bin.md5 M soc/mediatek/mt8196/mcupm_release_notes.txt 3 files changed, 4 insertions(+), 1 deletion(-) Approvals: Yu-Ping Wu: Verified; Looks good to me, approved Yidi Lin: Looks good to me, approved diff --git a/soc/mediatek/mt8196/mcupm.bin b/soc/mediatek/mt8196/mcupm.bin index 74511bc..ead1d2c 100644 --- a/soc/mediatek/mt8196/mcupm.bin +++ b/soc/mediatek/mt8196/mcupm.bin Binary files differ diff --git a/soc/mediatek/mt8196/mcupm.bin.md5 b/soc/mediatek/mt8196/mcupm.bin.md5 index 516b6cb..e36e835 100644 --- a/soc/mediatek/mt8196/mcupm.bin.md5 +++ b/soc/mediatek/mt8196/mcupm.bin.md5 @@ -1 +1 @@ -ce38fc137fc836aad29e87da328e6822 *mcupm.bin +eb28b00b595a1c290bcd05f159622676 *mcupm.bin diff --git a/soc/mediatek/mt8196/mcupm_release_notes.txt b/soc/mediatek/mt8196/mcupm_release_notes.txt index fc1e033..b6e9c59 100644 --- a/soc/mediatek/mt8196/mcupm_release_notes.txt +++ b/soc/mediatek/mt8196/mcupm_release_notes.txt @@ -7,3 +7,6 @@ # Version 1.1 1. Change to use MTK release branch. 2. Improve the CPU frequency to 3.6 GHz. + +# Version 1.2 +1. Update coefficient for MCU-LVTS reboot temperature setting. -- To view, visit https://review.coreboot.org/c/blobs/+/86511?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: merged Gerrit-Project: blobs Gerrit-Branch: main Gerrit-Change-Id: I81e745a7290c31fe15240102df0a78dfaadf54e7 Gerrit-Change-Number: 86511 Gerrit-PatchSet: 3 Gerrit-Owner: agogo <agogo.huang(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Save HW protect temperature to SRAM
by Jarried Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, Zhaoqing Jiu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86551?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Save HW protect temperature to SRAM ...................................................................... soc/mediatek/mt8196: Save HW protect temperature to SRAM It will restore the HW protection settings based on the data saved in the SRAM, after the system suspends and resumes. BRANCH=rauru BUG=b:389026545 TEST=Boot up and check temperature in coreboot log: [INFO ] [LVTS_MSR] ts0 msr_all=141d0, msr_temp=16848, temp=41086 [INFO ] lvts_tscpu_thermal_read_tc_temp order 0 ts_name 0 temp 41086 rg_temp 41073(42059) [INFO ] [LVTS_MSR] ts1 msr_all=141e3, msr_temp=16867, temp=41540 [INFO ] lvts_tscpu_thermal_read_tc_temp order 1 ts_name 1 temp 41540 rg_temp 41526(42523) [INFO ] [LVTS_MSR] ts2 msr_all=14199, msr_temp=16793, temp=39772[0m [INFO ] lvts_tscpu_thermal_read_tc_temp order 2 ts_name 2 temp 39772 rg_temp 39760(40715) [INFO ] [LVTS_MSR] ts3 msr_all=141c2, msr_temp=16834, temp=40751 [INFO ] lvts_tscpu_thermal_read_tc_temp order 3 ts_name 3 temp 40751 rg_temp 40739(41717) [INFO ] [LVTS_MSR] ts4 msr_all=141d0, msr_temp=16848, temp=41086 [INFO ] lvts_tscpu_thermal_read_tc_temp order 0 ts_name 4 temp 41086 rg_temp 41073(42059) [INFO ] [LVTS_MSR] ts5 msr_all=141b3, msr_temp=16819, temp=40393 [INFO ] lvts_tscpu_thermal_read_tc_temp order 1 ts_name 5 temp 40393 rg_temp 40380(41350) [INFO ] [LVTS_MSR] ts6 msr_all=14194, msr_temp=16788, temp=39652 [INFO ] lvts_tscpu_thermal_read_tc_temp order 2 ts_name 6 temp 39652 rg_temp 39641(40593) [INFO ] [LVTS_MSR] ts7 msr_all=14186, msr_temp=16774, temp=39318 [INFO ] lvts_tscpu_thermal_read_tc_temp order 3 ts_name 7 temp 39318 rg_temp 39307(40251) Signed-off-by: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Change-Id: Ib714c297871132907e286536c4b3aea1532f3869 --- M src/soc/mediatek/mt8196/include/soc/thermal.h M src/soc/mediatek/mt8196/thermal.c M src/soc/mediatek/mt8196/thermal_sram.c 3 files changed, 34 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/51/86551/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86551?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib714c297871132907e286536c4b3aea1532f3869 Gerrit-Change-Number: 86551 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[XS] Change in coreboot[main]: soc/mediatek/mt8196: Adjust HW protect temperature
by Jarried Lin (Code Review) 20 Feb '25

20 Feb '25

Attention is currently required from: Hung-Te Lin, Yidi Lin, Yu-Ping Wu. Hello Hung-Te Lin, Yidi Lin, Yu-Ping Wu, Zhaoqing Jiu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86552?usp=email to look at the new patch set (#2). Change subject: soc/mediatek/mt8196: Adjust HW protect temperature ...................................................................... soc/mediatek/mt8196: Adjust HW protect temperature Adjust HW protect temperature so HW will trigger interrupt at expected trip point. BRANCH=rauru BUG=b:389026545 TEST=Boot up and check temperature in coreboot log: [INFO ] [LVTS_MSR] ts0 msr_all=141d0, msr_temp=16848, temp=41086 [INFO ] lvts_tscpu_thermal_read_tc_temp order 0 ts_name 0 temp 41086 rg_temp 41073(42059) [INFO ] [LVTS_MSR] ts1 msr_all=141e3, msr_temp=16867, temp=41540 [INFO ] lvts_tscpu_thermal_read_tc_temp order 1 ts_name 1 temp 41540 rg_temp 41526(42523) [INFO ] [LVTS_MSR] ts2 msr_all=14199, msr_temp=16793, temp=39772[0m [INFO ] lvts_tscpu_thermal_read_tc_temp order 2 ts_name 2 temp 39772 rg_temp 39760(40715) [INFO ] [LVTS_MSR] ts3 msr_all=141c2, msr_temp=16834, temp=40751 [INFO ] lvts_tscpu_thermal_read_tc_temp order 3 ts_name 3 temp 40751 rg_temp 40739(41717) [INFO ] [LVTS_MSR] ts4 msr_all=141d0, msr_temp=16848, temp=41086 [INFO ] lvts_tscpu_thermal_read_tc_temp order 0 ts_name 4 temp 41086 rg_temp 41073(42059) [INFO ] [LVTS_MSR] ts5 msr_all=141b3, msr_temp=16819, temp=40393 [INFO ] lvts_tscpu_thermal_read_tc_temp order 1 ts_name 5 temp 40393 rg_temp 40380(41350) [INFO ] [LVTS_MSR] ts6 msr_all=14194, msr_temp=16788, temp=39652 [INFO ] lvts_tscpu_thermal_read_tc_temp order 2 ts_name 6 temp 39652 rg_temp 39641(40593) [INFO ] [LVTS_MSR] ts7 msr_all=14186, msr_temp=16774, temp=39318 [INFO ] lvts_tscpu_thermal_read_tc_temp order 3 ts_name 7 temp 39318 rg_temp 39307(40251) Signed-off-by: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Change-Id: Ia7361edd7f75b82fff4241ec94488ed1ef07346f --- M src/soc/mediatek/mt8196/include/soc/thermal_internal.h 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/52/86552/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86552?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia7361edd7f75b82fff4241ec94488ed1ef07346f Gerrit-Change-Number: 86552 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[S] Change in coreboot[main]: soc/mediatek/mt8196: Adjust and save HW protect temperature to SRAM
by Jarried Lin (Code Review) 20 Feb '25

20 Feb '25

Jarried Lin has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/86533?usp=email ) Change subject: soc/mediatek/mt8196: Adjust and save HW protect temperature to SRAM ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/86533?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: abandon Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ied0a7e710e77a4e74372590374f9342c5edc9122 Gerrit-Change-Number: 86533 Gerrit-PatchSet: 2 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhaoqing Jiu <zhaoqing.jiu(a)mediatek.corp-partner.google.com>

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