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Change subject: soc/intel/pantherlake: Enable FSP debug log level control using CBFS
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Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86002/comment/e2a1e607_6cd2efdf?us… :
PS9, Line 22: This capability is particularly useful when debugging issues that require
> `Possible unwrapped commit description (prefer a maximum 72 chars per line)`
Please fix.
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Change subject: soc/intel/pantherlake: Enable FSP debug log level control using CBFS
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Patch Set 9:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/86002/comment/64cdc922_f777514c?us… :
PS9, Line 9: This commit enables the FSP_DEBUG_LOG_LEVEL_USING_CBFS Kconfig option
Not anymore.
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Change subject: soc/intel/pantherlake: Update FSPM Trace parameters
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Patch Set 1:
(2 comments)
File src/soc/intel/pantherlake/Kconfig:
https://review.coreboot.org/c/coreboot/+/85614/comment/7e270d49_5e9b8716?us… :
PS1, Line 97: select SOC_INTEL_DEBUG_CONSENT # TODO: Remove the safe setting for ES SoC
we need to revert the CL which is better for the git history
File src/soc/intel/pantherlake/romstage/fsp_params.c:
https://review.coreboot.org/c/coreboot/+/85614/comment/f8c0c65f_f0e8e63d?us… :
PS1, Line 254: m_cfg->CpuCrashLogEnable = CONFIG(SOC_INTEL_CRASHLOG);
i don't see a need to do this because `SOC_INTEL_COMMON_BLOCK_TRACEHUB` is default enabled but if you still wish to do this then better submit a separate CL
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Change subject: soc/mediatek/mt8196: Add mtk_fsp_romstage version v1.0
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Patch Set 2:
(4 comments)
Commit Message:
https://review.coreboot.org/c/blobs/+/86110/comment/f93304e9_e954a85a?usp=e… :
PS2, Line 9: It is a new blob named MediaTek firmware support package (mtk-fsp) in
: romstage include power switch init.
mtk_fsp_romstage initializes power switch in romstage.
File soc/mediatek/mt8196/README.md:
https://review.coreboot.org/c/blobs/+/86110/comment/ab2a9b18_a97a3e32?usp=e… :
PS2, Line 244: in
to
https://review.coreboot.org/c/blobs/+/86110/comment/10d9114b_4b9d73b9?usp=e… :
PS2, Line 245: such as the CVCC (Constant Voltage, Constant Current)
: voltage of SRAM.
such as Constant Voltage, Constant Current of SRAM.
File soc/mediatek/mt8196/mtk_fsp_romstage_release_notes.txt:
https://review.coreboot.org/c/blobs/+/86110/comment/466bba68_7325a18e?usp=e… :
PS2, Line 4:
`2. Included changes:` ?
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Change subject: mb/google/rauru: Enable RTC
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Patch Set 13: Code-Review+2
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