coreboot-gerrit January 2025

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[XS] Change in coreboot[main]: soc/intel/alderlake/romstage: Disable UFS controller on every boot
by Karthik Ramasubramanian (Code Review) 22 Jan '25

22 Jan '25

Karthik Ramasubramanian has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/86111?usp=email ) Change subject: soc/intel/alderlake/romstage: Disable UFS controller on every boot ...................................................................... soc/intel/alderlake/romstage: Disable UFS controller on every boot On boards with non-UFS storage, currently UFS controller is disabled only when the system is coming out of S5 sleep state. On certain kind of resets during boot flow, this leaves some UFS resources turned on and causing the suspend failure. To fix this issue, disable UFS controller on every boot cycle. BUG=b:391449110 TEST=Build Brox BIOS image and boot to OS. Ensure that when the device switches from normal mode to developer mode and vice-versa, the device is able to suspend/resume successfully. Change-Id: I1d7089a90bc42a2b36c26b05b81c1a2f12861fdc Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com> --- M src/soc/intel/alderlake/romstage/romstage.c 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/86111/1 diff --git a/src/soc/intel/alderlake/romstage/romstage.c b/src/soc/intel/alderlake/romstage/romstage.c index daf2b76..2f07236 100644 --- a/src/soc/intel/alderlake/romstage/romstage.c +++ b/src/soc/intel/alderlake/romstage/romstage.c @@ -197,9 +197,9 @@ /* Program to Disable UFS Controllers */ if (!is_devfn_enabled(PCH_DEVFN_UFS) && (CONFIG(USE_UNIFIED_AP_FIRMWARE_FOR_UFS_AND_NON_UFS))) { + printk(BIOS_INFO, "Disabling UFS controllers\n"); + disable_ufs(); if (ps->prev_sleep_state == ACPI_S5 && !mainboard_expects_another_reset()) { - printk(BIOS_INFO, "Disabling UFS controllers\n"); - disable_ufs(); printk(BIOS_INFO, "Warm Reset after disabling UFS controllers\n"); system_reset(); } -- To view, visit https://review.coreboot.org/c/coreboot/+/86111?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newchange Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1d7089a90bc42a2b36c26b05b81c1a2f12861fdc Gerrit-Change-Number: 86111 Gerrit-PatchSet: 1 Gerrit-Owner: Karthik Ramasubramanian <kramasub(a)google.com>

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[XL] Change in coreboot[main]: mb/novacustom: add V5x0TU board (Meteor Lake)
by Krystian Hebel (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Maciej Pijanowski, Michał Kopeć, Michał Żygowski, Paul Menzel, Tim Crawford. Krystian Hebel has posted comments on this change by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/82673?usp=email ) Change subject: mb/novacustom: add V5x0TU board (Meteor Lake) ...................................................................... Patch Set 25: (1 comment) File src/mainboard/novacustom/mtl-h/vboot-rwab.fmd: https://review.coreboot.org/c/coreboot/+/82673/comment/7fce1c6d_aaef8e83?us… : PS21, Line 15: # MTL does not support a region crossing this boundary, > The discontinuous extended bios window exists since Alder Lake. […] Acknowledged -- To view, visit https://review.coreboot.org/c/coreboot/+/82673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Gerrit-Change-Number: 82673 Gerrit-PatchSet: 25 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Wed, 22 Jan 2025 19:29:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Kopeć <michal.kopec(a)3mdeb.com> Comment-In-Reply-To: Krystian Hebel <krystian.hebel(a)3mdeb.com>

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[XL] Change in coreboot[main]: mb/novacustom: add V5x0TU board (Meteor Lake)
by Michał Kopeć (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Krystian Hebel, Maciej Pijanowski, Michał Żygowski, Paul Menzel, Tim Crawford. Michał Kopeć has posted comments on this change by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/82673?usp=email ) Change subject: mb/novacustom: add V5x0TU board (Meteor Lake) ...................................................................... Patch Set 25: (1 comment) File src/mainboard/novacustom/mtl-h/romstage.c: https://review.coreboot.org/c/coreboot/+/82673/comment/f21aa191_59b0044b?us… : PS21, Line 13: .rcomp = { : /* Values for MTL-H DDR5 2R */ : .resistor = 100, : : .targets = {70, 30, 25, 25, 25}, : }, > These should not be needed anymore right? You're right, removed. -- To view, visit https://review.coreboot.org/c/coreboot/+/82673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Gerrit-Change-Number: 82673 Gerrit-PatchSet: 25 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Comment-Date: Wed, 22 Jan 2025 18:47:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com>

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[XL] Change in coreboot[main]: mb/novacustom: add V5x0TU board (Meteor Lake)
by Michał Kopeć (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Krystian Hebel, Maciej Pijanowski, Michał Kopeć, Michał Żygowski, Paul Menzel, Tim Crawford. Hello Krystian Hebel, Maciej Pijanowski, Michał Żygowski, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/82673?usp=email to look at the new patch set (#25). The following approvals got outdated and were removed: Verified-1 by build bot (Jenkins) Change subject: mb/novacustom: add V5x0TU board (Meteor Lake) ...................................................................... mb/novacustom: add V5x0TU board (Meteor Lake) NovaCustom (Clevo) V5x0TU are two boards with Intel Core Ultra (Meteor Lake) series processors. Two variants (V540TU and V560TU) are supported. Their EC firmware is different due to keyboard layout changes. On coreboot's side, the only difference are SMBIOS strings. Working: - DDR5 SODIMM in slot RAM2 - M.2 2280 PCIe slots - Thunderbolt, USB ports - Video outputs in OS and firmware - I2C touchpad, webcam, SD Card reader - S0ix - Booting Ubuntu 24.04 with edk2 UefiPayload - Vboot, TPM measured boot Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> --- A src/mainboard/novacustom/Kconfig A src/mainboard/novacustom/Kconfig.name A src/mainboard/novacustom/mtl-h/Kconfig A src/mainboard/novacustom/mtl-h/Kconfig.name A src/mainboard/novacustom/mtl-h/Makefile.mk A src/mainboard/novacustom/mtl-h/acpi/backlight.asl A src/mainboard/novacustom/mtl-h/acpi/mainboard.asl A src/mainboard/novacustom/mtl-h/board_info.txt A src/mainboard/novacustom/mtl-h/bootblock.c A src/mainboard/novacustom/mtl-h/cmos.default A src/mainboard/novacustom/mtl-h/cmos.layout A src/mainboard/novacustom/mtl-h/data.vbt A src/mainboard/novacustom/mtl-h/devicetree.cb A src/mainboard/novacustom/mtl-h/dsdt.asl A src/mainboard/novacustom/mtl-h/fadt.c A src/mainboard/novacustom/mtl-h/gpio.c A src/mainboard/novacustom/mtl-h/gpio_early.c A src/mainboard/novacustom/mtl-h/hda_verb.c A src/mainboard/novacustom/mtl-h/include/mainboard/gpio.h A src/mainboard/novacustom/mtl-h/ramstage.c A src/mainboard/novacustom/mtl-h/romstage.c A src/mainboard/novacustom/mtl-h/vboot-rwab.fmd 22 files changed, 1,388 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/82673/25 -- To view, visit https://review.coreboot.org/c/coreboot/+/82673?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I82c73ddb1e76a9baf9b97e13124aa249ae1c2771 Gerrit-Change-Number: 82673 Gerrit-PatchSet: 25 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Tim Crawford <tcrawford(a)system76.com> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Attention: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Krystian Hebel <krystian.hebel(a)3mdeb.com>

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[M] Change in coreboot[main]: mb/amd/birman_plus: Kconfig
by Maximilian Brune (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Ana Carolina Cabral, Martin Roth, Paul Menzel. Maximilian Brune has posted comments on this change by Ana Carolina Cabral. ( https://review.coreboot.org/c/coreboot/+/85493?usp=email ) Change subject: mb/amd/birman_plus: Kconfig ...................................................................... Patch Set 17: Code-Review+2 (2 comments) Patchset: PS17: I checked the referenced user guide and it looks good to me. Commit Message: https://review.coreboot.org/c/coreboot/+/85493/comment/2b0afbb9_33d70df0?us… : PS17, Line 7: mb Maybe a bit more specific like: ``` mb/amd/birman_plus: Update PCIe Slot configurations ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/85493?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia310ea616006479b9a052afb99d08df6a11431f4 Gerrit-Change-Number: 85493 Gerrit-PatchSet: 17 Gerrit-Owner: Ana Carolina Cabral Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-CC: Nick Kochlowski <nickkochlowski(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Martin Roth <martin.roth(a)amd.corp-partner.google.com> Gerrit-Attention: Ana Carolina Cabral Gerrit-Comment-Date: Wed, 22 Jan 2025 18:45:22 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: ec/dasharo: Add dependancy to EC_DASHARO_EC_FLASH_SIZE
by Felix Singer (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Michał Żygowski, Sean Rhodes. Felix Singer has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/86109?usp=email ) Change subject: ec/dasharo: Add dependancy to EC_DASHARO_EC_FLASH_SIZE ...................................................................... Patch Set 1: (1 comment) File src/ec/dasharo/ec/Kconfig: https://review.coreboot.org/c/coreboot/+/86109/comment/0603f9e6_2c611768?us… : PS1, Line 9: config EC_DASHARO_EC_BAT_THRESHOLDS : depends on EC_DASHARO_EC : bool : default y : : config EC_DASHARO_EC_DGPU : depends on EC_DASHARO_EC : bool : default n : : config EC_DASHARO_EC_UPDATE : depends on EC_DASHARO_EC : bool "Update the embedded controller firmware" : default n : : config EC_DASHARO_EC_UPDATE_FILE : depends on EC_DASHARO_EC_UPDATE : string "Path to the EC update file" : default "ec.rom" : : config EC_DASHARO_EC_FLASH_SIZE : depends on EC_DASHARO_EC : hex : default 0x20000 Maybe just guard to the whole thing. -- To view, visit https://review.coreboot.org/c/coreboot/+/86109?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icce0c7a31c89cea5e7bf89770dedbf82ff56170b Gerrit-Change-Number: 86109 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Comment-Date: Wed, 22 Jan 2025 18:42:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: soc/intel/cmn/cnvi: Fix scope of CFLR ACPI method
by Cliff Huang (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Matt DeVillier. Cliff Huang has posted comments on this change by Matt DeVillier. ( https://review.coreboot.org/c/coreboot/+/86092?usp=email ) Change subject: soc/intel/cmn/cnvi: Fix scope of CFLR ACPI method ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/86092?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I7065e24626b2f763868909b8f85a8f18b4cc229b Gerrit-Change-Number: 86092 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Wed, 22 Jan 2025 18:36:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: Revert "UPSTREAM: soc/intel/pantherlake: Update PlatformDebugOption t...
by Jérémy Compostella (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86105?usp=email ) Change subject: Revert "UPSTREAM: soc/intel/pantherlake: Update PlatformDebugOption to Trace Ready" ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86105?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1a0f66d7ddf84622820f82c559d7d6b846ba3a7d Gerrit-Change-Number: 86105 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 22 Jan 2025 18:17:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/pantherlake: Add platform debug option for FSP
by Jérémy Compostella (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Intel coreboot Reviewers, Jayvik Desai, Kapil Porwal, Pranava Y N, Subrata Banik. Jérémy Compostella has posted comments on this change by Subrata Banik. ( https://review.coreboot.org/c/coreboot/+/86104?usp=email ) Change subject: soc/intel/pantherlake: Add platform debug option for FSP ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/86104?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ie77a4cc8073fdffb1b26f92597c67465e15e21d8 Gerrit-Change-Number: 86104 Gerrit-PatchSet: 2 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 22 Jan 2025 18:17:12 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: soc/intel/pantherlake: Update FSPM Trace parameters
by Jérémy Compostella (Code Review) 22 Jan '25

22 Jan '25

Attention is currently required from: Bora Guvendik, Intel coreboot Reviewers, Jamie Ryu, Jayvik Desai, Kapil Porwal, Pranava Y N, Sowmya Aralguppe, Vikrant L Jadeja, Wonkyu Kim. Jérémy Compostella has posted comments on this change by Jamie Ryu. ( https://review.coreboot.org/c/coreboot/+/85614?usp=email ) Change subject: soc/intel/pantherlake: Update FSPM Trace parameters ...................................................................... Patch Set 1: (2 comments) File src/soc/intel/pantherlake/Kconfig: https://review.coreboot.org/c/coreboot/+/85614/comment/9361ca69_904c3725?us… : PS1, Line 97: select SOC_INTEL_DEBUG_CONSENT # TODO: Remove the safe setting for ES SoC > we need to revert the CL which is better for the git history +1 File src/soc/intel/pantherlake/romstage/fsp_params.c: https://review.coreboot.org/c/coreboot/+/85614/comment/9df78093_25998b55?us… : PS1, Line 254: m_cfg->CpuCrashLogEnable = CONFIG(SOC_INTEL_CRASHLOG); > i don't see a need to do this because `SOC_INTEL_COMMON_BLOCK_TRACEHUB` is default enabled but if yo […] I would think that now that that this non-dependency has been identified and considering the very low cost of pushing the change, we should do it. -- To view, visit https://review.coreboot.org/c/coreboot/+/85614?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6f37e9f4a1f55ffc576af955c92d4073068eb97a Gerrit-Change-Number: 85614 Gerrit-PatchSet: 1 Gerrit-Owner: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Jayvik Desai <jayvik(a)google.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jayvik Desai <jayvik(a)google.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Vikrant L Jadeja <vikrant.l.jadeja(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Wed, 22 Jan 2025 18:11:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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coreboot-gerrit January 2025