coreboot-gerrit September 2024

coreboot-gerrit@coreboot.org

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[XL] Change in coreboot[main]: mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant
by Sean Rhodes (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Matt DeVillier. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/74445?usp=email to look at the new patch set (#9). Change subject: mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant ...................................................................... mb/starlabs/starfighter: Add Raptor Lake StarFighter Mk I variant Tested using `edk2` from `github.com/starlabsltd/edk2/tree/uefipayload_vs`: * Windows 10 * Ubuntu 20.04 * MX Linux 19.4 * Manjaro 21 No known issues. https://starlabs.systems/pages/starfighter-specification Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> Change-Id: I046e70845a5201d6f6ab062aee91fa8be9728737 --- M Documentation/mainboard/index.md A Documentation/mainboard/starlabs/starfighter_rpl.md A src/mainboard/starlabs/starfighter/Kconfig A src/mainboard/starlabs/starfighter/Kconfig.name A src/mainboard/starlabs/starfighter/Makefile.mk A src/mainboard/starlabs/starfighter/acpi/ec.asl A src/mainboard/starlabs/starfighter/acpi/mainboard.asl A src/mainboard/starlabs/starfighter/acpi/sleep.asl A src/mainboard/starlabs/starfighter/acpi/superio.asl A src/mainboard/starlabs/starfighter/board_info.txt A src/mainboard/starlabs/starfighter/bootblock.c A src/mainboard/starlabs/starfighter/cmos.default A src/mainboard/starlabs/starfighter/cmos.layout A src/mainboard/starlabs/starfighter/dsdt.asl A src/mainboard/starlabs/starfighter/hda_verb.c A src/mainboard/starlabs/starfighter/include/variants.h A src/mainboard/starlabs/starfighter/mainboard.c A src/mainboard/starlabs/starfighter/smbios.c A src/mainboard/starlabs/starfighter/spd/16gb.spd.hex A src/mainboard/starlabs/starfighter/spd/32gb.spd.hex A src/mainboard/starlabs/starfighter/spd/64gb.spd.hex A src/mainboard/starlabs/starfighter/spd/Makefile.mk A src/mainboard/starlabs/starfighter/variants/rpl/Makefile.mk A src/mainboard/starlabs/starfighter/variants/rpl/board.fmd A src/mainboard/starlabs/starfighter/variants/rpl/data.vbt A src/mainboard/starlabs/starfighter/variants/rpl/devicetree.cb A src/mainboard/starlabs/starfighter/variants/rpl/devtree.c A src/mainboard/starlabs/starfighter/variants/rpl/gpio.c A src/mainboard/starlabs/starfighter/variants/rpl/hda_verb.c A src/mainboard/starlabs/starfighter/variants/rpl/ramstage.c A src/mainboard/starlabs/starfighter/variants/rpl/romstage.c A src/mainboard/starlabs/starfighter/vboot.c 32 files changed, 1,775 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/74445/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/74445?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I046e70845a5201d6f6ab062aee91fa8be9728737 Gerrit-Change-Number: 74445 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/cnvi: Add PRR method for CNVi Reset
by Matt DeVillier (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/83557?usp=email ) Change subject: soc/intel/cnvi: Add PRR method for CNVi Reset ...................................................................... Patch Set 16: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83557?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I25e8462780badcad88b13052a6eb282c83af5def Gerrit-Change-Number: 83557 Gerrit-PatchSet: 16 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 30 Sep 2024 14:53:07 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/cnvi: Add GBTE Method
by Sean Rhodes (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Matt DeVillier. Sean Rhodes has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/83715?usp=email ) Change subject: soc/intel/cnvi: Add GBTE Method ...................................................................... Patch Set 12: (1 comment) File src/soc/intel/common/block/cnvi/cnvi.c: https://review.coreboot.org/c/coreboot/+/83715/comment/cfb54f6c_461d1dd2?us… : PS5, Line 300: 0x090a0000 > do we have any idea where this value comes from? Address of VGPIO_0 -- To view, visit https://review.coreboot.org/c/coreboot/+/83715?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8f6b97b0961579f36cd053b0252213c3335b1c62 Gerrit-Change-Number: 83715 Gerrit-PatchSet: 12 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Comment-Date: Mon, 30 Sep 2024 14:53:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: drivers/usb/acpi: Add PRR Method for Intel Bluetooth
by Matt DeVillier (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Sean Rhodes, Subrata Banik. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84145?usp=email ) Change subject: drivers/usb/acpi: Add PRR Method for Intel Bluetooth ...................................................................... Patch Set 9: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84145?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9c7fd286e8630d77d79d1d7cd113ce3a3d3d0fe3 Gerrit-Change-Number: 84145 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Mon, 30 Sep 2024 14:48:47 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: drivers/usb/acpi: Add a Power Resource for Intel Bluetooth
by Matt DeVillier (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Sean Rhodes, Subrata Banik. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84146?usp=email ) Change subject: drivers/usb/acpi: Add a Power Resource for Intel Bluetooth ...................................................................... Patch Set 8: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84146?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3b25fd180e21100e3cb001fc6ba0da7f47b2ad12 Gerrit-Change-Number: 84146 Gerrit-PatchSet: 8 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: coreboot org <coreboot.org(a)gmail.com> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Comment-Date: Mon, 30 Sep 2024 14:48:41 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/common/cnvi: Add CNMT Mutex
by Matt DeVillier (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/84598?usp=email ) Change subject: soc/intel/common/cnvi: Add CNMT Mutex ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84598?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I607865458f925d6f4aa713e07cfa34e83b2e5c8f Gerrit-Change-Number: 84598 Gerrit-PatchSet: 5 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 30 Sep 2024 14:48:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/starlabs/starbook/adl: Disconnect SCI/SMI GPIOs
by Matt DeVillier (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/83691?usp=email ) Change subject: mb/starlabs/starbook/adl: Disconnect SCI/SMI GPIOs ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/83691?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I507aa59fcf2540ae6170896a51aa952f5e73eee8 Gerrit-Change-Number: 83691 Gerrit-PatchSet: 2 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Mon, 30 Sep 2024 14:44:23 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/intel/cnvi: Add power related methods
by Sean Rhodes (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83711?usp=email to look at the new patch set (#9). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/cnvi: Add power related methods ...................................................................... soc/intel/cnvi: Add power related methods Only the PRR method is used here, however, PS0, PS3 and DSM must exist to avoid a BSOD on Windows. Change-Id: Ib4a1a8a76ce74b991a3e8686e9594c2c2b145a39 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 22 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/83711/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/83711?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib4a1a8a76ce74b991a3e8686e9594c2c2b145a39 Gerrit-Change-Number: 83711 Gerrit-PatchSet: 9 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[M] Change in coreboot[main]: soc/intel/cnvi: Add PRR method for CNVi Reset
by Sean Rhodes (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83557?usp=email to look at the new patch set (#16). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/cnvi: Add PRR method for CNVi Reset ...................................................................... soc/intel/cnvi: Add PRR method for CNVi Reset Add a _PRR method that the OS can use to reset the wireless. This is only used for integrated solutions. Intel document #559910 details this. Change-Id: I25e8462780badcad88b13052a6eb282c83af5def Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 187 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/83557/16 -- To view, visit https://review.coreboot.org/c/coreboot/+/83557?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I25e8462780badcad88b13052a6eb282c83af5def Gerrit-Change-Number: 83557 Gerrit-PatchSet: 16 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[S] Change in coreboot[main]: soc/intel/cnvi: Add GBTE Method
by Sean Rhodes (Code Review) 30 Sep '24

30 Sep '24

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Matt DeVillier, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/83715?usp=email to look at the new patch set (#11). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: soc/intel/cnvi: Add GBTE Method ...................................................................... soc/intel/cnvi: Add GBTE Method Add Get Bluetooth Enable method which gets the Tx state of the BTEN vGPIO. Change-Id: I8f6b97b0961579f36cd053b0252213c3335b1c62 Signed-off-by: Sean Rhodes <sean(a)starlabs.systems> --- M src/soc/intel/common/block/cnvi/cnvi.c 1 file changed, 17 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/83715/11 -- To view, visit https://review.coreboot.org/c/coreboot/+/83715?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I8f6b97b0961579f36cd053b0252213c3335b1c62 Gerrit-Change-Number: 83715 Gerrit-PatchSet: 11 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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coreboot-gerrit September 2024