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Change subject: soc/intel/meteorlake: Exclude deprecated upd from FSP2.4 builds
......................................................................
Patch Set 3:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/82699/comment/0a1aedca_778bb5ea?us… :
PS3, Line 9: EnableMultiPhaseSiliconInit upd is deprecated and has been
: removed starting with v2.4 of FSP specification.
> It is removed from header and FSP is not depending on this UPD to enable it with 2.4. […]
Have you confirmed the default value is 1 aka enabled now.
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Change subject: soc/intel/meteorlake: Exclude deprecated upd from FSP2.4 builds
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Patch Set 3: Code-Review+2
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Change subject: vc/intel/fsp/mtl: Add x86_64 FSP V3471.91 headers
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Patch Set 10: Code-Review+2
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Change subject: vc/intel/fsp/mtl: Organize FSP headers into x86_32 directory
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Patch Set 14: Code-Review+2
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Change subject: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility
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Patch Set 19: Code-Review+2
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Change subject: soc/intel/meteorlake: Exclude deprecated upd from FSP2.4 builds
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Patch Set 3: Code-Review+2
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Felix Singer has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82663?usp=email )
Change subject: mb/siemens/mc_ehl5: Remove DDI settings from devicetree
......................................................................
mb/siemens/mc_ehl5: Remove DDI settings from devicetree
Since this mainboard no longer uses the FSP GOP driver, the DDI port
settings are no longer necessary. The GOP driver was used in the initial
phase of development where we used Tianocore as payload for some test
cases. Finally, this mainboard uses a self-made Linux payload, which
does the graphic initialization.
BUG=none
TEST=Boot into Linux and check if graphic works correctly
Change-Id: Ie9e135fbc2627546d6ef95d7d5ff3e9a9222b5d2
Signed-off-by: Mario Scheithauer <mario.scheithauer(a)siemens.com>
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Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de>
---
M src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
1 file changed, 0 insertions(+), 3 deletions(-)
Approvals:
Paul Menzel: Looks good to me, but someone else must approve
Werner Zeh: Looks good to me, approved
Uwe Poeche: Looks good to me, but someone else must approve
build bot (Jenkins): Verified
Felix Singer: Looks good to me, approved
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
index 43697be..8fe9b93 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl5/devicetree.cb
@@ -103,9 +103,6 @@
register "pse_tsn_phy_irq_edge[0]" = "RISING_EDGE"
register "pse_tsn_phy_irq_edge[1]" = "RISING_EDGE"
- register "DdiPortAHpd" = "1"
- register "DdiPortADdc" = "1"
-
register "common_soc_config" = "{
.i2c[1] = {
.speed = I2C_SPEED_STANDARD,
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Change subject: soc/intel/meteorlake: Adjust FSP parameters for FSP2.4 compatibility
......................................................................
Patch Set 19: Code-Review+2
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