coreboot-gerrit May 2024

coreboot-gerrit@coreboot.org

1 participants
3266 discussions

[S] Change in coreboot[main]: mb/razer/blade_stealth_kbl: add panel_cfg
by Nico Huber (Code Review) 30 May '24

30 May '24

Attention is currently required from: Paul Menzel, Reagan. Nico Huber has posted comments on this change by Reagan. ( https://review.coreboot.org/c/coreboot/+/82458?usp=email ) Change subject: mb/razer/blade_stealth_kbl: add panel_cfg ...................................................................... Patch Set 16: (1 comment) File src/mainboard/razer/blade_stealth_kbl/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82458/comment/4bf2fbea_86ca04b7?us… : PS13, Line 163: .backlight_off_delay_ms = 5000, /* T12 */ > Done. You are right, it is in 100us. At src/soc/intel/skylake/graphics. […] Well, that's what I meant with the mapping being wrong. `down_delay_ms` *is* T10 so 50ms would be right, and that's also what the VBT says. `cycle_delay_ms` *is* T12, `backlight_on/_off` T7/T9. Overall, this is how I read the VBT: ``` Power Sequence: T3 2000 T7 10 T9 2000 T10 500 T12 5000 ``` ``` .up_delay_ms = 200, .backlight_on_delay_ms = 1, .backlight_off_delay_ms = 200, .down_delay_ms = 50, .cycle_delay_ms = 500, ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82458?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4c8b26ffb7a70d08655986084a714206d9d0c96a Gerrit-Change-Number: 82458 Gerrit-PatchSet: 16 Gerrit-Owner: Reagan <xbjfk.github(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Reagan <xbjfk.github(a)gmail.com> Gerrit-Comment-Date: Thu, 30 May 2024 16:57:00 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Reagan <xbjfk.github(a)gmail.com>

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[XS] Change in coreboot[main]: libpayload/libc: Include region device APIs
by Kapil Porwal (Code Review) 30 May '24

30 May '24

Attention is currently required from: Eran Mitrani, Julius Werner, Subrata Banik. Kapil Porwal has posted comments on this change by Kapil Porwal. ( https://review.coreboot.org/c/coreboot/+/82659?usp=email ) Change subject: libpayload/libc: Include region device APIs ...................................................................... Patch Set 2: (1 comment) Patchset: PS2: > Yes, we agree on the process. […] Thanks Julius for the review. 1. We are planning to first land a working solution in depthcharge and then work on moving common code to libpayload. 2. Agreed. I will remove the use of region device APIs from depthcharge. -- To view, visit https://review.coreboot.org/c/coreboot/+/82659?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I92a2504fcbf9035bdf3435c83eb6d5512c07a692 Gerrit-Change-Number: 82659 Gerrit-PatchSet: 2 Gerrit-Owner: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Eran Mitrani <mitrani(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Thu, 30 May 2024 16:29:30 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org>

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[S] Change in coreboot[main]: mb/google/brox: Fix CPU crashlog device MMIO memory access
by Kapil Porwal (Code Review) 30 May '24

30 May '24

Attention is currently required from: Benjamin Doron, Dinesh Gehlot, Kane Chen, Karthik Ramasubramanian, Nick Vaccaro, Paul Menzel, Sowmya Aralguppe, Subrata Banik. Kapil Porwal has posted comments on this change by Sowmya Aralguppe. ( https://review.coreboot.org/c/coreboot/+/82136?usp=email ) Change subject: mb/google/brox: Fix CPU crashlog device MMIO memory access ...................................................................... Patch Set 10: (1 comment) File src/soc/intel/alderlake/crashlog.c: https://review.coreboot.org/c/coreboot/+/82136/comment/1db54344_be708bc3?us… : PS10, Line 205: & Why bitwise `&`? Did you mean to use logical `&&` operator? -- To view, visit https://review.coreboot.org/c/coreboot/+/82136?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I262254ee8d0eb91efcb3e748d121e13c31e66251 Gerrit-Change-Number: 82136 Gerrit-PatchSet: 10 Gerrit-Owner: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Krishna P Bhat D <krishna.p.bhat.d(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Sowmya Aralguppe <sowmya.aralguppe(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kane Chen <kane.chen(a)intel.corp-partner.google.com> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-Comment-Date: Thu, 30 May 2024 16:19:21 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: arch/io.h: Add port I/O functions to other architectures
by Nico Huber (Code Review) 30 May '24

30 May '24

Attention is currently required from: Alper Nebi Yasak, Arthur Heymans, Jianjun Wang, Julius Werner, Ron Minnich, Shelley Chen, Yu-Ping Wu. Nico Huber has posted comments on this change by Alper Nebi Yasak. ( https://review.coreboot.org/c/coreboot/+/80372?usp=email ) Change subject: arch/io.h: Add port I/O functions to other architectures ...................................................................... Patch Set 5: (1 comment) File src/device/Kconfig: https://review.coreboot.org/c/coreboot/+/80372/comment/aaccc5ad_5768f2f7?us… : PS5, Line 532: CPU communicate with peripheral devices over PCI I/O space. > Hmm... […] `resource_t` is a mere integer. `struct resource` is used to describe resources, so far. But not directly to access them in an abstract way, i.e. no function pointers that could point to a PCI controller's specific implementation. What all the drivers do, AFAICT, is to simply feed `res->base + something` to the global functions. So the problem seems the same, no matter where the address comes from. -- To view, visit https://review.coreboot.org/c/coreboot/+/80372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7d9177283e8c692088ba8e30d6dfe52623c8cb9 Gerrit-Change-Number: 80372 Gerrit-PatchSet: 5 Gerrit-Owner: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Thu, 30 May 2024 16:14:45 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com>

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[L] Change in coreboot[main]: arch/io.h: Add port I/O functions to other architectures
by Nico Huber (Code Review) 30 May '24

30 May '24

Attention is currently required from: Alper Nebi Yasak, Arthur Heymans, Jianjun Wang, Ron Minnich, Shelley Chen, Yu-Ping Wu. Nico Huber has posted comments on this change by Alper Nebi Yasak. ( https://review.coreboot.org/c/coreboot/+/80372?usp=email ) Change subject: arch/io.h: Add port I/O functions to other architectures ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: >> Sorry, I have to admit I know basically nothing about PCI > > Honestly, me too I can try to fill gaps, but the topic is a bit too big to explain it all at once. I actually hope that it's all just legacy burden that we could choose to ignore. First let me repeat that I don't expect that we need this for actual hardware. Requiring port IO seems uncommon for today's PCI endpoints. And looking at implementations, the code looks sound, but the data (devicetrees) seems incompatible because it breaks assumptions usually made by software (coreboot/Linux), or doesn't provide port-IO mappings at all. So I doubt it is widely tested, even with Linux. And should devices show up that need it, it's still unlikely that we'll see it in coreboot's drivers. Some background about today's software design and capabilities: On traditional PCI platforms (i.e. x86, maybe PPC too?), we have two completely separate address spaces, memory (MMIO) and port IO (PIO). The CPU knows how to access both of them. And because that's how the first PCI platforms did it, firmware and OS expect everything to be *identity mapped*. If one configures a PCI device to listen at MMIO address 0xa5df000, the CPU sees this at 0xa5df000. Same for PIO (in its own address space). Another legacy thing: The original address width for PIO was 10 bits, later 16 bits was implemented. PCI allows up to 32 bits, but few cared to make software compatible with it and not all endpoints support it. As MMIO prevailed, there is little use for it. Then platforms came where the CPU didn't know PIO, but they had a single PCI root, making a single memory mapping of the smaller PIO space easy. Not identity mapped when crossing address spaces, because one definitely wants to cover the 16-bit PIO range ;) Other, modern platforms that adopt PCI don't have a single PCI root and they tend to have things far more configurable. For instance, don't need the identity mapping. But it seems people don't want to re-invent every- thing, so they stick to it (cf. google/cherry/variants/dojo/overridetree.cb for instance, not sure why it's in the devicetree). I guess this is an important observation: Even though the hardware and devicetree concepts support much more, software still treats every physical PCI MMIO address as unique in the whole system (same for port IO respectively in its own address space). And because of the traditional constraints and because we like to keep things simple, coreboot isn't prepared for any flexibility. I'd argue that if we implement something, we should just use a single offset as long as possible (could be in Kconfig). Even with multiple roots, if they are configurable, we could stitch their ranges together and still have a single offset. -- To view, visit https://review.coreboot.org/c/coreboot/+/80372?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7d9177283e8c692088ba8e30d6dfe52623c8cb9 Gerrit-Change-Number: 80372 Gerrit-PatchSet: 5 Gerrit-Owner: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ron Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Shelley Chen <shchen(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Jianjun Wang <jianjun.wang(a)mediatek.com> Gerrit-Attention: Ron Minnich <rminnich(a)gmail.com> Gerrit-Comment-Date: Thu, 30 May 2024 15:59:26 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: util/cbfstool: Disable paging for linux payload
by Patrick Rudolph (Code Review) 30 May '24

30 May '24

Attention is currently required from: Angel Pons, Arthur Heymans, Lean Sheng Tan, Shuo Liu. Patrick Rudolph has posted comments on this change by Shuo Liu. ( https://review.coreboot.org/c/coreboot/+/82705?usp=email ) Change subject: util/cbfstool: Disable paging for linux payload ...................................................................... Patch Set 2: Code-Review-2 (1 comment) Patchset: PS2: Since coreboot doesn't set up paging, it must not disable paging. It cannot know if the current page executing code from and if (the stack) or heap is identity mapped. Blindly disabling paging is simply not possible. @Intel After two years that you aware of the issue, please how about FIXING YOUR CODE instead? -- To view, visit https://review.coreboot.org/c/coreboot/+/82705?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I50a4ab2664910e5772b90b3dade8866f28361d87 Gerrit-Change-Number: 82705 Gerrit-PatchSet: 2 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Comment-Date: Thu, 30 May 2024 15:33:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[M] Change in coreboot[main]: util/lint: Warn if {stddef,stdint,string}.h included but not used
by Elyes Haouas (Code Review) 30 May '24

30 May '24

Attention is currently required from: Martin L Roth. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/82713?usp=email ) Change subject: util/lint: Warn if {stddef,stdint,string}.h included but not used ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Please review and provide your feedback. We need to decide whether to opt for the individual scripts for each header (#82712 & #82670 & #82668) or to use the combined script that handles all three headers together. -- To view, visit https://review.coreboot.org/c/coreboot/+/82713?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I94104df7a2e25c0197b4027eb7fddd52cbc4c6ad Gerrit-Change-Number: 82713 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 30 May 2024 15:25:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: util/lint: Add lint rule to warn if <string.h> is included but not used
by Elyes Haouas (Code Review) 30 May '24

30 May '24

Attention is currently required from: Arthur Heymans, Martin L Roth, Nico Huber. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/82668?usp=email ) Change subject: util/lint: Add lint rule to warn if <string.h> is included but not used ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: Additionally, I have created a combined script that checks <string.h>, <stdint.h>, and <stddef.h> in a single file for your review: https://review.coreboot.org/c/coreboot/+/82713 Please review the scripts and provide your feedback. We need to decide whether to opt for the individual scripts for each header or to use the combined script that handles all three headers together. -- To view, visit https://review.coreboot.org/c/coreboot/+/82668?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifb8f68fe5e3249cc075273b5c2249d80a0b6410e Gerrit-Change-Number: 82668 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 30 May 2024 15:16:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: util/lint: Add lint rule to warn if <stddef.h> is included but not used
by Elyes Haouas (Code Review) 30 May '24

30 May '24

Attention is currently required from: Arthur Heymans, Martin L Roth, Nico Huber. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/82670?usp=email ) Change subject: util/lint: Add lint rule to warn if <stddef.h> is included but not used ...................................................................... Patch Set 5: (1 comment) Patchset: PS5: Additionally, I have created a combined script that checks <string.h>, <stdint.h>, and <stddef.h> in a single file for your review: https://review.coreboot.org/c/coreboot/+/82713 Please review the scripts and provide your feedback. We need to decide whether to opt for the individual scripts for each header or to use the combined script that handles all three headers together. -- To view, visit https://review.coreboot.org/c/coreboot/+/82670?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I49bca3406290a9c3667b54eaa4fb1ffa581302ef Gerrit-Change-Number: 82670 Gerrit-PatchSet: 5 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 30 May 2024 15:15:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[S] Change in coreboot[main]: util/lint: Add lint rule to warn if <stdint.h> is included but not used
by Elyes Haouas (Code Review) 30 May '24

30 May '24

Attention is currently required from: Martin L Roth. Elyes Haouas has posted comments on this change by Elyes Haouas. ( https://review.coreboot.org/c/coreboot/+/82712?usp=email ) Change subject: util/lint: Add lint rule to warn if <stdint.h> is included but not used ...................................................................... Patch Set 1: (1 comment) Patchset: PS1: Additionally, I have created a combined script that checks <string.h>, <stdint.h>, and <stddef.h> in a single file for your review: https://review.coreboot.org/c/coreboot/+/82713 Please review the scripts and provide your feedback. We need to decide whether to opt for the individual scripts for each header or to use the combined script that handles all three headers together. -- To view, visit https://review.coreboot.org/c/coreboot/+/82712?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I318189f88c4ee8803075efc4fe2cb9b58547c126 Gerrit-Change-Number: 82712 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 30 May 2024 15:15:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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coreboot-gerrit May 2024