coreboot-gerrit April 2024

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Federico Amedeo Izzo, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/c5a22269_1e9e930e : PS10, Line 117: .clk_req = 2, > I tried your suggestion and this time just the M.2 SSD disappeared, while the NICs are working. […] Set all the clock sources as free-running, `prodrive/atlas` does this (even if it's just for 2 clock sources, the idea is the same) -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Comment-Date: Mon, 29 Apr 2024 18:31:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: doc/release/24.05: Add git submodule updates
by Zebreus (Code Review) 29 Apr '24

29 Apr '24

Zebreus has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82116?usp=email ) Change subject: doc/release/24.05: Add git submodule updates ...................................................................... doc/release/24.05: Add git submodule updates Change-Id: I136905d60de14749cfa325b24de3df204f0135ec Signed-off-by: Lennart Eichhorn <lennart(a)zebre.us> --- M Documentation/releases/coreboot-24.05-relnotes.md 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/82116/1 diff --git a/Documentation/releases/coreboot-24.05-relnotes.md b/Documentation/releases/coreboot-24.05-relnotes.md index da7e014..0342757 100644 --- a/Documentation/releases/coreboot-24.05-relnotes.md +++ b/Documentation/releases/coreboot-24.05-relnotes.md @@ -43,6 +43,11 @@ ### Git submodule pointers +- 3rdparty/amd_blobs: Update from commit id 64cdd7c8ef to ae5fc7d277 (1 commits) +- 3rdparty/cmocka: Update from commit id 8931845c35 to 8be3737209 (32 commits) +- 3rdparty/fsp: Update from commit id 507ef01cce to cc6399e8c7 (14 commits) +- 3rdparty/intel-microcode: Update from commit id ece0d294a2 to 41af345005 (1 commit) +- 3rdparty/vboot: Update from commit id 3d37d2aafe to 09fcd2184f (27 commits) ### External payloads -- To view, visit https://review.coreboot.org/c/coreboot/+/82116?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I136905d60de14749cfa325b24de3df204f0135ec Gerrit-Change-Number: 82116 Gerrit-PatchSet: 1 Gerrit-Owner: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Federico Amedeo Izzo (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Felix Singer. Federico Amedeo Izzo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 10: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/41df3ac4_cb6d1cf2 : PS10, Line 117: .clk_req = 2, > OK. […] I tried your suggestion and this time just the M.2 SSD disappeared, while the NICs are working. Could it be that the CLK SRC for it is wrong? Any suggestion on how to get the right number without the schematics? -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 10 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 18:13:49 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brya/var/xol: Add EC_IN_RW_OD config into early_gpio_table
by YH Lin (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Nick Vaccaro, SH Kim, Subrata Banik. YH Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82099?usp=email ) Change subject: mb/google/brya/var/xol: Add EC_IN_RW_OD config into early_gpio_table ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/82099?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2179bb10b431547bc35f332c74915a63495b779d Gerrit-Change-Number: 82099 Gerrit-PatchSet: 2 Gerrit-Owner: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: SH Kim <sh_.kim(a)samsung.corp-partner.google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Mon, 29 Apr 2024 17:56:42 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/amd/birman/devicetree_phoenix_opensil: add stub MPIO chips
by Felix Held (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Matt DeVillier, Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81101?usp=email ) Change subject: mb/amd/birman/devicetree_phoenix_opensil: add stub MPIO chips ...................................................................... Patch Set 4: (1 comment) Patchset: PS2: > once CB:81346 is in upstream, i'll push a new version of this patch Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81101?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icabe60322d46c1195284dd77ec39f9d143e3d2cb Gerrit-Change-Number: 81101 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 17:36:39 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/amd/birman/devicetree_phoenix_opensil: add stub MPIO chips
by Felix Held (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Fred Reitberger, Jason Glenesk, Varshit Pandya. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81101?usp=email ) Change subject: mb/amd/birman/devicetree_phoenix_opensil: add stub MPIO chips ...................................................................... Set Ready For Review -- To view, visit https://review.coreboot.org/c/coreboot/+/81101?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icabe60322d46c1195284dd77ec39f9d143e3d2cb Gerrit-Change-Number: 81101 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 17:36:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Federico Amedeo Izzo, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (2 comments) File src/mainboard/aoostar/wtr_r1/bootblock.c: https://review.coreboot.org/c/coreboot/+/82010/comment/ebf0a37a_4419b043 : PS10, Line 20: ite_set_3vsbsw(GPIO_DEV, true); > These Super I/O settings are taken from a superiotool dump while running the vendor UEFI firmware. […] Do you have the superiotool dump? I'd like to take a look. File src/mainboard/aoostar/wtr_r1/gpio.h: https://review.coreboot.org/c/coreboot/+/82010/comment/9c3ee9b9_f60abb83 : PS10, Line 207: _PAD_CFG_STRUCT(GPD3, PAD_FUNC(NF1) | PAD_TRIG(OFF) | PAD_BUF(TX_RX_DISABLE) | (1 << 1), 0), /* PWRBTN# */ > Unfortunately none of these make the power button work. […] Thanks for the information. -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Comment-Date: Mon, 29 Apr 2024 17:34:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: mb/google/brox: Disable Tccold Handshake
by Ashish Kumar Mishra (Code Review) 29 Apr '24

29 Apr '24

Ashish Kumar Mishra has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82105?usp=email ) Change subject: mb/google/brox: Disable Tccold Handshake ...................................................................... mb/google/brox: Disable Tccold Handshake This patch disables Tccold Handshake to prevent possible display flicker issue for Brox. Please refer Intel doc#723158 for information. BUG=None BRANCH=None TEST=Boot Brox, verify upd setting. Change-Id: Ifcc5937bb78d3226100df5db1b9e7737083963a7 Signed-off-by: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> --- M src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/82105/1 diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb index f901db9..a4018c2 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb +++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb @@ -21,6 +21,10 @@ # seen on J0 and Q0 SKUs register "disable_package_c_state_demotion" = "1" + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "disable_dynamic_tccold_handshake" = "true" + # DPTF enable register "dptf_enable" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/82105?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ifcc5937bb78d3226100df5db1b9e7737083963a7 Gerrit-Change-Number: 82105 Gerrit-PatchSet: 1 Gerrit-Owner: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Federico Amedeo Izzo, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/b0902650_e23229f7 : PS10, Line 117: .clk_req = 2, > they are educated guesses, unfortunately I don't have the schematics of this board. […] OK. If you keep the CLK SRCs, but remove the CLK REQs (and the corresponding flags), I think the PCIe ports should still work, and you may be able to drop the Kconfig workarounds: ``` # Setting this makes NVMe SSD not work config PCIEXP_L1_SUB_STATE default n # Setting this makes 2.5Gb NICs not work config PCIEXP_CLK_PM default n ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Comment-Date: Mon, 29 Apr 2024 17:26:04 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/mtlrvp: use different names for mtlrvp variants
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Kapil Porwal, Paul Menzel, Subrata Banik, YH Lin. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82084?usp=email ) Change subject: soc/intel/mtlrvp: use different names for mtlrvp variants ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/82084?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I5292a0ffcd7524c55cd7aef37c2f59432b2af06a Gerrit-Change-Number: 82084 Gerrit-PatchSet: 5 Gerrit-Owner: YH Lin <yueherngl(a)google.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: YH Lin <yueherngl(a)google.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 17:19:18 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2024