coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: include/device/pci_ids.h, soc/intel/mtl: add new MTL-P iGPU DID
by Felix Held (Code Review) 29 Apr '24

29 Apr '24

Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/82071?usp=email ) Change subject: include/device/pci_ids.h, soc/intel/mtl: add new MTL-P iGPU DID ...................................................................... include/device/pci_ids.h, soc/intel/mtl: add new MTL-P iGPU DID Found in a Clevo V560TU with Intel Core Ultra 155H Change-Id: I0f10808fd0e2d9c122743615fbce656c6d2447cc Signed-off-by: Michał Kopeć <michal.kopec(a)3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82071 Reviewed-by: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/include/device/pci_ids.h M src/soc/intel/common/block/graphics/graphics.c M src/soc/intel/meteorlake/bootblock/report_platform.c 3 files changed, 3 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Felix Singer: Looks good to me, approved diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index d3ba149..d6f8dd3 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -4128,6 +4128,7 @@ #define PCI_DID_INTEL_MTL_P_GT2_2 0x7d50 #define PCI_DID_INTEL_MTL_P_GT2_3 0x7d55 #define PCI_DID_INTEL_MTL_P_GT2_4 0x7d60 +#define PCI_DID_INTEL_MTL_P_GT2_5 0x7dd5 #define PCI_DID_INTEL_RPL_HX_GT1 0xa788 #define PCI_DID_INTEL_RPL_HX_GT2 0xa78b #define PCI_DID_INTEL_RPL_HX_GT3 0x4688 diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index eabcb9a..c38b30f 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -348,6 +348,7 @@ PCI_DID_INTEL_MTL_P_GT2_2, PCI_DID_INTEL_MTL_P_GT2_3, PCI_DID_INTEL_MTL_P_GT2_4, + PCI_DID_INTEL_MTL_P_GT2_5, PCI_DID_INTEL_APL_IGD_HD_505, PCI_DID_INTEL_APL_IGD_HD_500, PCI_DID_INTEL_CNL_GT2_ULX_1, diff --git a/src/soc/intel/meteorlake/bootblock/report_platform.c b/src/soc/intel/meteorlake/bootblock/report_platform.c index 49d0661..bc8ae92 100644 --- a/src/soc/intel/meteorlake/bootblock/report_platform.c +++ b/src/soc/intel/meteorlake/bootblock/report_platform.c @@ -58,6 +58,7 @@ { PCI_DID_INTEL_MTL_P_GT2_2, "MeteorLake-P GT2" }, { PCI_DID_INTEL_MTL_P_GT2_3, "MeteorLake-P GT2" }, { PCI_DID_INTEL_MTL_P_GT2_4, "Meteorlake-P GT2" }, + { PCI_DID_INTEL_MTL_P_GT2_5, "Meteorlake-P GT2" }, }; static inline uint8_t get_dev_revision(pci_devfn_t dev) -- To view, visit https://review.coreboot.org/c/coreboot/+/82071?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I0f10808fd0e2d9c122743615fbce656c6d2447cc Gerrit-Change-Number: 82071 Gerrit-PatchSet: 3 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Eran Mitrani <mitrani(a)google.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tarun <tstuli(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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[S] Change in coreboot[main]: mb/amd/birman: add function to update MPIO config in devicetree
by Felix Held (Code Review) 29 Apr '24

29 Apr '24

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/82106?usp=email ) Change subject: mb/amd/birman: add function to update MPIO config in devicetree ...................................................................... mb/amd/birman: add function to update MPIO config in devicetree When the Kconfig options WLAN01 or WWAN01 are set, some of the MPIO descriptor information the devicetree needs to be updated and some of the bridges to the PCIe ports need to be disabled. Since the code has paths and names specific to the MPIO stub, include the update_devicetree_phoenix_opensil.c file depending on whether CONFIG_SOC_AMD_OPENSIL_STUB is selected and not depending on whether CONFIG_BOARD_AMD_BIRMAN_PHOENIX_OPENSIL is selected. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: I23c14cc03980ea1e39f7e5aec551b975c237e487 --- M src/mainboard/amd/birman/Makefile.mk M src/mainboard/amd/birman/mainboard.c A src/mainboard/amd/birman/update_devicetree.h A src/mainboard/amd/birman/update_devicetree_phoenix_opensil.c 4 files changed, 40 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/06/82106/1 diff --git a/src/mainboard/amd/birman/Makefile.mk b/src/mainboard/amd/birman/Makefile.mk index 6c417ce..2312d24 100644 --- a/src/mainboard/amd/birman/Makefile.mk +++ b/src/mainboard/amd/birman/Makefile.mk @@ -9,6 +9,7 @@ ramstage-y += chromeos.c ramstage-y += gpio.c +ramstage-$(CONFIG_SOC_AMD_OPENSIL_STUB) += update_devicetree_phoenix_opensil.c ramstage-$(CONFIG_BOARD_AMD_BIRMAN_PHOENIX_FSP) += port_descriptors_phoenix.c ramstage-$(CONFIG_BOARD_AMD_BIRMAN_GLINDA) += port_descriptors_glinda.c diff --git a/src/mainboard/amd/birman/mainboard.c b/src/mainboard/amd/birman/mainboard.c index 0deba67..f2d3ef9 100644 --- a/src/mainboard/amd/birman/mainboard.c +++ b/src/mainboard/amd/birman/mainboard.c @@ -6,6 +6,7 @@ #include <device/device.h> #include <types.h> #include "gpio.h" +#include "update_devicetree.h" /* TODO: Update for birman */ @@ -58,6 +59,9 @@ static void mainboard_init(void *chip_info) { mainboard_program_gpios(); + + if (CONFIG(BOARD_AMD_BIRMAN_PHOENIX_OPENSIL)) + mainboard_update_devicetree_opensil(); } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/amd/birman/update_devicetree.h b/src/mainboard/amd/birman/update_devicetree.h new file mode 100644 index 0000000..6f98dbd --- /dev/null +++ b/src/mainboard/amd/birman/update_devicetree.h @@ -0,0 +1,8 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef MAINBOARD_UPDATE_DEVICETREE_H +#define MAINBOARD_UPDATE_DEVICETREE_H + +void mainboard_update_devicetree_opensil(void); + +#endif /* MAINBOARD_UPDATE_DEVICETREE_H */ diff --git a/src/mainboard/amd/birman/update_devicetree_phoenix_opensil.c b/src/mainboard/amd/birman/update_devicetree_phoenix_opensil.c new file mode 100644 index 0000000..ad39b55 --- /dev/null +++ b/src/mainboard/amd/birman/update_devicetree_phoenix_opensil.c @@ -0,0 +1,27 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/device.h> +#include <vendorcode/amd/opensil/stub/mpio/chip.h> +#include "update_devicetree.h" + +static void mainboard_update_mpio(void) +{ + struct device *wwan_bridge = DEV_PTR(gpp_bridge_2_2); + struct device *wlan_bridge = DEV_PTR(gpp_bridge_2_3); + struct vendorcode_amd_opensil_stub_mpio_config *wwan_bridge_cfg = config_of(wwan_bridge); + struct vendorcode_amd_opensil_stub_mpio_config *wlan_bridge_cfg = config_of(wlan_bridge); + + if (CONFIG(WLAN01)) { + wwan_bridge->enabled = false; + wlan_bridge_cfg->end_lane = 14; + } + if (CONFIG(WWAN01)) { + wlan_bridge->enabled = false; + wwan_bridge_cfg->end_lane = 15; + } +} + +void mainboard_update_devicetree_opensil(void) +{ + mainboard_update_mpio(); +} -- To view, visit https://review.coreboot.org/c/coreboot/+/82106?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I23c14cc03980ea1e39f7e5aec551b975c237e487 Gerrit-Change-Number: 82106 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Federico Amedeo Izzo, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/44c95355_a508ac1f : PS11, Line 188: irq 0x71 = 0x01 > GPIO config from superiotool dump: […] And some more I forgot about: ``` irq 0xda = 0xb0 irq 0xf8 = 0x08 ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Comment-Date: Mon, 29 Apr 2024 19:15:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Federico Amedeo Izzo, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/2693eedf_d8c12edc : PS10, Line 117: .clk_req = 2, > I applied the first change to each root port, but for the second change I set as free running just t […] All of them. I think there's 7 in total (from 0 to 6) -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Comment-Date: Mon, 29 Apr 2024 19:14:32 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/9babf3bc_3f5f0ed0 : PS11, Line 188: irq 0x71 = 0x01 GPIO config from superiotool dump: ``` irq 0xbc = 0xc0 irq 0xbd = 0x03 irq 0xc3 = 0x41 irq 0xc8 = 0x0b irq 0xdb = 0x44 irq 0xf9 = 0x02 ``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 19:13:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Federico Amedeo Izzo (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Felix Singer. Federico Amedeo Izzo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/18832a48_c618f3f0 : PS10, Line 117: .clk_req = 2, > Uh, that seems wrong... […] I applied the first change to each root port, but for the second change I set as free running just the clock source 0. How many clock sources do I have to set as free running? -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 19:08:24 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Federico Amedeo Izzo, Felix Singer. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/5b6038d3_ba12c976 : PS10, Line 117: .clk_req = 2, > Tried this, but this time no SSD, no NICs, no WLAN. Uh, that seems wrong... To make sure we're on the same page, you have to set this for each root port: ```register "pch_pcie_rp[PCH_RP(5)].flags" = "PCIE_RP_CLK_SRC_UNUSED | PCIE_RP_CLK_REQ_UNUSED | PCIE_RP_LTR | PCIE_RP_AER"``` And this for all clock sources (array indices): ```register "pcie_clk_config_flag[0]" = "PCIE_CLK_FREE_RUNNING"``` -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Comment-Date: Mon, 29 Apr 2024 18:59:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Federico Amedeo Izzo (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Felix Singer. Federico Amedeo Izzo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/devicetree.cb: https://review.coreboot.org/c/coreboot/+/82010/comment/1b149a1b_c5ed9d57 : PS10, Line 117: .clk_req = 2, > Set all the clock sources as free-running, `prodrive/atlas` does this (even if it's just for 2 clock […] Tried this, but this time no SSD, no NICs, no WLAN. -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 18:50:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-MessageType: comment

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[L] Change in coreboot[main]: mb/aoostar: Add AOOSTAR R1 (WTR_R1)
by Federico Amedeo Izzo (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Angel Pons, Felix Singer. Federico Amedeo Izzo has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82010?usp=email ) Change subject: mb/aoostar: Add AOOSTAR R1 (WTR_R1) ...................................................................... Patch Set 11: (1 comment) File src/mainboard/aoostar/wtr_r1/bootblock.c: https://review.coreboot.org/c/coreboot/+/82010/comment/db206849_b84e2034 : PS10, Line 20: ite_set_3vsbsw(GPIO_DEV, true); > Do you have the superiotool dump? I'd like to take a look. Sure, it's here: https://gist.github.com/Nimayer/70677c4bd02b2624766a9e3f2e06f79e -- To view, visit https://review.coreboot.org/c/coreboot/+/82010?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9414eb742b6b90459e010b038c1994537e9801a5 Gerrit-Change-Number: 82010 Gerrit-PatchSet: 11 Gerrit-Owner: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 18:45:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Angel Pons <th3fanbus(a)gmail.com> Comment-In-Reply-To: Federico Amedeo Izzo <federico(a)izzo.pro> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: doc/release/24.05: Add git submodule updates
by Angel Pons (Code Review) 29 Apr '24

29 Apr '24

Attention is currently required from: Jason Glenesk, Martin L Roth, Zebreus. Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/82116?usp=email ) Change subject: doc/release/24.05: Add git submodule updates ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/82116?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I136905d60de14749cfa325b24de3df204f0135ec Gerrit-Change-Number: 82116 Gerrit-PatchSet: 1 Gerrit-Owner: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Zebreus <lennarteichhorn(a)googlemail.com> Gerrit-Comment-Date: Mon, 29 Apr 2024 18:31:25 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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coreboot-gerrit April 2024