coreboot-gerrit April 2024

coreboot-gerrit@coreboot.org

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[XS] Change in coreboot[main]: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned
by Appukuttan V K (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Andrey Petrov, Appukuttan V K, Ronak Kanabar, Subrata Banik. Hello Andrey Petrov, Ronak Kanabar, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81661?usp=email to look at the new patch set (#3). Change subject: drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned ...................................................................... drivers/intel/fsp2_0: Make coreboot FSP stack 16-bytes aligned - Stack alignment: 1. FSP functions must be called with the stack 16-bytes aligned. This is already setup properly with the default value of the `mpreferred-stack-boundary' compiler option (4). 2. The FSP stack buffer supplied by coreboot through the `StackBase' UPD must be 16-bytes aligned. Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c Signed-off-by: Appukuttan V K <appukuttan.vk(a)intel.com> --- M src/drivers/intel/fsp2_0/memory_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/61/81661/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/81661?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I86048c5d3623a29f17a5e492cd67568e4844589c Gerrit-Change-Number: 81661 Gerrit-PatchSet: 3 Gerrit-Owner: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Appukuttan V K <appukuttan.vk(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/system76: Exclude ramtop from CMOS checksum
by Tim Crawford (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Jeremy Soller. Hello Jeremy Soller, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81641?usp=email to look at the new patch set (#2). Change subject: mb/system76: Exclude ramtop from CMOS checksum ...................................................................... mb/system76: Exclude ramtop from CMOS checksum Use the default position for ramtop and exclude it from the checksum. Fixes invalid checksum after caching ramtop causing things like disabling CSME to not work. Fixes: 10d2af04e754 ("mb/system76: Add space for ramtop in CMOS layout") Change-Id: If30df1e6f2735cf767856e42dfede3d17fe494eb Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/addw1/cmos.layout M src/mainboard/system76/adl/cmos.layout M src/mainboard/system76/bonw14/cmos.layout M src/mainboard/system76/cml-u/cmos.layout M src/mainboard/system76/gaze15/cmos.layout M src/mainboard/system76/kbl-u/cmos.layout M src/mainboard/system76/oryp5/cmos.layout M src/mainboard/system76/oryp6/cmos.layout M src/mainboard/system76/rpl/cmos.layout M src/mainboard/system76/tgl-h/cmos.layout M src/mainboard/system76/tgl-u/cmos.layout M src/mainboard/system76/whl-u/cmos.layout 12 files changed, 60 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/81641/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81641?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If30df1e6f2735cf767856e42dfede3d17fe494eb Gerrit-Change-Number: 81641 Gerrit-PatchSet: 2 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-Reviewer: Jeremy Soller <jeremy(a)system76.com> Gerrit-Attention: Jeremy Soller <jeremy(a)system76.com> Gerrit-MessageType: newpatchset

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[M] Change in coreboot[main]: mb/system76: Update CMOS layouts
by Tim Crawford (Code Review) 05 Apr '24

05 Apr '24

Tim Crawford has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81641?usp=email ) Change subject: mb/system76: Update CMOS layouts ...................................................................... mb/system76: Update CMOS layouts Use the default position for ramtop and exclude it from the checksum. Fixes invalid checksum after caching ramtop causing things like disabling CSME to not work. Change-Id: If30df1e6f2735cf767856e42dfede3d17fe494eb Signed-off-by: Tim Crawford <tcrawford(a)system76.com> --- M src/mainboard/system76/addw1/cmos.layout M src/mainboard/system76/adl/cmos.layout M src/mainboard/system76/bonw14/cmos.layout M src/mainboard/system76/cml-u/cmos.layout M src/mainboard/system76/gaze15/cmos.layout M src/mainboard/system76/kbl-u/cmos.layout M src/mainboard/system76/oryp5/cmos.layout M src/mainboard/system76/oryp6/cmos.layout M src/mainboard/system76/rpl/cmos.layout M src/mainboard/system76/tgl-h/cmos.layout M src/mainboard/system76/tgl-u/cmos.layout M src/mainboard/system76/whl-u/cmos.layout 12 files changed, 60 insertions(+), 24 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/81641/1 diff --git a/src/mainboard/system76/addw1/cmos.layout b/src/mainboard/system76/addw1/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/addw1/cmos.layout +++ b/src/mainboard/system76/addw1/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/adl/cmos.layout b/src/mainboard/system76/adl/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/adl/cmos.layout +++ b/src/mainboard/system76/adl/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/bonw14/cmos.layout b/src/mainboard/system76/bonw14/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/bonw14/cmos.layout +++ b/src/mainboard/system76/bonw14/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/cml-u/cmos.layout b/src/mainboard/system76/cml-u/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/cml-u/cmos.layout +++ b/src/mainboard/system76/cml-u/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/gaze15/cmos.layout b/src/mainboard/system76/gaze15/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/gaze15/cmos.layout +++ b/src/mainboard/system76/gaze15/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/kbl-u/cmos.layout b/src/mainboard/system76/kbl-u/cmos.layout index 4e9a300..7aec087 100644 --- a/src/mainboard/system76/kbl-u/cmos.layout +++ b/src/mainboard/system76/kbl-u/cmos.layout @@ -12,7 +12,10 @@ 400 8 r 0 century 412 4 e 6 debug_level -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -32,4 +35,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/oryp5/cmos.layout b/src/mainboard/system76/oryp5/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/oryp5/cmos.layout +++ b/src/mainboard/system76/oryp5/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/oryp6/cmos.layout b/src/mainboard/system76/oryp6/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/oryp6/cmos.layout +++ b/src/mainboard/system76/oryp6/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/rpl/cmos.layout b/src/mainboard/system76/rpl/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/rpl/cmos.layout +++ b/src/mainboard/system76/rpl/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/tgl-h/cmos.layout b/src/mainboard/system76/tgl-h/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/tgl-h/cmos.layout +++ b/src/mainboard/system76/tgl-h/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/tgl-u/cmos.layout b/src/mainboard/system76/tgl-u/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/tgl-u/cmos.layout +++ b/src/mainboard/system76/tgl-u/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 diff --git a/src/mainboard/system76/whl-u/cmos.layout b/src/mainboard/system76/whl-u/cmos.layout index 0513315..b3df380 100644 --- a/src/mainboard/system76/whl-u/cmos.layout +++ b/src/mainboard/system76/whl-u/cmos.layout @@ -14,7 +14,10 @@ 412 4 e 6 debug_level 416 1 e 2 me_state 417 3 h 0 me_state_counter -904 80 h 0 ramtop + +# CMOS_VSTART_ramtop +800 80 r 0 ramtop + 984 16 h 0 check_sum enumerations @@ -37,4 +40,4 @@ checksums -checksum 408 983 984 +checksum 408 799 984 -- To view, visit https://review.coreboot.org/c/coreboot/+/81641?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If30df1e6f2735cf767856e42dfede3d17fe494eb Gerrit-Change-Number: 81641 Gerrit-PatchSet: 1 Gerrit-Owner: Tim Crawford <tcrawford(a)system76.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: riscv/opensbi: make the opensbi payload a flat binary
by ron minnich (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Arthur Heymans, Arthur Heymans, Jonathan Neuschäfer, Maximilian Brune, Philipp Hug. Hello Arthur Heymans, Jonathan Neuschäfer, Maximilian Brune, Philipp Hug, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81632?usp=email to look at the new patch set (#6). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: riscv/opensbi: make the opensbi payload a flat binary ...................................................................... riscv/opensbi: make the opensbi payload a flat binary opensbi is now self-relocating and, further, has strict requirements on the alignment of the data segment -- it has to be power of 2. As opposed to trying to play too many games with ELF files and ldscripts, taking them beyond what's possible, it is simplest just to unpack the opensbi elf into a flat binary and specify its location in cbfs. Works on the sifive unmatched. Still tracking down a failure on qemu. Change-Id: I31525125e87ff5925ca82f4e48fe1191ba6326fd Signed-off-by: Ronald G Minnich <rminnich(a)gmail.com> --- M src/arch/riscv/Makefile.mk M src/mainboard/emulation/qemu-riscv/Kconfig M src/mainboard/emulation/qemu-riscv/memlayout.ld 3 files changed, 8 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/32/81632/6 -- To view, visit https://review.coreboot.org/c/coreboot/+/81632?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I31525125e87ff5925ca82f4e48fe1191ba6326fd Gerrit-Change-Number: 81632 Gerrit-PatchSet: 6 Gerrit-Owner: ron minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Philipp Hug <philipp(a)hug.cx> Gerrit-Attention: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Attention: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t
by Subrata Banik (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Kapil Porwal, Paul Menzel. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81615?usp=email ) Change subject: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t ...................................................................... Patch Set 8: (1 comment) Patchset: PS8: > maybe include <types.h> here src/drivers/intel/fsp2_0/fsp_gop_blt.c sure, will do over an incremental CL. -- To view, visit https://review.coreboot.org/c/coreboot/+/81615?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab5c612e0640441a2a10e77949416de2afdb8985 Gerrit-Change-Number: 81615 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 05 Apr 2024 15:13:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: lib/device_tree: Add some FDT helper functions
by Maximilian Brune (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Jakub Czapiga, Julius Werner, Martin L Roth. Maximilian Brune has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81081?usp=email ) Change subject: lib/device_tree: Add some FDT helper functions ...................................................................... Patch Set 18: (1 comment) File src/lib/device_tree.c: https://review.coreboot.org/c/coreboot/+/81081/comment/7f1877c2_71e2abd4 : PS18, Line 175: "" > Look at `dt_find_node()` which really does exactly the same thing, I think it works very cleanly. […] `dt_find_node` and `fdt_find_node` work inherently different. `dt_find_node` always finds a node relative to a parent node. `fdt_find_node` always finds a node relative to another node on the same level (for performance reasons). I cannot add a ``` if (!*path) return parent; ``` first thing in the `fdt_find_node` function like is done in `dt_find_node`, because when you call `fdt_find_node` you don't have the offset to the parent anymore. `node_offset` does not point to the parent. `fdt_find_node` is meant to be an internal function (therefore static). It implements the most performant approach of finding a node relative to another node, but is never meant to be called directly by code outside of `device_tree.c`. I may be missing something, but this is my current understanding. -- To view, visit https://review.coreboot.org/c/coreboot/+/81081?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I2fb1d93c5b3e1cb2f7d9584db52bbce3767b63d8 Gerrit-Change-Number: 81081 Gerrit-PatchSet: 18 Gerrit-Owner: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-Reviewer: Jakub Czapiga <czapiga(a)google.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Alper Nebi Yasak <alpernebiyasak(a)gmail.com> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jakub Czapiga <czapiga(a)google.com> Gerrit-Attention: Julius Werner <jwerner(a)chromium.org> Gerrit-Comment-Date: Fri, 05 Apr 2024 14:27:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Julius Werner <jwerner(a)chromium.org> Comment-In-Reply-To: Maximilian Brune <maximilian.brune(a)9elements.com> Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: src/arch/x86/bootblock.ld: Preserve space for the .init section
by Arthur Heymans (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Arthur Heymans, Jérémy Compostella, Martin L Roth, Nico Huber, Werner Zeh. Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81678?usp=email ) Change subject: src/arch/x86/bootblock.ld: Preserve space for the .init section ...................................................................... Patch Set 1: (1 comment) File src/arch/x86/bootblock.ld: https://review.coreboot.org/c/coreboot/+/81678/comment/143f1c9e_270ed886 : PS1, Line 33: BOOTBLOCK_TOP This already accounts for SIZEOF(.init), see EARLYASM_SZ. I'm not sure why stuff is overflowing. CB:81680 padds PROGRAM_SZ a bit, but I don't really know why it's needed. -- To view, visit https://review.coreboot.org/c/coreboot/+/81678?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9256fdea98ce640bc5780b23419942266562ebb8 Gerrit-Change-Number: 81678 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Arthur Heymans <arthur.heymans(a)9elements.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Comment-Date: Fri, 05 Apr 2024 14:17:03 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[S] Change in coreboot[main]: MAINTAINERS: sort INTEL SoC alphabetically
by Felix Singer (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Subrata Banik, Sumeet R Pawnikar. Felix Singer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81677?usp=email ) Change subject: MAINTAINERS: sort INTEL SoC alphabetically ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic04163e746ee3e450e58563abbf994e6aa44e69d Gerrit-Change-Number: 81677 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Fri, 05 Apr 2024 13:53:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XL] Change in coreboot[main]: soc/intel/xeon_sp: Add Granite Rapids initial codes
by Shuo Liu (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Felix Held, Felix Singer, Jincheng Li, Johnny Lin, Jonathan Zhang, Nico Huber, Patrick Rudolph, Paul Menzel, TangYiwei, Tim Chu. Hello Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, TangYiwei, Tim Chu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/81316?usp=email to look at the new patch set (#38). Change subject: soc/intel/xeon_sp: Add Granite Rapids initial codes ...................................................................... soc/intel/xeon_sp: Add Granite Rapids initial codes coreboot GNR (Granite Rapids) is a FSP 2.4 based, no-PCH, single IO-APIC Xeon-SP platform. The same set of codes is also used for SRF (Sierra Forest) SoC. This patch initially sets the code set up. 1. All register definitions are forked from SPR (Sapphire Rapids) and EBG (Emmisburg PCH)'s codes are reused. 2. src/soc/intel/xeon_sp/chip_gen6.c is newly added as chip common codes for 6th Gen Xeon-SP SoC (Granite Rapids) and later. TEST=Build and boot on intel/archercity CRB Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Signed-off-by: Shuo Liu <shuo.liu(a)intel.com> Signed-off-by: Gang Chen <gang.c.chen(a)intel.com> Signed-off-by: Jincheng Li <jincheng.li(a)intel.com> --- M MAINTAINERS M src/soc/intel/xeon_sp/Makefile.mk M src/soc/intel/xeon_sp/chip_gen1.c A src/soc/intel/xeon_sp/chip_gen6.c A src/soc/intel/xeon_sp/gnr/Kconfig A src/soc/intel/xeon_sp/gnr/Makefile.inc A src/soc/intel/xeon_sp/gnr/acpi/gpe.asl A src/soc/intel/xeon_sp/gnr/chip.c A src/soc/intel/xeon_sp/gnr/chip.h A src/soc/intel/xeon_sp/gnr/cpu.c A src/soc/intel/xeon_sp/gnr/include/soc/cpu.h A src/soc/intel/xeon_sp/gnr/include/soc/pci_devs.h A src/soc/intel/xeon_sp/gnr/include/soc/soc_msr.h A src/soc/intel/xeon_sp/gnr/include/soc/soc_util.h A src/soc/intel/xeon_sp/gnr/include/soc/vpd.h A src/soc/intel/xeon_sp/gnr/ramstage.c A src/soc/intel/xeon_sp/gnr/romstage.c A src/soc/intel/xeon_sp/gnr/soc_acpi.c A src/soc/intel/xeon_sp/gnr/soc_util.c M src/soc/intel/xeon_sp/include/soc/chip_common.h M src/soc/intel/xeon_sp/include/soc/fsp_upd.h M src/soc/intel/xeon_sp/lockdown.c M src/soc/intel/xeon_sp/uncore.c 23 files changed, 1,311 insertions(+), 62 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/81316/38 -- To view, visit https://review.coreboot.org/c/coreboot/+/81316?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Gerrit-Change-Number: 81316 Gerrit-PatchSet: 38 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: TangYiwei Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-MessageType: newpatchset

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[XL] Change in coreboot[main]: soc/intel/xeon_sp: Add Granite Rapids initial codes
by Shuo Liu (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Arthur Heymans, Chen, Gang C, Christian Walter, David Hendricks, Felix Held, Felix Singer, Jincheng Li, Johnny Lin, Jonathan Zhang, Nico Huber, Patrick Rudolph, Paul Menzel, TangYiwei, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81316?usp=email ) Change subject: soc/intel/xeon_sp: Add Granite Rapids initial codes ...................................................................... Patch Set 37: (1 comment) File src/soc/intel/xeon_sp/gnr/cpu.c: https://review.coreboot.org/c/coreboot/+/81316/comment/34e715cb_3119a619 : PS36, Line 61: {X86_VENDOR_INTEL, CPUID_GRANITERAPIDS}, > those two lines are missing cpu match mask struct element Done -- To view, visit https://review.coreboot.org/c/coreboot/+/81316?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3084e1b5abf25d8d9504bebeaed2a15b916ed56b Gerrit-Change-Number: 81316 Gerrit-PatchSet: 37 Gerrit-Owner: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: TangYiwei Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: TangYiwei Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Chen, Gang C <gang.c.chen(a)intel.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 05 Apr 2024 13:35:51 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: comment

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coreboot-gerrit April 2024