coreboot-gerrit April 2024

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[XS] Change in coreboot[main]: MAINTAINERS: take Genoa/Onyx rename into account
by Varshit Pandya (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Felix Held. Varshit Pandya has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81679?usp=email ) Change subject: MAINTAINERS: take Genoa/Onyx rename into account ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81679?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib52781ebc98bd2ce9df495526cfaf9d884aace50 Gerrit-Change-Number: 81679 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Varshit Pandya <pandyavarshit(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 05 Apr 2024 12:17:03 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: MAINTAINERS: take Genoa/Onyx rename into account
by Felix Held (Code Review) 05 Apr '24

05 Apr '24

Felix Held has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81679?usp=email ) Change subject: MAINTAINERS: take Genoa/Onyx rename into account ...................................................................... MAINTAINERS: take Genoa/Onyx rename into account When soc/amd/genoa was renamed to soc/amd/genoa_poc and mb/amd/onyx was renamed to mb/amd/onyx_poc, the MAINTAINERS file wasn't updated, so no reviewers were added automatically to patches on Gerrit that change things in soc/amd/genoa_poc or mb/amd/onyx_poc. Fix this by updating the folder names in the MAINTAINERS file too. Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> Change-Id: Ib52781ebc98bd2ce9df495526cfaf9d884aace50 --- M MAINTAINERS 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/79/81679/1 diff --git a/MAINTAINERS b/MAINTAINERS index 49160c1..1e9d3b4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -154,7 +154,7 @@ M: Martin Roth <gaumless(a)gmail.com> M: Varshit Pandya <pandyavarshit(a)gmail.com> S: Maintained -F: src/mainboard/amd/onyx/ +F: src/mainboard/amd/onyx_poc/ AMD reference boards outside of family 17h and 19h S: Odd Fixes @@ -840,12 +840,12 @@ S: Maintained F: src/soc/amd/common/ -AMD Genoa +AMD Genoa Proof of Concept M: Felix Held <felix-coreboot(a)felixheld.de> M: Martin Roth <gaumless(a)gmail.com> M: Varshit Pandya <pandyavarshit(a)gmail.com> S: Maintained -F: src/soc/amd/genoa/ +F: src/soc/amd/genoa_poc/ AMD Mendocino M: Felix Held <felix-coreboot(a)felixheld.de> -- To view, visit https://review.coreboot.org/c/coreboot/+/81679?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib52781ebc98bd2ce9df495526cfaf9d884aace50 Gerrit-Change-Number: 81679 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: newchange

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[XS] Change in coreboot[main]: soc/amd/genoa_poc: Allow using UART with DEBUG_SMI=y
by Felix Held (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Angel Pons, Arthur Heymans, Benjamin Doron, Paul Menzel. Felix Held has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81072?usp=email ) Change subject: soc/amd/genoa_poc: Allow using UART with DEBUG_SMI=y ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81072?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If7c6f2346d5f9ffb371d51d1de6f0b695acedf10 Gerrit-Change-Number: 81072 Gerrit-PatchSet: 3 Gerrit-Owner: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Marvin Drees <marvin.drees(a)9elements.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Benjamin Doron <benjamin.doron00(a)gmail.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 05 Apr 2024 12:09:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/xeon_sp: Compress FSP-S
by Shuo Liu (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Paul Menzel, Ray Ni, Sumeet R Pawnikar, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81634?usp=email ) Change subject: soc/intel/xeon_sp: Compress FSP-S ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/81634/comment/b417bed7_e230375c : PS1, Line 10: Reduces the size of debug FSP-S by about 25%. > This is SPR data from IBM/SBP1, right? Confirmed with archercity CRB configs. It should be okay. -- To view, visit https://review.coreboot.org/c/coreboot/+/81634?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I6248e7cabbce45f6c2fedfab34f328309f87e868 Gerrit-Change-Number: 81634 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Ray Ni <ray.ni(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Ray Ni <ray.ni(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 05 Apr 2024 12:07:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t
by Elyes Haouas (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Felix Held, Fred Reitberger, Jason Glenesk, Kapil Porwal, Paul Menzel, Subrata Banik. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81615?usp=email ) Change subject: drivers/intel/fsp2_0: Enhance portability with uintptr_t/size_t ...................................................................... Patch Set 8: Code-Review+2 (1 comment) Patchset: PS8: maybe include <types.h> here src/drivers/intel/fsp2_0/fsp_gop_blt.c -- To view, visit https://review.coreboot.org/c/coreboot/+/81615?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Iab5c612e0640441a2a10e77949416de2afdb8985 Gerrit-Change-Number: 81615 Gerrit-PatchSet: 8 Gerrit-Owner: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Comment-Date: Fri, 05 Apr 2024 11:52:16 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: soc/intel/xeon_sp/spr: Use official microcodes
by Shuo Liu (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Arthur Heymans, Christian Walter, Jincheng Li, Johnny Lin, Jonathan Zhang, Lean Sheng Tan, Patrick Rudolph, Tim Chu. Shuo Liu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81637?usp=email ) Change subject: soc/intel/xeon_sp/spr: Use official microcodes ...................................................................... Patch Set 1: Code-Review+2 (1 comment) Patchset: PS1: > The official microcode is the BKC uMR1 that has been tested on archercity CRB. […] The configs/builder/config.intel.crb.ac still uses local ucode binary. To make the updated ucode in effect, I need to have below changes, +#CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS=y +CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y Rechecked the log, the problem is within LinuxBoot, which should be able to be debugged. We can have this patch merged first and then clarify archercity CRB env later. -- To view, visit https://review.coreboot.org/c/coreboot/+/81637?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I58121cc2ca7699d3d26581d7d5875ec74deeeb93 Gerrit-Change-Number: 81637 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Jonathan Zhang <jon.zhixiong.zhang(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Jincheng Li <jincheng.li(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Fri, 05 Apr 2024 11:51:12 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Patrick Rudolph <patrick.rudolph(a)9elements.com> Comment-In-Reply-To: Shuo Liu <shuo.liu(a)intel.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: lib/program.ld: Account for large code model sections
by Elyes Haouas (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Arthur Heymans, Jérémy Compostella. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81675?usp=email ) Change subject: lib/program.ld: Account for large code model sections ...................................................................... Patch Set 3: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/81675?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ib755673dfa9e71172bbef0a5aec075154c89a97b Gerrit-Change-Number: 81675 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 05 Apr 2024 11:47:51 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: MAINTAINERS: sort INTEL SoC alphabetically
by Elyes Haouas (Code Review) 05 Apr '24

05 Apr '24

Attention is currently required from: Dinesh Gehlot, Kapil Porwal, Subrata Banik, Sumeet R Pawnikar. Elyes Haouas has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/81677?usp=email ) Change subject: MAINTAINERS: sort INTEL SoC alphabetically ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/81677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic04163e746ee3e450e58563abbf994e6aa44e69d Gerrit-Change-Number: 81677 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Elyes Haouas <ehaouas(a)noos.fr> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Comment-Date: Fri, 05 Apr 2024 11:44:55 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[XS] Change in coreboot[main]: src/arch/x86/bootblock.ld: Preserve space for the .init section
by Werner Zeh (Code Review) 05 Apr '24

05 Apr '24

Werner Zeh has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81678?usp=email ) Change subject: src/arch/x86/bootblock.ld: Preserve space for the .init section ...................................................................... src/arch/x86/bootblock.ld: Preserve space for the .init section The .init section, which is placed right after the .text section in the bootblock, is currently not taken into account when the start address for the .text section is computed. Since it is quite small (just ~200-300 byte) it usually fits into the space which is created by aligning the .text section to 4k. There are cases where it does not fit into this space and therefore a section overlap between .text and .init happens at link time. This in the end leads to a build error when the bootblock is linked. This patch considers the size of the .init section when the start address of .text is computed so that it always fits. Change-Id: I9256fdea98ce640bc5780b23419942266562ebb8 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> --- M src/arch/x86/bootblock.ld 1 file changed, 3 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/78/81678/1 diff --git a/src/arch/x86/bootblock.ld b/src/arch/x86/bootblock.ld index 73a3d18..6855b08 100644 --- a/src/arch/x86/bootblock.ld +++ b/src/arch/x86/bootblock.ld @@ -16,7 +16,7 @@ #if CONFIG(FIXED_BOOTBLOCK_SIZE) . = _ebootblock - CONFIG_C_ENV_BOOTBLOCK_SIZE; #else - . = BOOTBLOCK_TOP - PROGRAM_SZ; + . = BOOTBLOCK_TOP - PROGRAM_SZ - INIT_SZ; /* Page tables need to be at a 4K boundary so align the bootblock downwards */ . = ALIGN(4096); . -= 4096; @@ -37,6 +37,8 @@ *(.init.*); } + INIT_SZ = SIZEOF(.init); + /* * Allocation reserves extra space here. Alignment requirements * may cause the total size of a section to change when the start -- To view, visit https://review.coreboot.org/c/coreboot/+/81678?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9256fdea98ce640bc5780b23419942266562ebb8 Gerrit-Change-Number: 81678 Gerrit-PatchSet: 1 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-MessageType: newchange

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[S] Change in coreboot[main]: MAINTAINERS: sort INTEL SoC alphabetically
by Sumeet R Pawnikar (Code Review) 05 Apr '24

05 Apr '24

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/81677?usp=email ) Change subject: MAINTAINERS: sort INTEL SoC alphabetically ...................................................................... MAINTAINERS: sort INTEL SoC alphabetically Place METEORLAKE SoC in alphabetical order. Change-Id: Ic04163e746ee3e450e58563abbf994e6aa44e69d Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M MAINTAINERS 1 file changed, 10 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/77/81677/1 diff --git a/MAINTAINERS b/MAINTAINERS index 49160c1..1f2458f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -884,16 +884,6 @@ S: Odd Fixes F: src/soc/amd/stoneyridge/ -INTEL METEORLAKE SOC -M: Subrata Banik <subratabanik(a)google.com> -M: Tarun Tuli <tstuli(a)gmail.com> -M: Kapil Porwal <kapilporwal(a)google.com> -M: Jakub Czapiga <czapiga(a)google.com> -M: Eran Mitrani <mitrani(a)google.com> -M: Dinesh Gehlot <digehlot(a)google.com> -S: Maintained -F: src/soc/intel/meteorlake/ - INTEL ALDERLAKE SOC M: Subrata Banik <subratabanik(a)google.com> M: Nick Vaccaro <nvaccaro(a)chromium.org> @@ -931,6 +921,16 @@ S: Maintained F: src/soc/intel/elkhartlake/ +INTEL METEORLAKE SOC +M: Subrata Banik <subratabanik(a)google.com> +M: Tarun Tuli <tstuli(a)gmail.com> +M: Kapil Porwal <kapilporwal(a)google.com> +M: Jakub Czapiga <czapiga(a)google.com> +M: Eran Mitrani <mitrani(a)google.com> +M: Dinesh Gehlot <digehlot(a)google.com> +S: Maintained +F: src/soc/intel/meteorlake/ + INTEL TIGERLAKE SOC M: Subrata Banik <subratabanik(a)google.com> M: Nick Vaccaro <nvaccaro(a)chromium.org> -- To view, visit https://review.coreboot.org/c/coreboot/+/81677?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic04163e746ee3e450e58563abbf994e6aa44e69d Gerrit-Change-Number: 81677 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: newchange

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coreboot-gerrit April 2024