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Change subject: soc/intel/xeon_sp: Compress FSP-S
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81634/comment/4438b23c_309f3153 :
PS1, Line 10: Reduces the size of debug FSP-S by about 25%.
This is SPR data from IBM/SBP1, right?
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Change subject: mb/google/brya: Add new baseboard trulo
......................................................................
Patch Set 12:
(1 comment)
File src/mainboard/google/brya/Kconfig:
https://review.coreboot.org/c/coreboot/+/81626/comment/bbffa783_96a1fdca :
PS10, Line 658: default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/chromeos-nissa-32MiB.fmd" if CHROMEOS && BOARD_GOOGLE_BASEBOARD_NISSA && BOARD_ROMSIZE_KB_32768
> we can drop this
The Nissa board specific 32MB FMD file removed in the antecedent patch CB:81676
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Change subject: soc/intel/xeon_sp: Compress FSP-S
......................................................................
Patch Set 1: Code-Review+1
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Change subject: soc/intel/xeon_sp/spr: Drop microcode constraints
......................................................................
Patch Set 2:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/81635/comment/ddb3fa81_2c510a87 :
PS2, Line 18: microcode version loaded.
the word 'seems' could be removed after confirmation made.
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Hello Eric Lai, Kapil Porwal, Nick Vaccaro, Subrata Banik, Varshit Pandya, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/81626?usp=email
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: mb/google/brya: Add new baseboard trulo
......................................................................
mb/google/brya: Add new baseboard trulo
This patch adds a new baseboard trulo. This commit is a stub which
only adds the minimum code needed for a successful build.
TEST=abuild -a -x -p none -t google/brya
Change-Id: Iad6230064c6b8359698d37c3e0440614cc7b073d
Signed-off-by: Dinesh Gehlot <digehlot(a)google.com>
---
M src/mainboard/google/brya/Kconfig
A src/mainboard/google/brya/chromeos-32MiB.fmd
A src/mainboard/google/brya/variants/baseboard/trulo/Makefile.mk
A src/mainboard/google/brya/variants/baseboard/trulo/devicetree.cb
A src/mainboard/google/brya/variants/baseboard/trulo/gpio.c
A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/ec.h
A src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h
A src/mainboard/google/brya/variants/baseboard/trulo/memory.c
8 files changed, 184 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/26/81626/12
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Change subject: soc/intel/xeon_sp/spr: Drop microcode constraints
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
It would be helpful with this change, let us make some confirmation that FSP-T loading is no needed in SPR.
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Change subject: soc/intel/xeon_sp/spr: Use official microcodes
......................................................................
Patch Set 1:
(1 comment)
Patchset:
PS1:
The archercity CRB cannot boot with the updated versions, we need sometime to find a version that is workable.
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