coreboot-gerrit February 2024

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: drivers/wifi: Add MTCL function to ACPI SSDT
by David Ruth (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Arthur Heymans, Cliff Huang, Eric Lai, Kapil Porwal, Lance Zhao, Nick Vaccaro, Nico Huber, Paul Menzel, Subrata Banik, Subrata Banik, Tim Wawrzynczak. David Ruth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80170?usp=email ) Change subject: drivers/wifi: Add MTCL function to ACPI SSDT ...................................................................... Patch Set 17: (1 comment) Patchset: PS17: > can we please split the mainboard cl from this one ? […] Config change was done as requested at https://review.coreboot.org/c/coreboot/+/80170/comments/15f78669_14a94a7f. I can split the mainboard change out, but if I do, I'd rather also make the config change in that change. -- To view, visit https://review.coreboot.org/c/coreboot/+/80170?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b5e7312a44e114270e664b983626faa6cfee350 Gerrit-Change-Number: 80170 Gerrit-PatchSet: 17 Gerrit-Owner: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 01 Feb 2024 17:21:25 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: drivers/intel/fsp2_0: Support FSP 2.4 64-bits
by Jérémy Compostella (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Andrey Petrov, Arthur Heymans, Bora Guvendik, Christian Walter, Felix Held, Fred Reitberger, Jason Glenesk, Johnny Lin, Lean Sheng Tan, Matt DeVillier, Patrick Rudolph, Paul Menzel, Ronak Kanabar, Shuo Liu, Tim Chu, Wonkyu Kim. Jérémy Compostella has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80277?usp=email ) Change subject: drivers/intel/fsp2_0: Support FSP 2.4 64-bits ...................................................................... Patch Set 2: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80277/comment/29522af9_bd699943 : PS2, Line 42: > Have you done any tests yet? Is there a difference in boot time, for example? I am using this patch internally with internal platform and it boot fine. However, I don't have the ability of comparing with a 32-bits version or to do any boot time performance analysis. I also verified that this two patches do not break the boot on Meteor Lake. -- To view, visit https://review.coreboot.org/c/coreboot/+/80277?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If0397f5cc8d0f4f1872bd37a001fe42e0c37ec99 Gerrit-Change-Number: 80277 Gerrit-PatchSet: 2 Gerrit-Owner: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Reviewer: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Reviewer: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Reviewer: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Reviewer: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Reviewer: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-CC: Ashish Kumar Mishra <ashish.k.mishra(a)intel.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subratabanik(a)google.com> Gerrit-CC: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Attention: Matt DeVillier <matt.devillier(a)amd.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Attention: Jason Glenesk <jason.glenesk(a)gmail.com> Gerrit-Attention: Johnny Lin <Johnny_Lin(a)wiwynn.com> Gerrit-Attention: Christian Walter <christian.walter(a)9elements.com> Gerrit-Attention: Shuo Liu <shuo.liu(a)intel.com> Gerrit-Attention: Lean Sheng Tan <sheng.tan(a)9elements.com> Gerrit-Attention: Ronak Kanabar <ronak.kanabar(a)intel.com> Gerrit-Attention: Fred Reitberger <reitbergerfred(a)gmail.com> Gerrit-Attention: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Attention: Tim Chu <Tim.Chu(a)quantatw.com> Gerrit-Comment-Date: Thu, 01 Feb 2024 17:09:48 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: drivers/wifi: Add MTCL function to ACPI SSDT
by Subrata Banik (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Arthur Heymans, Cliff Huang, David Ruth, Eric Lai, Kapil Porwal, Lance Zhao, Nick Vaccaro, Nico Huber, Paul Menzel, Subrata Banik, Tim Wawrzynczak. Subrata Banik has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80170?usp=email ) Change subject: drivers/wifi: Add MTCL function to ACPI SSDT ...................................................................... Patch Set 17: (1 comment) Patchset: PS17: can we please split the mainboard cl from this one ? also why do we need config changes here ? (was that due to git add ) -- To view, visit https://review.coreboot.org/c/coreboot/+/80170?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b5e7312a44e114270e664b983626faa6cfee350 Gerrit-Change-Number: 80170 Gerrit-PatchSet: 17 Gerrit-Owner: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: David Ruth <druth(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 01 Feb 2024 17:09:41 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/brox: Enable HDA Codec ALC256
by Shelley Chen (Code Review) 01 Feb '24

01 Feb '24

Shelley Chen has submitted this change. ( https://review.coreboot.org/c/coreboot/+/79723?usp=email ) Change subject: mb/google/brox: Enable HDA Codec ALC256 ...................................................................... mb/google/brox: Enable HDA Codec ALC256 On Brox, HDA Codec used is ALC256. Add verb table for the same. Also, add the related device tree changes for HDA related registers. Realtek High Definition Audio Configuration- Version : 5.0.3.1 BUG=b:317398558 BRANCH=None TEST=verified HDA on Brox. HDA Sound cards detected. Headphone working verified. Device listed under sysfs as below: cat /sys/bus/hdaudio/devices/ehdaudio0D0/chip_name ID 256 cat /sys/bus/hdaudio/devices/ehdaudio0D0/vendor_name Realtek Change-Id: I1edd5aee053debe39b34048266703031c088cd00 Signed-off-by: Poornima Tom <poornima.tom(a)intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79723 Reviewed-by: Shelley Chen <shchen(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/mainboard/google/brox/Kconfig M src/mainboard/google/brox/Makefile.mk A src/mainboard/google/brox/hda_verb.c M src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb 4 files changed, 123 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Shelley Chen: Looks good to me, approved diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig index e6d1f1e..007328f 100644 --- a/src/mainboard/google/brox/Kconfig +++ b/src/mainboard/google/brox/Kconfig @@ -47,6 +47,7 @@ select SOC_INTEL_CRASHLOG select SOC_INTEL_RAPTORLAKE select SOC_INTEL_ALDERLAKE_PCH_P + select SOC_INTEL_COMMON_BLOCK_HDA_VERB select DRIVERS_INTEL_ISH select SYSTEM_TYPE_LAPTOP select TPM_GOOGLE_TI50 diff --git a/src/mainboard/google/brox/Makefile.mk b/src/mainboard/google/brox/Makefile.mk index 8c7e42d..10f1230 100644 --- a/src/mainboard/google/brox/Makefile.mk +++ b/src/mainboard/google/brox/Makefile.mk @@ -10,6 +10,7 @@ ramstage-$(CONFIG_CHROMEOS) += chromeos.c ramstage-y += mainboard.c ramstage-y += ec.c +ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) += hda_verb.c BASEBOARD_DIR:=$(call strip_quotes,$(CONFIG_BASEBOARD_DIR)) diff --git a/src/mainboard/google/brox/hda_verb.c b/src/mainboard/google/brox/hda_verb.c new file mode 100644 index 0000000..39d2d86 --- /dev/null +++ b/src/mainboard/google/brox/hda_verb.c @@ -0,0 +1,118 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include <device/azalia_device.h> + +const u32 cim_verb_data[] = { + /* coreboot specific header */ + 0x10ec0256, // Codec Vendor / Device ID: Realtek ALC256 + 0x10ec12ac, // Subsystem ID + 0x0000001D, // Number of jacks (NID entries) + + AZALIA_RESET(0x1), + /* NID 0x01, HDA Codec Subsystem ID Verb table */ + AZALIA_SUBVENDOR(0, 0x10ec12ac), + + /* Pin Widget Verb Table */ + + /* + * DMIC + * Requirement is to use PCH DMIC. Hence, + * commented out codec's Internal DMIC. + * AZALIA_PIN_CFG(0, 0x12, 0x90A60130), + * AZALIA_PIN_CFG(0, 0x13, 0x40000000), + */ + + /* Pin widget 0x14 - Front (Port-D) */ + AZALIA_PIN_CFG(0, 0x14, 0x90170110), + /* Pin widget 0x18 - NPC */ + AZALIA_PIN_CFG(0, 0x18, 0x411111F0), + /* Pin widget 0x19 - MIC2 (Port-F) */ + AZALIA_PIN_CFG(0, 0x19, 0x04A11040), + /* Pin widget 0x1A - LINE1 (Port-C) */ + AZALIA_PIN_CFG(0, 0x1a, 0x411111F0), + /* Pin widget 0x1B - NPC */ + AZALIA_PIN_CFG(0, 0x1b, 0x411111F0), + /* Pin widget 0x1D - BEEP-IN */ + AZALIA_PIN_CFG(0, 0x1d, 0x40610041), + /* Pin widget 0x1E - NPC */ + AZALIA_PIN_CFG(0, 0x1e, 0x411111F0), + /* Pin widget 0x21 - HP1-OUT (Port-I) */ + AZALIA_PIN_CFG(0, 0x21, 0x04211020), + /* + * Widget node 0x20 - 1 + * Codec hidden reset and speaker power 2W/4ohm + */ + 0x0205001A, + 0x0204C003, + 0x02050038, + 0x02047901, + /* + * Widget node 0x20 - 2 + * Class D power on Reset + */ + 0x0205003C, + 0x02040354, + 0x0205003C, + 0x02040314, + /* + * Widget node 0x20 - 3 + * Disable AGC and set AGC limit to -1.5dB + */ + 0x02050016, + 0x02040C50, + 0x02050012, + 0x0204EBC1, + /* + * Widget node 0x20 - 4 + * Set AGC Post gain +1.5dB then Enable AGC + */ + 0x02050013, + 0x02044023, + 0x02050016, + 0x02040E50, + /* + * Widget node 0x20 - 5 + * Silence detector enabling + Set EAPD to verb control + */ + 0x02050037, + 0x0204FE15, + 0x02050010, + 0x02040020, + /* + * Widget node 0x20 - 6 + * Silence data mode Threshold (-90dB) + */ + 0x02050030, + 0x0204A000, + 0x0205001B, + 0x02040A4B, + /* + * Widget node 0x20 - 7 + * Default setting - 1 + */ + 0x05750003, + 0x05740DA3, + 0x02050046, + 0x02040004, + /* + * Widget node 0x20 - 8 + * support 1 pin detect two port + */ + 0x02050009, + 0x0204E003, + 0x0205000A, + 0x02047770, + /* + * Widget node 0x20 - 9 + * To set LDO1/LDO2 as default (used for headset) + */ + 0x02050008, + 0x02046A0C, + 0x02050008, + 0x02046A0C, +}; + +const u32 pc_beep_verbs[] = { +}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb index 8ea21b0..e1c8134 100644 --- a/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb +++ b/src/mainboard/google/brox/variants/baseboard/brox/devicetree.cb @@ -72,6 +72,9 @@ # HD Audio register "pch_hda_dsp_enable" = "1" + register "pch_hda_sdi_enable[0]" = "1" + register "pch_hda_sdi_enable[1]" = "1" + register "pch_hda_audio_link_hda_enable" = "1" register "pch_hda_idisp_link_tmode" = "HDA_TMODE_8T" register "pch_hda_idisp_link_frequency" = "HDA_LINKFREQ_96MHZ" register "pch_hda_idisp_codec_enable" = "1" -- To view, visit https://review.coreboot.org/c/coreboot/+/79723?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1edd5aee053debe39b34048266703031c088cd00 Gerrit-Change-Number: 79723 Gerrit-PatchSet: 8 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: merged

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[M] Change in coreboot[main]: mb/google/brox: Enable HDA Codec ALC256
by Shelley Chen (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Paul Menzel, Poornima Tom, Vamshi Krishna Gopal, Vamshi Krishna Gopal. Shelley Chen has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/79723?usp=email ) Change subject: mb/google/brox: Enable HDA Codec ALC256 ...................................................................... Patch Set 7: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/79723?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1edd5aee053debe39b34048266703031c088cd00 Gerrit-Change-Number: 79723 Gerrit-PatchSet: 7 Gerrit-Owner: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Reviewer: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Attention: Poornima Tom <poornima.tom(a)intel.com> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.corp-partner.google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Vamshi Krishna Gopal <vamshi.krishna.gopal(a)intel.com> Gerrit-Comment-Date: Thu, 01 Feb 2024 17:06:09 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: mb/google/brya/var/*: Use name 'LCD0' for internal panel output
by Matt DeVillier (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Kapil Porwal, Nick Vaccaro, Subrata Banik. Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80174?usp=email ) Change subject: mb/google/brya/var/*: Use name 'LCD0' for internal panel output ...................................................................... Patch Set 3: (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/80174/comment/fd9e84c1_db3f9fda : PS2, Line 9: The GMA driver generates the brightness controls expecting the name : LCD0 > so, the GMA driver ACPI has two parts - the dsdt, which contains the brightness level list and the a […] is anything additional needed here? -- To view, visit https://review.coreboot.org/c/coreboot/+/80174?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I389553b2ddc5b09d165229e2d8066cacf852b82c Gerrit-Change-Number: 80174 Gerrit-PatchSet: 3 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Won Chung <wonchung(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Comment-Date: Thu, 01 Feb 2024 17:02:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-MessageType: comment

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[S] Change in coreboot[main]: mb/up/squared: Make mini PCIe port mode configurable
by Nico Huber (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Felix Singer, Paul Menzel, Reto Buerki. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80261?usp=email ) Change subject: mb/up/squared: Make mini PCIe port mode configurable ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic2da1dd4252ebb5e373bc65418e321f566d4c10f Gerrit-Change-Number: 80261 Gerrit-PatchSet: 2 Gerrit-Owner: Reto Buerki <reet(a)codelabs.ch> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Reto Buerki <reet(a)codelabs.ch> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Comment-Date: Thu, 01 Feb 2024 17:01:43 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[S] Change in coreboot[main]: util/kconfig: Uprev to Linux 6.7's kconfig
by Nico Huber (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Martin L Roth, Patrick Georgi. Nico Huber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80263?usp=email ) Change subject: util/kconfig: Uprev to Linux 6.7's kconfig ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/80263?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1ff302dafa01e78429a30ff18e21ffe0b45ce46e Gerrit-Change-Number: 80263 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin L Roth <gaumless(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Patrick Georgi <patrick(a)coreboot.org> Gerrit-Attention: Martin L Roth <gaumless(a)gmail.com> Gerrit-Comment-Date: Thu, 01 Feb 2024 16:58:50 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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[M] Change in coreboot[main]: drivers/wifi: Add MTCL function to ACPI SSDT
by David Ruth (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Arthur Heymans, Cliff Huang, Eric Lai, Kapil Porwal, Lance Zhao, Nick Vaccaro, Nico Huber, Paul Menzel, Subrata Banik, Subrata Banik, Tim Wawrzynczak. David Ruth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/80170?usp=email ) Change subject: drivers/wifi: Add MTCL function to ACPI SSDT ...................................................................... Patch Set 17: (3 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/80170/comment/a6d90b93_47f0c7d4 : PS14, Line 7: Add MTCL function to ACPI SSDT tables > Please prefix with `drivers/wifi:`. Done Patchset: PS14: > One (hopefully) last thing: As USE_MTCL is `default n`, `mtcl.c` isn't covered […] Added configs/config.google_yaviks_cros, along with a comment describing how I did it, and why it should build test this feature (by making USE_MTCL a default for BOARD_GOOGLE_YAVIKS). File src/drivers/wifi/generic/mtcl.c: https://review.coreboot.org/c/coreboot/+/80170/comment/03185116_d1b60a03 : PS14, Line 9: WIFI_MTCL_CBFS_DEFAULT_FILENAME "wifi_mtcl.hex" > > This is the filename inside CBFS, as hardcoded in the Makefile.mk, isn't it? […] Updating this comment because I changed the name to "wifi_mtcl.bin" from "wifi_mtcl.hex", as this is a binary file. -- To view, visit https://review.coreboot.org/c/coreboot/+/80170?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b5e7312a44e114270e664b983626faa6cfee350 Gerrit-Change-Number: 80170 Gerrit-PatchSet: 17 Gerrit-Owner: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Thu, 01 Feb 2024 16:53:34 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nico Huber <nico.h(a)gmx.de> Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-MessageType: comment

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[M] Change in coreboot[main]: drivers/wifi: Add MTCL function to ACPI SSDT
by David Ruth (Code Review) 01 Feb '24

01 Feb '24

Attention is currently required from: Arthur Heymans, Cliff Huang, Eric Lai, Kapil Porwal, Lance Zhao, Nick Vaccaro, Nico Huber, Subrata Banik, Tim Wawrzynczak. Hello Arthur Heymans, Cliff Huang, Eric Lai, Kapil Porwal, Lance Zhao, Nick Vaccaro, Nico Huber, Subrata Banik, Tim Wawrzynczak, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/80170?usp=email to look at the new patch set (#17). Change subject: drivers/wifi: Add MTCL function to ACPI SSDT ...................................................................... drivers/wifi: Add MTCL function to ACPI SSDT The MTCL function provides a country list to the Linux kernel via an ACPI function in SSDT for MediaTek WiFi chipsets that are capable of operating on the 6GHz band. The country list is used to selectively disable 6GHz and 5.9GHz operation based on the country the device is operating in. The function needs to read a binary file and send it as a package via the MTCL method in SSDT for PCIe WiFi with MediaTek chipsets. Change Summary: * Add src/drivers/wifi/generic/mtcl.c to abstract functionaltity related to MTCL * Add write_mtcl_aml function to convert the byte data into the format expected by the MTCL functionality in the Linux kernel. * Add validate_mtcl function to validate that the byte data read in from a file is in the expected format. * Add write_mtcl_function function to read a binary file called "wifi_mtcl".hex" from cbfs, then call validate_mtcl to verify that it is in an expected format, and if so write the aml via acpigen * Add config flag DRIVERS_MTK_WIFI to src/drivers/wifi/generic in order to include MediaTek WiFi specific functionality * Add config flag USE_MTCL which depends on DRIVERS_MTK_WIFI and enables including the specific ACPI function defined in SSDT * Add config flag CONFIG_WIFI_MTCL_CBFS_FILEPATH which depends on DRIVERS_MTK_WIFI which enables configuring the file to add as "wifi_mtcl.hex" * Add a call to write_mtcl_function to src/drivers/wifi/generic/acpi.c to include the MTCL function in SSDT for MTK WiFi devices when USE_MTCL is enabled. * Add USE_MTCL as the default to BOARD_GOOGLE_YAVIKS in src/mainboard/google/brya/Kconfig. This will be the first board to use this feature. * Add MediaTek VID to src/include/device/pci_ids.h. * Add configs/config.google_yaviks_cros, which is a copy of configs/config.google_reef_cros with the board type changed to BOARD_GOOGLE_YAVIKS to ensure this feature gets build tested. BUG=b:295544553 TEST=Add Kconfig entry USE_MTCL for pujjo TEST=Add wifi_mtcl_defaults.hex blob to cbfs TEST=Build coreboot for pujjo `emerge-nissa coreboot chromeos-bootimage` TEST=Verify that MTCL defined in the file is present: TEST=`acpidump -b` TEST=`iasl ssdt.dat` TEST=`less ssdt.dsl` TEST=Search for MTCL Signed-off-by: David Ruth <druth(a)chromium.org> Change-Id: I9b5e7312a44e114270e664b983626faa6cfee350 --- A configs/config.google_yaviks_cros M src/drivers/wifi/generic/Kconfig M src/drivers/wifi/generic/Makefile.mk M src/drivers/wifi/generic/acpi.c A src/drivers/wifi/generic/mtcl.c M src/include/device/pci_ids.h A src/include/mtcl.h M src/mainboard/google/brya/Kconfig 8 files changed, 240 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/80170/17 -- To view, visit https://review.coreboot.org/c/coreboot/+/80170?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9b5e7312a44e114270e664b983626faa6cfee350 Gerrit-Change-Number: 80170 Gerrit-PatchSet: 17 Gerrit-Owner: David Ruth <druth(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Reviewer: Eric Lai <ericllai(a)google.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-CC: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Lance Zhao <lance.zhao(a)gmail.com> Gerrit-Attention: Eric Lai <ericllai(a)google.com> Gerrit-Attention: Subrata Banik <subi.banik(a)gmail.com> Gerrit-Attention: Nico Huber <nico.h(a)gmx.de> Gerrit-Attention: Cliff Huang <cliff.huang(a)intel.com> Gerrit-Attention: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Attention: Tim Wawrzynczak <inforichland(a)gmail.com> Gerrit-Attention: Nick Vaccaro <nvaccaro(a)chromium.org> Gerrit-Attention: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newpatchset

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coreboot-gerrit February 2024