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Change subject: superio/acpi: Add SUPERIO_PNP_NO_DIS to support always active LDNs
......................................................................
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Change subject: doc/releases: Add 24.02.1 release section
......................................................................
doc/releases: Add 24.02.1 release section
Change-Id: I4d217c3dba4aa3ec30732b914009a6e9d53371c7
Signed-off-by: Felix Singer <felixsinger(a)posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80798
Reviewed-by: Martin L Roth <gaumless(a)gmail.com>
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M Documentation/releases/coreboot-24.02-relnotes.md
1 file changed, 9 insertions(+), 0 deletions(-)
Approvals:
build bot (Jenkins): Verified
Martin L Roth: Looks good to me, approved
diff --git a/Documentation/releases/coreboot-24.02-relnotes.md b/Documentation/releases/coreboot-24.02-relnotes.md
index eb5349e..e4e7892 100644
--- a/Documentation/releases/coreboot-24.02-relnotes.md
+++ b/Documentation/releases/coreboot-24.02-relnotes.md
@@ -31,6 +31,15 @@
'master' branch have been switched to 'main'.
+Release 24.02.1
+---------------
+
+### lib/rtc: Fix off-by-one error in February day count in leap year
+
+The month argument passed to rtc\_month\_days is 0-based, not 1-based.
+This results in the RTC being reverted to the build date constantly
+on 29th February 2024.
+
Significant or interesting changes
----------------------------------
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Change subject: amdfwtool: Change&Record the current table in integration function
......................................................................
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Change subject: treewide: Change I2C/SMBUS master/slave to controller/target
......................................................................
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Change subject: payloads/depthcharge: Add DEPTHCHARGE_REPO and DEPTHCHARGE_BRANCH
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Change subject: treewide: Change I2C/SMBUS master/slave to controller/target
......................................................................
Patch Set 4:
(3 comments)
File src/southbridge/amd/pi/hudson/smbus_spd.c:
https://review.coreboot.org/c/coreboot/+/77098/comment/01b6061e_071efb86 :
PS3, Line 87: static int readspd(int iobase, int SmbusSlaveAddress, char *buffer, int count)
: {
: int index, error;
:
: printk(BIOS_SPEW, "-------------READING SPD-----------\n");
: printk(BIOS_SPEW, "iobase: 0x%08X, SmbusSlave: 0x%08X, count: %d\n",
: iobase, SmbusSlaveAddress, count);
:
: /* read the first byte using offset zero */
: error = readSmbusByteData(iobase, SmbusSlaveAddress, buffer, 0);
:
: if (error) {
: printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
: return error;
: }
:
: /* read the remaining bytes using auto-increment for speed */
: for (index = 1; index < count; index++)
: {
: error = readSmbusByte(iobase, SmbusSlaveAddress, &buffer [index]);
: if (error) {
: printk(BIOS_ERR, "-------------SPD READ ERROR-----------\n");
: return error;
: }
: }
: printk(BIOS_SPEW, "\n");
: printk(BIOS_SPEW, "-------------FINISHED READING SPD-----------\n");
:
: return 0;
: }
> change `SmbusSlave*` to `SmbusTarget*` ?
Done
File src/southbridge/intel/bd82x6x/smbus.c:
https://review.coreboot.org/c/coreboot/+/77098/comment/defb3bde_9cf319dd :
PS3, Line 20: Slave
> Change to `Target` ?
Done
https://review.coreboot.org/c/coreboot/+/77098/comment/daf35a60_c903f29d :
PS3, Line 23: SMBUS_SLAVE_ADDR
> Change to `SMBUS_TARGET_ADDR` ?
This is from the chips' #define. I was asked not to update chip defines. Those should be changed only when the datasheet for the chip has been updated.
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Hello Arthur Heymans, Caveh Jalali, Christian Walter, Cliff Huang, Felix Held, Felix Singer, Forest Mittelberg, Fred Reitberger, Hung-Te Lin, Jakub Czapiga, Jason Glenesk, Jeff Daly, Johnny Lin, Jonathan Zhang, Julius Werner, Lance Zhao, Matt DeVillier, Matt DeVillier, Raul Rangel, Sean Rhodes, Tim Chu, Tim Wawrzynczak, Vanessa Eusebio, Xi Chen, Yidi Lin, Yu-Ping Wu, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/77098?usp=email
to look at the new patch set (#5).
The following approvals got outdated and were removed:
Code-Review+1 by Felix Singer, Code-Review+1 by Matt DeVillier, Code-Review+1 by Yu-Ping Wu, Verified+1 by build bot (Jenkins)
Change subject: treewide: Change I2C/SMBUS master/slave to controller/target
......................................................................
treewide: Change I2C/SMBUS master/slave to controller/target
The I2C and SMBUS specifications have updated their terminology from
master/slave to controller/target. As stated in the coreboot language
style page, using the word 'slave' should be avoided when possible [1]
except when discussing the term as applicable by the current standards.
As the SMBUS and I2C standards are no longer using this terminology,
the updated terms controller/target should be used in the coreboot
I2C/SMBUS code.
We'll keep register names for devices are they are in the datasheets.
[1] https://doc.coreboot.org/community/language_style.html#discussing-words-to-…
Signed-off-by: Martin Roth <gaumless(a)gmail.com>
Change-Id: I6c141fa4322de9e9ed208589f591560fed609825
---
M Documentation/technotes/console.md
M Documentation/tutorial/part3.md
M src/acpi/device.c
M src/commonlib/bsd/include/commonlib/bsd/cb_err.h
M src/console/Kconfig
M src/device/dram/rcd.c
M src/device/i2c_bus.c
M src/device/software_i2c.c
M src/drivers/analogix/anx7625/anx7625.c
M src/drivers/i2c/designware/dw_i2c.c
M src/drivers/i2c/tpm/tpm.c
M src/drivers/i2c/ww_ring/ww_ring.c
M src/drivers/intel/gma/edid.c
M src/drivers/intel/gma/edid.h
M src/drivers/smbus/i2c_smbus_console.c
M src/drivers/smbus/sc16is7xx_init.c
M src/ec/google/chromeec/ec_i2c.c
M src/ec/kontron/kempld/kempld_i2c.c
M src/include/device/i2c.h
M src/include/device/i2c_bus.h
M src/include/device/i2c_simple.h
M src/include/device/smbus_host.h
M src/include/smbios.h
M src/lib/smbios.c
M src/mainboard/asus/p8x7x-series/variants/p8c_ws/overridetree.cb
M src/mainboard/google/auron/variants/auron_paine/include/variant/acpi/mainboard.asl
M src/mainboard/google/auron/variants/auron_yuna/include/variant/acpi/mainboard.asl
M src/mainboard/google/auron/variants/buddy/include/variant/acpi/mainboard.asl
M src/mainboard/google/auron/variants/gandof/include/variant/acpi/mainboard.asl
M src/mainboard/google/auron/variants/lulu/include/variant/acpi/mainboard.asl
M src/mainboard/google/auron/variants/samus/include/variant/acpi/mainboard.asl
M src/mainboard/google/cyan/acpi/touchscreen_elan.asl
M src/mainboard/google/cyan/acpi/touchscreen_melfas.asl
M src/mainboard/google/cyan/acpi/touchscreen_synaptics.asl
M src/mainboard/google/cyan/acpi/trackpad_atmel.asl
M src/mainboard/google/cyan/acpi/trackpad_elan.asl
M src/mainboard/google/daisy/exynos5250.h
M src/mainboard/google/daisy/mainboard.c
M src/mainboard/google/kukui/boardid.c
M src/mainboard/google/octopus/variants/baseboard/devicetree.cb
M src/mainboard/google/rambi/acpi/mainboard.asl
M src/mainboard/google/rambi/acpi/touchscreen_atmel.asl
M src/mainboard/google/rambi/acpi/touchscreen_elan.asl
M src/mainboard/google/rambi/acpi/touchscreen_wdt.asl
M src/mainboard/google/rambi/acpi/trackpad_atmel.asl
M src/mainboard/google/rambi/acpi/trackpad_elan.asl
M src/mainboard/google/slippy/variants/falco/include/variant/acpi/mainboard.asl
M src/mainboard/google/slippy/variants/leon/include/variant/acpi/mainboard.asl
M src/mainboard/google/slippy/variants/peppy/include/variant/acpi/mainboard.asl
M src/mainboard/google/slippy/variants/wolf/include/variant/acpi/mainboard.asl
M src/mainboard/intel/glkrvp/touchpad.asl
M src/mainboard/intel/strago/acpi/mainboard.asl
M src/northbridge/intel/i945/gma.c
M src/soc/amd/stoneyridge/smbus_spd.c
M src/soc/cavium/cn81xx/twsi.c
M src/soc/cavium/common/bdk-coreboot.c
M src/soc/intel/apollolake/chip.h
M src/soc/intel/baytrail/scc.c
M src/soc/intel/common/block/include/intelblocks/imc.h
M src/soc/intel/common/block/smbus/smbus.c
M src/soc/mediatek/common/i2c.c
M src/soc/nvidia/tegra/i2c.c
M src/soc/qualcomm/common/qupv3_i2c.c
M src/soc/qualcomm/ipq40xx/i2c.c
M src/soc/qualcomm/ipq806x/i2c.c
M src/soc/qualcomm/qcs405/i2c.c
M src/soc/rockchip/common/i2c.c
M src/soc/samsung/exynos5250/i2c.c
M src/soc/samsung/exynos5420/i2c.c
M src/southbridge/amd/pi/hudson/smbus_spd.c
M src/southbridge/intel/bd82x6x/smbus.c
M src/southbridge/intel/common/smbus.c
M src/southbridge/intel/ibexpeak/smbus.c
M src/southbridge/intel/lynxpoint/smbus.c
M tests/device/i2c-test.c
M util/intelvbttool/intelvbttool.c
76 files changed, 274 insertions(+), 274 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/98/77098/5
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Change subject: doc/releases: Add 24.02.1 release section
......................................................................
Patch Set 1: Code-Review+2
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Change subject: device/pnp_device: Demote unassigned resource printk to NOTICE
......................................................................
Patch Set 3:
(1 comment)
Patchset:
PS3:
> CB:80774 should improve things
Done
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Felix Held has submitted this change. ( https://review.coreboot.org/c/coreboot/+/80774?usp=email )
Change subject: device/pnp_device: fix log levels for unassigned resource messages
......................................................................
device/pnp_device: fix log levels for unassigned resource messages
Commit a662777b6f57 ("pnp_device: don't treat missing PNP_MSC devicetree
entry as error") lowered the log level for every resource without the
assigned bit set except for the IRQ0 and IRQ1 PNP device resources.
Commit df84fff80fed ("device/pnp_device: Demote unassigned resource
printk to NOTICE") lowered the log level for the IRQ0 and IRQ1 PNP
device resources to a lower log level than for the other warnings that
are less likely a problem. Fix this regression by using the BIOS_NOTICE
log level for all PNP resources that don't have the IORESOURCE_ASSIGNED
bit set.
Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de>
Change-Id: I232e60ef7ae672e18cc1837b8e6a0427d01c142b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80774
Reviewed-by: Matt DeVillier <matt.devillier(a)gmail.com>
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Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
---
M src/device/pnp_device.c
1 file changed, 3 insertions(+), 15 deletions(-)
Approvals:
build bot (Jenkins): Verified
Nico Huber: Looks good to me, but someone else must approve
Matt DeVillier: Looks good to me, approved
Arthur Heymans: Looks good to me, approved
diff --git a/src/device/pnp_device.c b/src/device/pnp_device.c
index c7c6228..431e227 100644
--- a/src/device/pnp_device.c
+++ b/src/device/pnp_device.c
@@ -118,21 +118,9 @@
static void pnp_set_resource(struct device *dev, struct resource *resource)
{
if (!(resource->flags & IORESOURCE_ASSIGNED)) {
- /* The PNP_MSC Super IO registers have the IRQ flag set. If no
- value is assigned in the devicetree, the corresponding
- PNP_MSC register doesn't get written, which should be printed
- as warning and not as error. */
- if (resource->flags & IORESOURCE_IRQ &&
- (resource->index != PNP_IDX_IRQ0) &&
- (resource->index != PNP_IDX_IRQ1))
- printk(BIOS_WARNING, "%s %02lx %s size: "
- "0x%010llx not assigned in devicetree\n", dev_path(dev),
- resource->index, resource_type(resource),
- resource->size);
- else
- printk(BIOS_NOTICE, "%s %02lx %s size: 0x%010llx "
- "not assigned in devicetree\n", dev_path(dev), resource->index,
- resource_type(resource), resource->size);
+ printk(BIOS_NOTICE, "%s %02lx %s size: 0x%010llx not assigned in devicetree\n",
+ dev_path(dev), resource->index, resource_type(resource),
+ resource->size);
return;
}
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