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Hello Pranava Y N, Subrata Banik,
I'd like you to reexamine a change. Please visit
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Change subject: mb/google/fatcat: configure espi alarm gpio
......................................................................
mb/google/fatcat: configure espi alarm gpio
configuration for the eSPI alarm GPIO PADS (ESPI_SOC_ALERT_L) necessary
for the SOC to enter low power mode (S0ix).
Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f
Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com>
---
M src/mainboard/google/fatcat/variants/fatcat/gpio.c
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/84957/2
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Attention is currently required from: Karthik Ramasubramanian, Paul Menzel.
Hello Paul Menzel, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
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to look at the new patch set (#5).
The following approvals got outdated and were removed:
Code-Review+1 by Paul Menzel, Verified+1 by build bot (Jenkins)
Change subject: mb/google/brox: Hint romstage init about upcoming reset
......................................................................
mb/google/brox: Hint romstage init about upcoming reset
Add support for the mainboard to check for any potential firmware
component update and hence the assosicated reset. This indication can be
used to avoid any redundant resets during the boot flow.
BUG=b:375444631
TEST=Build Brox BIOS image and boot to OS. Ensure that the hints are
provided correctly and 2 redundant resets are filtered out.
Change-Id: Ieed3f9013dee9aa501a3f0403f3a28722a3878f1
Signed-off-by: Karthikeyan Ramasubramanian <kramasub(a)google.com>
---
M src/mainboard/google/brox/variants/baseboard/brox/Makefile.mk
A src/mainboard/google/brox/variants/baseboard/brox/romstage.c
M src/mainboard/google/brox/variants/baseboard/include/baseboard/variants.h
M src/mainboard/google/brox/variants/brox/Makefile.mk
M src/mainboard/google/brox/variants/brox/variant.c
M src/mainboard/google/brox/variants/jubilant/Makefile.mk
M src/mainboard/google/brox/variants/jubilant/variant.c
M src/mainboard/google/brox/variants/lotso/Makefile.mk
M src/mainboard/google/brox/variants/lotso/variant.c
9 files changed, 93 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/84937/5
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Jérémy Compostella has posted comments on this change by Jérémy Compostella. ( https://review.coreboot.org/c/coreboot/+/84941?usp=email )
Change subject: drivers/wifi: Support Bluetooth Per-Platform Antenna Gain
......................................................................
Patch Set 2:
(1 comment)
File src/drivers/wifi/generic/acpi.c:
https://review.coreboot.org/c/coreboot/+/84941/comment/3206445c_1f094a89?us… :
PS1, Line 675: BTPPAG
> should it be PPAG since acpigen_write_name("PPAG");?
Done
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Attention is currently required from: Anil Kumar K, Cliff Huang, Hannah Williams, Jamie Ryu, Jérémy Compostella, Zhixing Ma, dinesh.sharma(a)intel.com.
Hello Anil Kumar K, Bora Guvendik, Cliff Huang, Hannah Williams, Jamie Ryu, Zhixing Ma, build bot (Jenkins), dinesh.sharma(a)intel.com,
I'd like you to reexamine a change. Please visit
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The following approvals got outdated and were removed:
Verified+1 by build bot (Jenkins)
Change subject: drivers/wifi: Support Bluetooth Per-Platform Antenna Gain
......................................................................
drivers/wifi: Support Bluetooth Per-Platform Antenna Gain
The ACPI BTPPAG method provide information to controls the antenna
gain method to be used per country.
The ANTenna gain mode is a bit field (0 - disabled, 1 -enabled)
defined as follow:
- Bit 0 - Antenna gain in EU
- Bit 1 - Antenna gain in China Mainland
The implementation follows document 559910 Intel Connectivity
Platforms BIOS Guideline revision 8.3 specification.
BUG=b:346600091
TEST=BTPPAG method is added to the bluetooth companion device and
return the data supplied by the SAR binary blob
Change-Id: Iebe95815c944d045f4cf686abcd1874a8a45e210
Signed-off-by: Jeremy Compostella <jeremy.compostella(a)intel.com>
---
M src/drivers/wifi/generic/acpi.c
M src/include/sar.h
M src/vendorcode/google/chromeos/sar.c
3 files changed, 53 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/84941/2
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Anil Kumar K has posted comments on this change by Anil Kumar K. ( https://review.coreboot.org/c/coreboot/+/84888?usp=email )
Change subject: mb/google/fatcat: Add devicetree for MAX98357A codec
......................................................................
Patch Set 2:
(1 comment)
Patchset:
PS2:
can we please merge this change ?
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