coreboot-gerrit November 2024

coreboot-gerrit@coreboot.org

1 participants
1925 discussions

[XS] Change in coreboot[main]: mb/google/fatcat: Disable package c-state auto-demotion
by Subrata Banik (Code Review) 03 Nov '24

03 Nov '24

Attention is currently required from: Pranava Y N, Sukumar Ghorai. Subrata Banik has posted comments on this change by Sukumar Ghorai. ( https://review.coreboot.org/c/coreboot/+/84956?usp=email ) Change subject: mb/google/fatcat: Disable package c-state auto-demotion ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb: https://review.coreboot.org/c/coreboot/+/84956/comment/26d8194f_5b59dd2a?us… : PS1, Line 42: # Disable PKGC-state demotion ```suggestion # Disable PKGC-state auto-demotion ``` https://review.coreboot.org/c/coreboot/+/84956/comment/d4e3fbb9_4322d383?us… : PS1, Line 42: demotion > Acknowledged looks like u said `ACK` but nothing has been changed ? -- To view, visit https://review.coreboot.org/c/coreboot/+/84956?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01f2cb8ac1093ae98cc076e35ad1924baa53aa59 Gerrit-Change-Number: 84956 Gerrit-PatchSet: 1 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Sun, 03 Nov 2024 02:51:28 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com> Comment-In-Reply-To: Sukumar Ghorai <sukumar.ghorai(a)intel.com>

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[XS] Change in coreboot[main]: mb/google/fatcat: configure espi alarm gpio
by Subrata Banik (Code Review) 03 Nov '24

03 Nov '24

Attention is currently required from: Pranava Y N, Sukumar Ghorai. Subrata Banik has posted comments on this change by Sukumar Ghorai. ( https://review.coreboot.org/c/coreboot/+/84957?usp=email ) Change subject: mb/google/fatcat: configure espi alarm gpio ...................................................................... Patch Set 4: Code-Review+2 (1 comment) Commit Message: https://review.coreboot.org/c/coreboot/+/84957/comment/6267670f_b686c5a2?us… : PS4, Line 7: mb/google/fatcat: configure espi alarm gpio mb/google/fatcat/var/fatcat: Configure eSPI alarm GPIO This patch configures the ESPI_SOC_ALERT_L GPIO pad on fatcat as NC to enable S0ix low power entry. -- To view, visit https://review.coreboot.org/c/coreboot/+/84957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Gerrit-Change-Number: 84957 Gerrit-PatchSet: 4 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Sun, 03 Nov 2024 02:50:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes

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[XS] Change in coreboot[main]: mb/google/fatcat: Disable package c-state auto-demotion
by Sukumar Ghorai (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Pranava Y N, Subrata Banik. Sukumar Ghorai has posted comments on this change by Sukumar Ghorai. ( https://review.coreboot.org/c/coreboot/+/84956?usp=email ) Change subject: mb/google/fatcat: Disable package c-state auto-demotion ...................................................................... Patch Set 1: (2 comments) File src/mainboard/google/fatcat/variants/baseboard/fatcat/devicetree.cb: https://review.coreboot.org/c/coreboot/+/84956/comment/12f69250_73a0f6f2?us… : PS1, Line 42: demotion > nit: […] Acknowledged https://review.coreboot.org/c/coreboot/+/84956/comment/4a9cee3b_ff61992d?us… : PS1, Line 43: register "disable_package_c_state_demotion" = "true" > initially when this was implemented in ADL, I thought this is a W/A and we won't need this in future […] Auto demotion is disable for all Chrome platform. MTL ref. a5596a351e633 mb/intel/mtlrvp: Disable package C-state auto demotion. EPB (Dynamic Energy Performance Preference) value comes into playfor C1 demotion heuristics use EPB parameter to balance between power and performance, i.e. low threshold when EPB is low in-order to get C1 demotion faster and vice-versa. Some OS changes the EPB value dynamically in AC/DC mode so in AC gets more demotions and gains performance while in DC it hits less demotion and gains power. Unfortunately, ChromeOS operates at default EPB=0x7 (low EPB) in both AC/DC, so in DC mode it gets much C1 demotion hits than expected (similar to AC mode) and loses power, respectively. Chrome customers decided to disable C1 demotion since they lost power in some KPI when it’s enabled. -- To view, visit https://review.coreboot.org/c/coreboot/+/84956?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I01f2cb8ac1093ae98cc076e35ad1924baa53aa59 Gerrit-Change-Number: 84956 Gerrit-PatchSet: 1 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com> Gerrit-Comment-Date: Sat, 02 Nov 2024 19:41:05 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Subrata Banik <subratabanik(a)google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat: configure espi alarm gpio
by Sukumar Ghorai (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Pranava Y N, Subrata Banik. Hello Pranava Y N, Subrata Banik, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84957?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/google/fatcat: configure espi alarm gpio ...................................................................... mb/google/fatcat: configure espi alarm gpio configuration for the eSPI alarm GPIO PADS (ESPI_SOC_ALERT_L) necessary for the SOC to enter low power mode (S0ix). TEST=Build fatcat and check the platform boots without an issue. Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Signed-off-by: Sukumar Ghorai <sukumar.ghorai(a)intel.com> --- M src/mainboard/google/fatcat/variants/fatcat/gpio.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/57/84957/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/84957?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb80a56177105c0281d05fe1f5daa87e6f7e291f Gerrit-Change-Number: 84957 Gerrit-PatchSet: 4 Gerrit-Owner: Sukumar Ghorai <sukumar.ghorai(a)intel.com> Gerrit-Reviewer: Pranava Y N <pranavayn(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Pranava Y N <pranavayn(a)google.com>

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[XS] Change in coreboot[main]: mb/google/fatcat: configure espi alarm gpio
by Sukumar Ghorai (Code Review) 02 Nov '24

02 Nov '24

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[S] Change in coreboot[main]: soc/mediatek/common: Refactor `struct tracker`
by Yu-Ping Wu (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84958?usp=email ) Change subject: soc/mediatek/common: Refactor `struct tracker` ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84958?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I4b89c27fd693ee08e670c1a9ab4cbdbec220bee7 Gerrit-Change-Number: 84958 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Sat, 02 Nov 2024 09:46:35 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: soc/mediatek/common: Use write32p and read32p for tracker
by Yu-Ping Wu (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Hung-Te Lin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yidi Lin. ( https://review.coreboot.org/c/coreboot/+/84959?usp=email ) Change subject: soc/mediatek/common: Use write32p and read32p for tracker ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/84959?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I9ee64677e9126789a07db1963a2c17a504cb4d9c Gerrit-Change-Number: 84959 Gerrit-PatchSet: 3 Gerrit-Owner: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Sat, 02 Nov 2024 09:44:26 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[L] Change in coreboot[main]: mb/gigabyte/ga-h77m-d3h: Add Sandy/Ivy Bridge board GA-H77M-D3H
by Fabian Groffen (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Angel Pons, Felix Singer, Patrick Rudolph. Hello Angel Pons, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/77046?usp=email to look at the new patch set (#10). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: mb/gigabyte/ga-h77m-d3h: Add Sandy/Ivy Bridge board GA-H77M-D3H ...................................................................... mb/gigabyte/ga-h77m-d3h: Add Sandy/Ivy Bridge board GA-H77M-D3H This board is based off ga-b75m-d3h, which uses the same SuperIO chip. It doesn't have the ASMedia SATA3 controller, the H77 chipset comes with 2 SATA3 ports next to the 4 SATA2 ports. Flashing notes: These boards come with dual-BIOS feature. This is set of two unremovable what appears to be identical chips marked M_BIOS and B_BIOS. Flash the B_BIOS chip, and boot the system. Ensure you have a payload and setup ready to boot a Linux system with iomem=relaxed or similar. Immediately use flashrom -p internal to flash the same firmware again. If you skip this step your next boot will show weird exception traces in either coreboot or your payload. Flashing from there via the chip is very difficult (you have to try many times in order to get a booting run), which can all be remedied by doing a flash from internal. I suppose the dual-BIOS feature is somewhat in the way here. Tested with: - CPU Core i7-3770S - RAM single bank 4GB CL11, two banks 4+4GB CL11 - OS Gentoo Linux LiveUSB, KDE desktop (Linux 5.15.72) Working: - GRUB2 payload - Intel ME stripped - Integrated graphics with libgfxinit - (boot from) SATA2, SATA3 ports - Rear and mainboard connector USB ports, supporting boot - Atheros GbE NIC - 2.0 channel audio via lineout jack output - ACPI (power button triggers OS events) - S3 suspend/resume - PWM FAN control, FAN speed readings - Temperature sensor readings Signed-off-by: Fabian Groffen <grobian(a)gentoo.org> Change-Id: Icb3e74326a0a7aaf770d1917a2a0931feadd7eab --- A src/mainboard/gigabyte/ga-h77m-d3h/Kconfig A src/mainboard/gigabyte/ga-h77m-d3h/Kconfig.name A src/mainboard/gigabyte/ga-h77m-d3h/Makefile.mk A src/mainboard/gigabyte/ga-h77m-d3h/acpi/ec.asl A src/mainboard/gigabyte/ga-h77m-d3h/acpi/platform.asl A src/mainboard/gigabyte/ga-h77m-d3h/acpi/superio.asl A src/mainboard/gigabyte/ga-h77m-d3h/board_info.txt A src/mainboard/gigabyte/ga-h77m-d3h/cmos.default A src/mainboard/gigabyte/ga-h77m-d3h/cmos.layout A src/mainboard/gigabyte/ga-h77m-d3h/data.vbt A src/mainboard/gigabyte/ga-h77m-d3h/devicetree.cb A src/mainboard/gigabyte/ga-h77m-d3h/dsdt.asl A src/mainboard/gigabyte/ga-h77m-d3h/early_init.c A src/mainboard/gigabyte/ga-h77m-d3h/gma-mainboard.ads A src/mainboard/gigabyte/ga-h77m-d3h/gpio.c A src/mainboard/gigabyte/ga-h77m-d3h/hda_verb.c A src/mainboard/gigabyte/ga-h77m-d3h/thermal.h 17 files changed, 565 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/46/77046/10 -- To view, visit https://review.coreboot.org/c/coreboot/+/77046?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icb3e74326a0a7aaf770d1917a2a0931feadd7eab Gerrit-Change-Number: 77046 Gerrit-PatchSet: 10 Gerrit-Owner: Fabian Groffen <grobian(a)gentoo.org> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-CC: Keith Hui <buurin(a)gmail.com> Gerrit-CC: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Attention: Angel Pons <th3fanbus(a)gmail.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PLL and Clock init support
by Jarried Lin (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Guangjie Song, Hung-Te Lin, Paul Menzel, Yidi Lin, Yu-Ping Wu. Jarried Lin has posted comments on this change by Jarried Lin. ( https://review.coreboot.org/c/coreboot/+/84495?usp=email ) Change subject: soc/mediatek/mt8196: Add PLL and Clock init support ...................................................................... Patch Set 26: (9 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/84495/comment/e86f6476_24956ab8?us… : PS18, Line 10: raising > Move this word to the previous line. Done File src/soc/mediatek/mt8196/include/soc/memlayout.ld: https://review.coreboot.org/c/coreboot/+/84495/comment/6ba37a4a_91d47eb1?us… : PS19, Line 46: 85K > With mtcmos (CB:84497), the booblock size is about 78K Done File src/soc/mediatek/mt8196/pll.c: https://review.coreboot.org/c/coreboot/+/84495/comment/3c8aff8c_d0188d1b?us… : PS13, Line 1196: 30 > What do you mean by "not used"? The `cg_idx` field for all `mmvote_cg_mtcmos_table` members is *used […] @guangjie.song@mediatek.corp-partner.google.com Please help to respond to this comment. Thank you File src/soc/mediatek/mt8196/pll.c: https://review.coreboot.org/c/coreboot/+/84495/comment/d44bb7b8_b8d330ec?us… : PS18, Line 1484: if (fm_data->id == VLP_CKSYS_CTRL) > Add {} Done https://review.coreboot.org/c/coreboot/+/84495/comment/f57341e2_5d965a48?us… : PS18, Line 1794: 0x100 > `BIT(8)` Done File src/soc/mediatek/mt8196/pll.c: https://review.coreboot.org/c/coreboot/+/84495/comment/7c76f44d_0eb40cb8?us… : PS19, Line 773: > remove one blank line Done https://review.coreboot.org/c/coreboot/+/84495/comment/827b204e_f4c6c524?us… : PS19, Line 1464: fm_data->id == MFGPLL_SC1_CTRL) > move to the next line and align with `fm_data->id == MFGPLL_CTRL` Done https://review.coreboot.org/c/coreboot/+/84495/comment/a6be1a42_2dcb4cb3?us… : PS19, Line 1512: fm_data->id == MFGPLL_SC1_CTRL) > ditto Done https://review.coreboot.org/c/coreboot/+/84495/comment/ddabc10b_1ab793f6?us… : PS19, Line 1528: mt_cpu_get_freq > mt_get_cpu_freq Done -- To view, visit https://review.coreboot.org/c/coreboot/+/84495?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icac99fb210c87c8b7b14af627fbd2f14e4c47240 Gerrit-Change-Number: 84495 Gerrit-PatchSet: 26 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Sat, 02 Nov 2024 07:19:23 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Comment-In-Reply-To: Yu-Ping Wu <yupingso(a)google.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[XL] Change in coreboot[main]: soc/mediatek/mt8196: Add PLL and Clock init support
by Jarried Lin (Code Review) 02 Nov '24

02 Nov '24

Attention is currently required from: Hung-Te Lin, Jarried Lin, Paul Menzel. Hello Guangjie Song, Hung-Te Lin, Yidi Lin, Yu-Ping Wu, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/84495?usp=email to look at the new patch set (#26). Change subject: soc/mediatek/mt8196: Add PLL and Clock init support ...................................................................... soc/mediatek/mt8196: Add PLL and Clock init support Add PLL and clock init code, frequency meter and APIs for raising little CPU frequency and set tvdpll frequency. TEST=build pass and driver init ok BUG=b:317009620 Signed-off-by: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Change-Id: Icac99fb210c87c8b7b14af627fbd2f14e4c47240 --- M src/soc/mediatek/mt8196/Makefile.mk M src/soc/mediatek/mt8196/bootblock.c M src/soc/mediatek/mt8196/include/soc/addressmap.h M src/soc/mediatek/mt8196/include/soc/memlayout.ld M src/soc/mediatek/mt8196/include/soc/pll.h A src/soc/mediatek/mt8196/pll.c 6 files changed, 2,260 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/84495/26 -- To view, visit https://review.coreboot.org/c/coreboot/+/84495?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Icac99fb210c87c8b7b14af627fbd2f14e4c47240 Gerrit-Change-Number: 84495 Gerrit-PatchSet: 26 Gerrit-Owner: Jarried Lin <jarried.lin(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Guangjie Song <guangjie.song(a)mediatek.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Attention: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Jarried Lin <jarried.lin(a)mediatek.com>

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coreboot-gerrit November 2024