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Change subject: mb/google/nissa/var/craaskov: Implement touchscreen power sequencing
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Patch Set 2: Code-Review+2
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Change subject: vboot: Add firmware PCR support
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79437/comment/c07c4476_c928c633 :
PS6, Line 24: to 10 (and we plan to use PCR 12 for kernel version).
> Well, I don't really see anything specifically talking about two separate PCRs in that doc. […]
double-extension prevention for PCR0 is a very special case. and yes we can implement a special case for this one (stopping at 2 extend ops) if it is ever needed (similarly, hope/expect it's never needed).
so, if we can reduce the # of required PCRs to 1, that'd be great.
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Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/64873?usp=email
to look at the new patch set (#9).
The following approvals got outdated and were removed:
Verified-1 by build bot (Jenkins)
Change subject: csb_patcher.sh: gets,checks,installs the coreboot and SeaBIOS patches
......................................................................
csb_patcher.sh: gets,checks,installs the coreboot and SeaBIOS patches
Conveniently and securely gets, checks SHA256 and installs some of my
patches from this page - https://review.coreboot.org/q/status:open+banon
- and also gets a collection of useful floppy-based operating systems.
Sometimes it takes quite a long time to get a patch merged, while the
people might need it today! - and this script could be really helpful.
It asks a [Y/N] question for every addition, and since there are some
"universal" patches as well as great floppies, you may still want to
run this script - even if your board is not Lenovo G505S or not AMD.
Use restore_agesa.sh script to restore AMD AGESA boards before running.
Please share your feedback/suggestions and tell about other useful patches,
preferably the "universal" ones - i.e. SeaBIOS. Currently included:
1) "board-specific": Lenovo G505S discrete GPU support, custom SeaBIOS options,
example configs for G505S / AM1I-A / A88XM-E and known good AtomBIOS ROMs,
and also good IRQ routing for AMD Lenovo G505S, ASUS A88XM-E and AM1I-A boards.
2) "universal": SeaBIOS patches: advanced_bootmenu, multiple_floppies,
smbios_mptable_768; and also a floppies collection: KolibriOS,
FreeDOS, MichalOS, Snowdrop, Fiwix, Memtest, Tatos, Plop, FloppyBird.
Run ./csb_patcher.sh help or ./csb_patcher.sh usage for more information.
Send all your questions/suggestions to [ mikebdp2 [at] gmail [d0t] c0m ]
Change-Id: Ia392bad869a82707380d3a1e3c51b3e15f4f02f2
---
A csb_patcher.sh
1 file changed, 936 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/64873/9
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Change subject: Documentation: Update internal URL's
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Patch Set 2: Code-Review+2
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Change subject: vendorcode/google/chromeos: Use unsigned int for "factory_config"
......................................................................
Patch Set 1:
(1 comment)
File src/vendorcode/google/chromeos/tpm_factory_config.c:
https://review.coreboot.org/c/coreboot/+/79769/comment/a7abe624_20e4b939 :
PS1, Line 27: rc = tlcl_cr50_get_factory_config(&factory_config);
This function should assert `factory_config != CHROMEOS_ERROR` after this call also, to catch any changes in the future that end up using all the bits. Otherwise we're signalling an error to the caller even though it's a valid value (assuming `rc == TPM_SUCCESS`, of course).
This means we're kicking the can in terms of how to signal errors to the caller and/or removing using the MSB as a valid config bit, which I'm fine with since the odds are low that it'll occur. We should have something to alert us when this happens some (long) time in the future though.
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Change subject: vendorcode/google/chromeos: Add API to read factory config
......................................................................
Patch Set 8:
(1 comment)
File src/vendorcode/google/chromeos/tpm_factory_config.c:
https://review.coreboot.org/c/coreboot/+/79737/comment/31fca392_dc2d2df5 :
PS8, Line 7: int64_t
> Alternatively, follow the same convention as `tlcl_cr50_get_factory_config()` and return a result enum value while taking a `uint64_t *` whose underlying value is updated by `tlcl_cr50_get_factory_config()`.
>
> ```
> tpm_result_t tlcl_cr50_get_factory_config(uint64_t *factory_config);
> ```
>
> Plenty of ways to skin the cat.
CB:79769 is in review.
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Change subject: mb/google/brya: Enable CSE telemetry for ADL-N
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79768/comment/8c9b5897_e6fa1d75 :
PS1, Line 9: Enable CSE telemetry for ADL-N.
redundant line. ideally you might like to add a description about what this CL is expected to do
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