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Change subject: mb/google/brya: Enable CSE telemetry for ADL-N
......................................................................
Patch Set 1:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79768/comment/8c9b5897_e6fa1d75 :
PS1, Line 9: Enable CSE telemetry for ADL-N.
redundant line. ideally you might like to add a description about what this CL is expected to do
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Hello Martin L Roth, Matt DeVillier,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/79785?usp=email
to look at the new patch set (#2).
Change subject: Documentation: Update internal URL's
......................................................................
Documentation: Update internal URL's
Update URL's to point to head rather than the deprecated
refs/heads/master.
Change-Id: I16f0c087762ff049115b67de3ac0b881aa4e4b40
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
---
M Documentation/mainboard/ocp/deltalake.md
M README.md
2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/79785/2
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Jon Murphy has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/79785?usp=email )
Change subject: Documentation: Update internal URL's
......................................................................
Documentation: Update internal URL's
Update URL's to point to head rather than the deprecated refs/heads/master.
Change-Id: I16f0c087762ff049115b67de3ac0b881aa4e4b40
Signed-off-by: Jon Murphy <jpmurphy(a)google.com>
---
M Documentation/mainboard/ocp/deltalake.md
M README.md
2 files changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/85/79785/1
diff --git a/Documentation/mainboard/ocp/deltalake.md b/Documentation/mainboard/ocp/deltalake.md
index d0573f3..d4c0656 100644
--- a/Documentation/mainboard/ocp/deltalake.md
+++ b/Documentation/mainboard/ocp/deltalake.md
@@ -222,4 +222,4 @@
[All about u-root]: https://github.com/linuxboot/book/tree/master/u-root
[u-root]: https://u-root.org/
[ChromeOS VPD]: https://chromium.googlesource.com/chromiumos/platform/vpd/+/master/README.md
-[src/mainboard/ocp/deltalake/vpd.h]: https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master/sr…
+[src/mainboard/ocp/deltalake/vpd.h]: https://review.coreboot.org/plugins/gitiles/coreboot/+/HEAD/src/mainboard/o…
diff --git a/README.md b/README.md
index eef5eb6..677d62d 100644
--- a/README.md
+++ b/README.md
@@ -30,7 +30,7 @@
instance](https://review.coreboot.org/).
The code may be browsed via [coreboot's Gitiles
-instance](https://review.coreboot.org/plugins/gitiles/coreboot/+/refs/heads/master).
+instance](https://review.coreboot.org/plugins/gitiles/coreboot/+/HEAD).
The coreboot project also maintains a
[mirror](https://github.com/coreboot/coreboot) of the project on github.
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Change subject: mb/google/brya: Enable CSE telemetry for ADL-N
......................................................................
Patch Set 1:
This change is ready for review.
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Change subject: vendorcode/google/chromeos: Add API to read factory config
......................................................................
Patch Set 8:
(1 comment)
File src/vendorcode/google/chromeos/tpm_factory_config.c:
https://review.coreboot.org/c/coreboot/+/79737/comment/4c5a07ad_5a1f5d31 :
PS8, Line 7: int64_t
> > I don't think it's a good idea to make this signed everywhere, it's not a signed number, it's a bi […]
Alternatively, follow the same convention as `tlcl_cr50_get_factory_config()` and return a result enum value while taking a `uint64_t *` whose underlying value is updated by `tlcl_cr50_get_factory_config()`.
```
tpm_result_t tlcl_cr50_get_factory_config(uint64_t *factory_config);
```
Plenty of ways to skin the cat.
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Change subject: soc/amd/picasso/acpi: move SoC-common code from dsdt.asl to soc.asl
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Patch Set 1: Code-Review+2
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Change subject: arch/x86: introduce HAVE_CONFIGURABLE_APMC_SMI_PORT
......................................................................
Patch Set 3:
(1 comment)
File src/arch/x86/Kconfig:
https://review.coreboot.org/c/coreboot/+/79566/comment/1b5b6919_baf7b4b0 :
PS3, Line 322: non-fixed APMC SMI command port
what exactly does non-fixed mean here? dynamically assigned by another firmware component?
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Change subject: vendorcode/google/chromeos: Add API to read factory config
......................................................................
Patch Set 8:
(1 comment)
File src/vendorcode/google/chromeos/tpm_factory_config.c:
https://review.coreboot.org/c/coreboot/+/79737/comment/8e1853ac_4291ddf9 :
PS8, Line 7: int64_t
> I don't think it's a good idea to make this signed everywhere, it's not a signed number, it's a bit field. Even if the top bit will never be allocated, making it signed is confusing.
>
> You can still use `~(uint64_t)0` as a sentinel value even if it's an unsigned number (e.g. like `UNDEFINED_FW_CONFIG`).
good suggestion.
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Change subject: vendorcode/google/chromeos: Add API to read factory config
......................................................................
Patch Set 8:
(1 comment)
File src/vendorcode/google/chromeos/tpm_factory_config.c:
https://review.coreboot.org/c/coreboot/+/79737/comment/d90e81ca_4a4b2b2a :
PS8, Line 7: int64_t
I don't think it's a good idea to make this signed everywhere, it's not a signed number, it's a bit field. Even if the top bit will never be allocated, making it signed is confusing.
You can still use `~(uint64_t)0` as a sentinel value even if it's an unsigned number (e.g. like `UNDEFINED_FW_CONFIG`).
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Change subject: vboot: Add firmware PCR support
......................................................................
Patch Set 6:
(1 comment)
Commit Message:
https://review.coreboot.org/c/coreboot/+/79437/comment/286c0ffe_2e1da777 :
PS6, Line 24: to 10 (and we plan to use PCR 12 for kernel version).
> hmmm, those were discussed in go/cros-arm-widevine-cert […]
Well, I don't really see anything specifically talking about two separate PCRs in that doc. I think this is just a matter of us all starting with different assumptions and never really talking about it. I had always assumed we were talking about a single PCR (because the limited number of PCRs was mentioned as a potential concern earlier). Let's add +Andrey to see what he thinks.
Double-extend should no longer be a concern on future boards (especially not on Arm boards, it had only ever been an issue on x86). Even if it ever came up again we could still add a different hack to Ti50 that just counts the amount of times the PCR is extended and stops it after 2, so it's not like we'd be potentially locking out such workarounds completely. But it shouldn't be necessary anyway.
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